1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /**
3 * emac-rockchip.c - Rockchip EMAC specific glue layer
4 *
5 * Copyright (C) 2014 Romain Perier <romain.perier@gmail.com>
6 */
7
8 #include <linux/etherdevice.h>
9 #include <linux/mfd/syscon.h>
10 #include <linux/module.h>
11 #include <linux/of_net.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <linux/regulator/consumer.h>
15
16 #include "emac.h"
17
18 #define DRV_NAME "rockchip_emac"
19 #define DRV_VERSION "1.1"
20
21 struct emac_rockchip_soc_data {
22 unsigned int grf_offset;
23 unsigned int grf_mode_offset;
24 unsigned int grf_speed_offset;
25 bool need_div_macclk;
26 };
27
28 struct rockchip_priv_data {
29 struct arc_emac_priv emac;
30 struct regmap *grf;
31 const struct emac_rockchip_soc_data *soc_data;
32 struct regulator *regulator;
33 struct clk *refclk;
34 struct clk *macclk;
35 };
36
emac_rockchip_set_mac_speed(void * priv,unsigned int speed)37 static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed)
38 {
39 struct rockchip_priv_data *emac = priv;
40 u32 speed_offset = emac->soc_data->grf_speed_offset;
41 u32 data;
42 int err = 0;
43
44 switch (speed) {
45 case 10:
46 data = (1 << (speed_offset + 16)) | (0 << speed_offset);
47 break;
48 case 100:
49 data = (1 << (speed_offset + 16)) | (1 << speed_offset);
50 break;
51 default:
52 pr_err("speed %u not supported\n", speed);
53 return;
54 }
55
56 err = regmap_write(emac->grf, emac->soc_data->grf_offset, data);
57 if (err)
58 pr_err("unable to apply speed %u to grf (%d)\n", speed, err);
59 }
60
61 static const struct emac_rockchip_soc_data emac_rk3036_emac_data = {
62 .grf_offset = 0x140, .grf_mode_offset = 8,
63 .grf_speed_offset = 9, .need_div_macclk = 1,
64 };
65
66 static const struct emac_rockchip_soc_data emac_rk3066_emac_data = {
67 .grf_offset = 0x154, .grf_mode_offset = 0,
68 .grf_speed_offset = 1, .need_div_macclk = 0,
69 };
70
71 static const struct emac_rockchip_soc_data emac_rk3188_emac_data = {
72 .grf_offset = 0x0a4, .grf_mode_offset = 0,
73 .grf_speed_offset = 1, .need_div_macclk = 0,
74 };
75
76 static const struct of_device_id emac_rockchip_dt_ids[] = {
77 {
78 .compatible = "rockchip,rk3036-emac",
79 .data = &emac_rk3036_emac_data,
80 },
81 {
82 .compatible = "rockchip,rk3066-emac",
83 .data = &emac_rk3066_emac_data,
84 },
85 {
86 .compatible = "rockchip,rk3188-emac",
87 .data = &emac_rk3188_emac_data,
88 },
89 { /* Sentinel */ }
90 };
91
92 MODULE_DEVICE_TABLE(of, emac_rockchip_dt_ids);
93
emac_rockchip_probe(struct platform_device * pdev)94 static int emac_rockchip_probe(struct platform_device *pdev)
95 {
96 struct device *dev = &pdev->dev;
97 struct net_device *ndev;
98 struct rockchip_priv_data *priv;
99 const struct of_device_id *match;
100 u32 data;
101 int err, interface;
102
103 if (!pdev->dev.of_node)
104 return -ENODEV;
105
106 ndev = alloc_etherdev(sizeof(struct rockchip_priv_data));
107 if (!ndev)
108 return -ENOMEM;
109 platform_set_drvdata(pdev, ndev);
110 SET_NETDEV_DEV(ndev, dev);
111
112 priv = netdev_priv(ndev);
113 priv->emac.drv_name = DRV_NAME;
114 priv->emac.drv_version = DRV_VERSION;
115 priv->emac.set_mac_speed = emac_rockchip_set_mac_speed;
116
117 interface = of_get_phy_mode(dev->of_node);
118
119 /* RK3036/RK3066/RK3188 SoCs only support RMII */
120 if (interface != PHY_INTERFACE_MODE_RMII) {
121 dev_err(dev, "unsupported phy interface mode %d\n", interface);
122 err = -ENOTSUPP;
123 goto out_netdev;
124 }
125
126 priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
127 "rockchip,grf");
128 if (IS_ERR(priv->grf)) {
129 dev_err(dev, "failed to retrieve global register file (%ld)\n",
130 PTR_ERR(priv->grf));
131 err = PTR_ERR(priv->grf);
132 goto out_netdev;
133 }
134
135 match = of_match_node(emac_rockchip_dt_ids, dev->of_node);
136 priv->soc_data = match->data;
137
138 priv->emac.clk = devm_clk_get(dev, "hclk");
139 if (IS_ERR(priv->emac.clk)) {
140 dev_err(dev, "failed to retrieve host clock (%ld)\n",
141 PTR_ERR(priv->emac.clk));
142 err = PTR_ERR(priv->emac.clk);
143 goto out_netdev;
144 }
145
146 priv->refclk = devm_clk_get(dev, "macref");
147 if (IS_ERR(priv->refclk)) {
148 dev_err(dev, "failed to retrieve reference clock (%ld)\n",
149 PTR_ERR(priv->refclk));
150 err = PTR_ERR(priv->refclk);
151 goto out_netdev;
152 }
153
154 err = clk_prepare_enable(priv->refclk);
155 if (err) {
156 dev_err(dev, "failed to enable reference clock (%d)\n", err);
157 goto out_netdev;
158 }
159
160 /* Optional regulator for PHY */
161 priv->regulator = devm_regulator_get_optional(dev, "phy");
162 if (IS_ERR(priv->regulator)) {
163 if (PTR_ERR(priv->regulator) == -EPROBE_DEFER) {
164 err = -EPROBE_DEFER;
165 goto out_clk_disable;
166 }
167 dev_err(dev, "no regulator found\n");
168 priv->regulator = NULL;
169 }
170
171 if (priv->regulator) {
172 err = regulator_enable(priv->regulator);
173 if (err) {
174 dev_err(dev, "failed to enable phy-supply (%d)\n", err);
175 goto out_clk_disable;
176 }
177 }
178
179 /* Set speed 100M */
180 data = (1 << (priv->soc_data->grf_speed_offset + 16)) |
181 (1 << priv->soc_data->grf_speed_offset);
182 /* Set RMII mode */
183 data |= (1 << (priv->soc_data->grf_mode_offset + 16)) |
184 (0 << priv->soc_data->grf_mode_offset);
185
186 err = regmap_write(priv->grf, priv->soc_data->grf_offset, data);
187 if (err) {
188 dev_err(dev, "unable to apply initial settings to grf (%d)\n",
189 err);
190 goto out_regulator_disable;
191 }
192
193 /* RMII interface needs always a rate of 50MHz */
194 err = clk_set_rate(priv->refclk, 50000000);
195 if (err) {
196 dev_err(dev,
197 "failed to change reference clock rate (%d)\n", err);
198 goto out_regulator_disable;
199 }
200
201 if (priv->soc_data->need_div_macclk) {
202 priv->macclk = devm_clk_get(dev, "macclk");
203 if (IS_ERR(priv->macclk)) {
204 dev_err(dev, "failed to retrieve mac clock (%ld)\n",
205 PTR_ERR(priv->macclk));
206 err = PTR_ERR(priv->macclk);
207 goto out_regulator_disable;
208 }
209
210 err = clk_prepare_enable(priv->macclk);
211 if (err) {
212 dev_err(dev, "failed to enable mac clock (%d)\n", err);
213 goto out_regulator_disable;
214 }
215
216 /* RMII TX/RX needs always a rate of 25MHz */
217 err = clk_set_rate(priv->macclk, 25000000);
218 if (err) {
219 dev_err(dev,
220 "failed to change mac clock rate (%d)\n", err);
221 goto out_clk_disable_macclk;
222 }
223 }
224
225 err = arc_emac_probe(ndev, interface);
226 if (err) {
227 dev_err(dev, "failed to probe arc emac (%d)\n", err);
228 goto out_clk_disable_macclk;
229 }
230
231 return 0;
232
233 out_clk_disable_macclk:
234 if (priv->soc_data->need_div_macclk)
235 clk_disable_unprepare(priv->macclk);
236 out_regulator_disable:
237 if (priv->regulator)
238 regulator_disable(priv->regulator);
239 out_clk_disable:
240 clk_disable_unprepare(priv->refclk);
241 out_netdev:
242 free_netdev(ndev);
243 return err;
244 }
245
emac_rockchip_remove(struct platform_device * pdev)246 static int emac_rockchip_remove(struct platform_device *pdev)
247 {
248 struct net_device *ndev = platform_get_drvdata(pdev);
249 struct rockchip_priv_data *priv = netdev_priv(ndev);
250 int err;
251
252 err = arc_emac_remove(ndev);
253
254 clk_disable_unprepare(priv->refclk);
255
256 if (priv->regulator)
257 regulator_disable(priv->regulator);
258
259 if (priv->soc_data->need_div_macclk)
260 clk_disable_unprepare(priv->macclk);
261
262 free_netdev(ndev);
263 return err;
264 }
265
266 static struct platform_driver emac_rockchip_driver = {
267 .probe = emac_rockchip_probe,
268 .remove = emac_rockchip_remove,
269 .driver = {
270 .name = DRV_NAME,
271 .of_match_table = emac_rockchip_dt_ids,
272 },
273 };
274
275 module_platform_driver(emac_rockchip_driver);
276
277 MODULE_AUTHOR("Romain Perier <romain.perier@gmail.com>");
278 MODULE_DESCRIPTION("Rockchip EMAC platform driver");
279 MODULE_LICENSE("GPL");
280
