1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * cobalt driver initialization and card probing
4 *
5 * Derived from cx18-driver.c
6 *
7 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
8 * All rights reserved.
9 */
10
11 #include <linux/delay.h>
12 #include <media/i2c/adv7604.h>
13 #include <media/i2c/adv7842.h>
14 #include <media/i2c/adv7511.h>
15 #include <media/v4l2-event.h>
16 #include <media/v4l2-ctrls.h>
17
18 #include "cobalt-driver.h"
19 #include "cobalt-irq.h"
20 #include "cobalt-i2c.h"
21 #include "cobalt-v4l2.h"
22 #include "cobalt-flash.h"
23 #include "cobalt-alsa.h"
24 #include "cobalt-omnitek.h"
25
26 /* add your revision and whatnot here */
27 static const struct pci_device_id cobalt_pci_tbl[] = {
28 {PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_COBALT,
29 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
30 {0,}
31 };
32
33 MODULE_DEVICE_TABLE(pci, cobalt_pci_tbl);
34
35 static atomic_t cobalt_instance = ATOMIC_INIT(0);
36
37 int cobalt_debug;
38 module_param_named(debug, cobalt_debug, int, 0644);
39 MODULE_PARM_DESC(debug, "Debug level. Default: 0\n");
40
41 int cobalt_ignore_err;
42 module_param_named(ignore_err, cobalt_ignore_err, int, 0644);
43 MODULE_PARM_DESC(ignore_err,
44 "If set then ignore missing i2c adapters/receivers. Default: 0\n");
45
46 MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com> & Morten Hestnes");
47 MODULE_DESCRIPTION("cobalt driver");
48 MODULE_LICENSE("GPL");
49
50 static u8 edid[256] = {
51 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
52 0x50, 0x21, 0x32, 0x27, 0x00, 0x00, 0x00, 0x00,
53 0x22, 0x1a, 0x01, 0x03, 0x80, 0x30, 0x1b, 0x78,
54 0x0f, 0xee, 0x91, 0xa3, 0x54, 0x4c, 0x99, 0x26,
55 0x0f, 0x50, 0x54, 0x2f, 0xcf, 0x00, 0x31, 0x59,
56 0x45, 0x59, 0x61, 0x59, 0x81, 0x99, 0x01, 0x01,
57 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
58 0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
59 0x46, 0x00, 0xe0, 0x0e, 0x11, 0x00, 0x00, 0x1e,
60 0x00, 0x00, 0x00, 0xfd, 0x00, 0x18, 0x55, 0x18,
61 0x5e, 0x11, 0x00, 0x0a, 0x20, 0x20, 0x20, 0x20,
62 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x63,
63 0x6f, 0x62, 0x61, 0x6c, 0x74, 0x0a, 0x20, 0x20,
64 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0x10,
65 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x9c,
67
68 0x02, 0x03, 0x1f, 0xf0, 0x4a, 0x90, 0x1f, 0x04,
69 0x13, 0x22, 0x21, 0x20, 0x02, 0x11, 0x01, 0x23,
70 0x09, 0x07, 0x07, 0x68, 0x03, 0x0c, 0x00, 0x10,
71 0x00, 0x00, 0x22, 0x0f, 0xe2, 0x00, 0xea, 0x00,
72 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
73 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
75 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
76 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
77 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
79 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
81 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
82 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
83 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7,
84 };
85
cobalt_set_interrupt(struct cobalt * cobalt,bool enable)86 static void cobalt_set_interrupt(struct cobalt *cobalt, bool enable)
87 {
88 if (enable) {
89 unsigned irqs = COBALT_SYSSTAT_VI0_INT1_MSK |
90 COBALT_SYSSTAT_VI1_INT1_MSK |
91 COBALT_SYSSTAT_VI2_INT1_MSK |
92 COBALT_SYSSTAT_VI3_INT1_MSK |
93 COBALT_SYSSTAT_VI0_INT2_MSK |
94 COBALT_SYSSTAT_VI1_INT2_MSK |
95 COBALT_SYSSTAT_VI2_INT2_MSK |
96 COBALT_SYSSTAT_VI3_INT2_MSK |
97 COBALT_SYSSTAT_VI0_LOST_DATA_MSK |
98 COBALT_SYSSTAT_VI1_LOST_DATA_MSK |
99 COBALT_SYSSTAT_VI2_LOST_DATA_MSK |
100 COBALT_SYSSTAT_VI3_LOST_DATA_MSK |
101 COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK;
102
103 if (cobalt->have_hsma_rx)
104 irqs |= COBALT_SYSSTAT_VIHSMA_INT1_MSK |
105 COBALT_SYSSTAT_VIHSMA_INT2_MSK |
106 COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK;
107
108 if (cobalt->have_hsma_tx)
109 irqs |= COBALT_SYSSTAT_VOHSMA_INT1_MSK |
110 COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK |
111 COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK;
112 /* Clear any existing interrupts */
113 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_EDGE, 0xffffffff);
114 /* PIO Core interrupt mask register.
115 Enable ADV7604 INT1 interrupts */
116 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, irqs);
117 } else {
118 /* Disable all ADV7604 interrupts */
119 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, 0);
120 }
121 }
122
cobalt_get_sd_nr(struct v4l2_subdev * sd)123 static unsigned cobalt_get_sd_nr(struct v4l2_subdev *sd)
124 {
125 struct cobalt *cobalt = to_cobalt(sd->v4l2_dev);
126 unsigned i;
127
128 for (i = 0; i < COBALT_NUM_NODES; i++)
129 if (sd == cobalt->streams[i].sd)
130 return i;
131 cobalt_err("Invalid adv7604 subdev pointer!\n");
132 return 0;
133 }
134
cobalt_notify(struct v4l2_subdev * sd,unsigned int notification,void * arg)135 static void cobalt_notify(struct v4l2_subdev *sd,
136 unsigned int notification, void *arg)
137 {
138 struct cobalt *cobalt = to_cobalt(sd->v4l2_dev);
139 unsigned sd_nr = cobalt_get_sd_nr(sd);
140 struct cobalt_stream *s = &cobalt->streams[sd_nr];
141 bool hotplug = arg ? *((int *)arg) : false;
142
143 if (s->is_output)
144 return;
145
146 switch (notification) {
147 case ADV76XX_HOTPLUG:
148 cobalt_s_bit_sysctrl(cobalt,
149 COBALT_SYS_CTRL_HPD_TO_CONNECTOR_BIT(sd_nr), hotplug);
150 cobalt_dbg(1, "Set hotplug for adv %d to %d\n", sd_nr, hotplug);
151 break;
152 case V4L2_DEVICE_NOTIFY_EVENT:
153 cobalt_dbg(1, "Format changed for adv %d\n", sd_nr);
154 v4l2_event_queue(&s->vdev, arg);
155 break;
156 default:
157 break;
158 }
159 }
160
get_payload_size(u16 code)161 static int get_payload_size(u16 code)
162 {
163 switch (code) {
164 case 0: return 128;
165 case 1: return 256;
166 case 2: return 512;
167 case 3: return 1024;
168 case 4: return 2048;
169 case 5: return 4096;
170 default: return 0;
171 }
172 return 0;
173 }
174
get_link_speed(u16 stat)175 static const char *get_link_speed(u16 stat)
176 {
177 switch (stat & PCI_EXP_LNKSTA_CLS) {
178 case 1: return "2.5 Gbit/s";
179 case 2: return "5 Gbit/s";
180 case 3: return "10 Gbit/s";
181 }
182 return "Unknown speed";
183 }
184
cobalt_pcie_status_show(struct cobalt * cobalt)185 void cobalt_pcie_status_show(struct cobalt *cobalt)
186 {
187 struct pci_dev *pci_dev = cobalt->pci_dev;
188 struct pci_dev *pci_bus_dev = cobalt->pci_dev->bus->self;
189 u32 capa;
190 u16 stat, ctrl;
191
192 if (!pci_is_pcie(pci_dev) || !pci_is_pcie(pci_bus_dev))
193 return;
194
195 /* Device */
196 pcie_capability_read_dword(pci_dev, PCI_EXP_DEVCAP, &capa);
197 pcie_capability_read_word(pci_dev, PCI_EXP_DEVCTL, &ctrl);
198 pcie_capability_read_word(pci_dev, PCI_EXP_DEVSTA, &stat);
199 cobalt_info("PCIe device capability 0x%08x: Max payload %d\n",
200 capa, get_payload_size(capa & PCI_EXP_DEVCAP_PAYLOAD));
201 cobalt_info("PCIe device control 0x%04x: Max payload %d. Max read request %d\n",
202 ctrl,
203 get_payload_size((ctrl & PCI_EXP_DEVCTL_PAYLOAD) >> 5),
204 get_payload_size((ctrl & PCI_EXP_DEVCTL_READRQ) >> 12));
205 cobalt_info("PCIe device status 0x%04x\n", stat);
206
207 /* Link */
208 pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &capa);
209 pcie_capability_read_word(pci_dev, PCI_EXP_LNKCTL, &ctrl);
210 pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &stat);
211 cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n",
212 capa, get_link_speed(capa),
213 (capa & PCI_EXP_LNKCAP_MLW) >> 4);
214 cobalt_info("PCIe link control 0x%04x\n", ctrl);
215 cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n",
216 stat, get_link_speed(stat),
217 (stat & PCI_EXP_LNKSTA_NLW) >> 4);
218
219 /* Bus */
220 pcie_capability_read_dword(pci_bus_dev, PCI_EXP_LNKCAP, &capa);
221 cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n",
222 capa, get_link_speed(capa),
223 (capa & PCI_EXP_LNKCAP_MLW) >> 4);
224
225 /* Slot */
226 pcie_capability_read_dword(pci_dev, PCI_EXP_SLTCAP, &capa);
227 pcie_capability_read_word(pci_dev, PCI_EXP_SLTCTL, &ctrl);
228 pcie_capability_read_word(pci_dev, PCI_EXP_SLTSTA, &stat);
229 cobalt_info("PCIe slot capability 0x%08x\n", capa);
230 cobalt_info("PCIe slot control 0x%04x\n", ctrl);
231 cobalt_info("PCIe slot status 0x%04x\n", stat);
232 }
233
pcie_link_get_lanes(struct cobalt * cobalt)234 static unsigned pcie_link_get_lanes(struct cobalt *cobalt)
235 {
236 struct pci_dev *pci_dev = cobalt->pci_dev;
237 u16 link;
238
239 if (!pci_is_pcie(pci_dev))
240 return 0;
241 pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &link);
242 return (link & PCI_EXP_LNKSTA_NLW) >> 4;
243 }
244
pcie_bus_link_get_lanes(struct cobalt * cobalt)245 static unsigned pcie_bus_link_get_lanes(struct cobalt *cobalt)
246 {
247 struct pci_dev *pci_dev = cobalt->pci_dev->bus->self;
248 u32 link;
249
250 if (!pci_is_pcie(pci_dev))
251 return 0;
252 pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &link);
253 return (link & PCI_EXP_LNKCAP_MLW) >> 4;
254 }
255
msi_config_show(struct cobalt * cobalt,struct pci_dev * pci_dev)256 static void msi_config_show(struct cobalt *cobalt, struct pci_dev *pci_dev)
257 {
258 u16 ctrl, data;
259 u32 adrs_l, adrs_h;
260
261 pci_read_config_word(pci_dev, 0x52, &ctrl);
262 cobalt_info("MSI %s\n", ctrl & 1 ? "enable" : "disable");
263 cobalt_info("MSI multiple message: Capable %u. Enable %u\n",
264 (1 << ((ctrl >> 1) & 7)), (1 << ((ctrl >> 4) & 7)));
265 if (ctrl & 0x80)
266 cobalt_info("MSI: 64-bit address capable\n");
267 pci_read_config_dword(pci_dev, 0x54, &adrs_l);
268 pci_read_config_dword(pci_dev, 0x58, &adrs_h);
269 pci_read_config_word(pci_dev, 0x5c, &data);
270 if (ctrl & 0x80)
271 cobalt_info("MSI: Address 0x%08x%08x. Data 0x%04x\n",
272 adrs_h, adrs_l, data);
273 else
274 cobalt_info("MSI: Address 0x%08x. Data 0x%04x\n",
275 adrs_l, data);
276 }
277
cobalt_pci_iounmap(struct cobalt * cobalt,struct pci_dev * pci_dev)278 static void cobalt_pci_iounmap(struct cobalt *cobalt, struct pci_dev *pci_dev)
279 {
280 if (cobalt->bar0) {
281 pci_iounmap(pci_dev, cobalt->bar0);
282 cobalt->bar0 = NULL;
283 }
284 if (cobalt->bar1) {
285 pci_iounmap(pci_dev, cobalt->bar1);
286 cobalt->bar1 = NULL;
287 }
288 }
289
cobalt_free_msi(struct cobalt * cobalt,struct pci_dev * pci_dev)290 static void cobalt_free_msi(struct cobalt *cobalt, struct pci_dev *pci_dev)
291 {
292 free_irq(pci_dev->irq, (void *)cobalt);
293 pci_free_irq_vectors(pci_dev);
294 }
295
cobalt_setup_pci(struct cobalt * cobalt,struct pci_dev * pci_dev,const struct pci_device_id * pci_id)296 static int cobalt_setup_pci(struct cobalt *cobalt, struct pci_dev *pci_dev,
297 const struct pci_device_id *pci_id)
298 {
299 u32 ctrl;
300 int ret;
301
302 cobalt_dbg(1, "enabling pci device\n");
303
304 ret = pci_enable_device(pci_dev);
305 if (ret) {
306 cobalt_err("can't enable device\n");
307 return ret;
308 }
309 pci_set_master(pci_dev);
310 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &cobalt->card_rev);
311 pci_read_config_word(pci_dev, PCI_DEVICE_ID, &cobalt->device_id);
312
313 switch (cobalt->device_id) {
314 case PCI_DEVICE_ID_COBALT:
315 cobalt_info("PCI Express interface from Omnitek\n");
316 break;
317 default:
318 cobalt_info("PCI Express interface provider is unknown!\n");
319 break;
320 }
321
322 if (pcie_link_get_lanes(cobalt) != 8) {
323 cobalt_warn("PCI Express link width is %d lanes.\n",
324 pcie_link_get_lanes(cobalt));
325 if (pcie_bus_link_get_lanes(cobalt) < 8)
326 cobalt_warn("The current slot only supports %d lanes, for best performance 8 are needed\n",
327 pcie_bus_link_get_lanes(cobalt));
328 if (pcie_link_get_lanes(cobalt) != pcie_bus_link_get_lanes(cobalt)) {
329 cobalt_err("The card is most likely not seated correctly in the PCIe slot\n");
330 ret = -EIO;
331 goto err_disable;
332 }
333 }
334
335 if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) {
336 ret = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
337 if (ret) {
338 cobalt_err("no suitable DMA available\n");
339 goto err_disable;
340 }
341 }
342
343 ret = pci_request_regions(pci_dev, "cobalt");
344 if (ret) {
345 cobalt_err("error requesting regions\n");
346 goto err_disable;
347 }
348
349 cobalt_pcie_status_show(cobalt);
350
351 cobalt->bar0 = pci_iomap(pci_dev, 0, 0);
352 cobalt->bar1 = pci_iomap(pci_dev, 1, 0);
353 if (cobalt->bar1 == NULL) {
354 cobalt->bar1 = pci_iomap(pci_dev, 2, 0);
355 cobalt_info("64-bit BAR\n");
356 }
357 if (!cobalt->bar0 || !cobalt->bar1) {
358 ret = -EIO;
359 goto err_release;
360 }
361
362 /* Reset the video inputs before enabling any interrupts */
363 ctrl = cobalt_read_bar1(cobalt, COBALT_SYS_CTRL_BASE);
364 cobalt_write_bar1(cobalt, COBALT_SYS_CTRL_BASE, ctrl & ~0xf00);
365
366 /* Disable interrupts to prevent any spurious interrupts
367 from being generated. */
368 cobalt_set_interrupt(cobalt, false);
369
370 if (pci_alloc_irq_vectors(pci_dev, 1, 1, PCI_IRQ_MSI) < 1) {
371 cobalt_err("Could not enable MSI\n");
372 ret = -EIO;
373 goto err_release;
374 }
375 msi_config_show(cobalt, pci_dev);
376
377 /* Register IRQ */
378 if (request_irq(pci_dev->irq, cobalt_irq_handler, IRQF_SHARED,
379 cobalt->v4l2_dev.name, (void *)cobalt)) {
380 cobalt_err("Failed to register irq %d\n", pci_dev->irq);
381 ret = -EIO;
382 goto err_msi;
383 }
384
385 omni_sg_dma_init(cobalt);
386 return 0;
387
388 err_msi:
389 pci_disable_msi(pci_dev);
390
391 err_release:
392 cobalt_pci_iounmap(cobalt, pci_dev);
393 pci_release_regions(pci_dev);
394
395 err_disable:
396 pci_disable_device(cobalt->pci_dev);
397 return ret;
398 }
399
cobalt_hdl_info_get(struct cobalt * cobalt)400 static int cobalt_hdl_info_get(struct cobalt *cobalt)
401 {
402 int i;
403
404 for (i = 0; i < COBALT_HDL_INFO_SIZE; i++)
405 cobalt->hdl_info[i] =
406 ioread8(cobalt->bar1 + COBALT_HDL_INFO_BASE + i);
407 cobalt->hdl_info[COBALT_HDL_INFO_SIZE - 1] = '\0';
408 if (strstr(cobalt->hdl_info, COBALT_HDL_SEARCH_STR))
409 return 0;
410
411 return 1;
412 }
413
cobalt_stream_struct_init(struct cobalt * cobalt)414 static void cobalt_stream_struct_init(struct cobalt *cobalt)
415 {
416 int i;
417
418 for (i = 0; i < COBALT_NUM_STREAMS; i++) {
419 struct cobalt_stream *s = &cobalt->streams[i];
420
421 s->cobalt = cobalt;
422 s->flags = 0;
423 s->is_audio = false;
424 s->is_output = false;
425 s->is_dummy = true;
426
427 /* The Memory DMA channels will always get a lower channel
428 * number than the FIFO DMA. Video input should map to the
429 * stream 0-3. The other can use stream struct from 4 and
430 * higher */
431 if (i <= COBALT_HSMA_IN_NODE) {
432 s->dma_channel = i + cobalt->first_fifo_channel;
433 s->video_channel = i;
434 s->dma_fifo_mask =
435 COBALT_SYSSTAT_VI0_LOST_DATA_MSK << (4 * i);
436 s->adv_irq_mask =
437 COBALT_SYSSTAT_VI0_INT1_MSK << (4 * i);
438 } else if (i >= COBALT_AUDIO_IN_STREAM &&
439 i <= COBALT_AUDIO_IN_STREAM + 4) {
440 unsigned idx = i - COBALT_AUDIO_IN_STREAM;
441
442 s->dma_channel = 6 + idx;
443 s->is_audio = true;
444 s->video_channel = idx;
445 s->dma_fifo_mask = COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK;
446 } else if (i == COBALT_HSMA_OUT_NODE) {
447 s->dma_channel = 11;
448 s->is_output = true;
449 s->video_channel = 5;
450 s->dma_fifo_mask = COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK;
451 s->adv_irq_mask = COBALT_SYSSTAT_VOHSMA_INT1_MSK;
452 } else if (i == COBALT_AUDIO_OUT_STREAM) {
453 s->dma_channel = 12;
454 s->is_audio = true;
455 s->is_output = true;
456 s->video_channel = 5;
457 s->dma_fifo_mask = COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK;
458 } else {
459 /* FIXME: Memory DMA for debug purpose */
460 s->dma_channel = i - COBALT_NUM_NODES;
461 }
462 cobalt_info("stream #%d -> dma channel #%d <- video channel %d\n",
463 i, s->dma_channel, s->video_channel);
464 }
465 }
466
cobalt_subdevs_init(struct cobalt * cobalt)467 static int cobalt_subdevs_init(struct cobalt *cobalt)
468 {
469 static struct adv76xx_platform_data adv7604_pdata = {
470 .disable_pwrdnb = 1,
471 .ain_sel = ADV7604_AIN7_8_9_NC_SYNC_3_1,
472 .bus_order = ADV7604_BUS_ORDER_BRG,
473 .blank_data = 1,
474 .op_format_mode_sel = ADV7604_OP_FORMAT_MODE0,
475 .int1_config = ADV76XX_INT1_CONFIG_ACTIVE_HIGH,
476 .dr_str_data = ADV76XX_DR_STR_HIGH,
477 .dr_str_clk = ADV76XX_DR_STR_HIGH,
478 .dr_str_sync = ADV76XX_DR_STR_HIGH,
479 .hdmi_free_run_mode = 1,
480 .inv_vs_pol = 1,
481 .inv_hs_pol = 1,
482 };
483 static struct i2c_board_info adv7604_info = {
484 .type = "adv7604",
485 .addr = 0x20,
486 .platform_data = &adv7604_pdata,
487 };
488
489 struct cobalt_stream *s = cobalt->streams;
490 int i;
491
492 for (i = 0; i < COBALT_NUM_INPUTS; i++) {
493 struct v4l2_subdev_format sd_fmt = {
494 .pad = ADV7604_PAD_SOURCE,
495 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
496 .format.code = MEDIA_BUS_FMT_YUYV8_1X16,
497 };
498 struct v4l2_subdev_edid cobalt_edid = {
499 .pad = ADV76XX_PAD_HDMI_PORT_A,
500 .start_block = 0,
501 .blocks = 2,
502 .edid = edid,
503 };
504 int err;
505
506 s[i].pad_source = ADV7604_PAD_SOURCE;
507 s[i].i2c_adap = &cobalt->i2c_adap[i];
508 if (s[i].i2c_adap->dev.parent == NULL)
509 continue;
510 cobalt_s_bit_sysctrl(cobalt,
511 COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(i), 1);
512 s[i].sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev,
513 s[i].i2c_adap, &adv7604_info, NULL);
514 if (!s[i].sd) {
515 if (cobalt_ignore_err)
516 continue;
517 return -ENODEV;
518 }
519 err = v4l2_subdev_call(s[i].sd, video, s_routing,
520 ADV76XX_PAD_HDMI_PORT_A, 0, 0);
521 if (err)
522 return err;
523 err = v4l2_subdev_call(s[i].sd, pad, set_edid,
524 &cobalt_edid);
525 if (err)
526 return err;
527 err = v4l2_subdev_call(s[i].sd, pad, set_fmt, NULL,
528 &sd_fmt);
529 if (err)
530 return err;
531 /* Reset channel video module */
532 cobalt_s_bit_sysctrl(cobalt,
533 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), 0);
534 mdelay(2);
535 cobalt_s_bit_sysctrl(cobalt,
536 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), 1);
537 mdelay(1);
538 s[i].is_dummy = false;
539 cobalt->streams[i + COBALT_AUDIO_IN_STREAM].is_dummy = false;
540 }
541 return 0;
542 }
543
cobalt_subdevs_hsma_init(struct cobalt * cobalt)544 static int cobalt_subdevs_hsma_init(struct cobalt *cobalt)
545 {
546 static struct adv7842_platform_data adv7842_pdata = {
547 .disable_pwrdnb = 1,
548 .ain_sel = ADV7842_AIN1_2_3_NC_SYNC_1_2,
549 .bus_order = ADV7842_BUS_ORDER_RBG,
550 .op_format_mode_sel = ADV7842_OP_FORMAT_MODE0,
551 .blank_data = 1,
552 .dr_str_data = 3,
553 .dr_str_clk = 3,
554 .dr_str_sync = 3,
555 .mode = ADV7842_MODE_HDMI,
556 .hdmi_free_run_enable = 1,
557 .vid_std_select = ADV7842_HDMI_COMP_VID_STD_HD_1250P,
558 .i2c_sdp_io = 0x4a,
559 .i2c_sdp = 0x48,
560 .i2c_cp = 0x22,
561 .i2c_vdp = 0x24,
562 .i2c_afe = 0x26,
563 .i2c_hdmi = 0x34,
564 .i2c_repeater = 0x32,
565 .i2c_edid = 0x36,
566 .i2c_infoframe = 0x3e,
567 .i2c_cec = 0x40,
568 .i2c_avlink = 0x42,
569 };
570 static struct i2c_board_info adv7842_info = {
571 .type = "adv7842",
572 .addr = 0x20,
573 .platform_data = &adv7842_pdata,
574 };
575 static struct v4l2_subdev_format sd_fmt = {
576 .pad = ADV7842_PAD_SOURCE,
577 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
578 .format.code = MEDIA_BUS_FMT_YUYV8_1X16,
579 };
580 static struct adv7511_platform_data adv7511_pdata = {
581 .i2c_edid = 0x7e >> 1,
582 .i2c_cec = 0x7c >> 1,
583 .i2c_pktmem = 0x70 >> 1,
584 .cec_clk = 12000000,
585 };
586 static struct i2c_board_info adv7511_info = {
587 .type = "adv7511-v4l2",
588 .addr = 0x39, /* 0x39 or 0x3d */
589 .platform_data = &adv7511_pdata,
590 };
591 struct v4l2_subdev_edid cobalt_edid = {
592 .pad = ADV7842_EDID_PORT_A,
593 .start_block = 0,
594 .blocks = 2,
595 .edid = edid,
596 };
597 struct cobalt_stream *s = &cobalt->streams[COBALT_HSMA_IN_NODE];
598
599 s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1];
600 if (s->i2c_adap->dev.parent == NULL)
601 return 0;
602 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), 1);
603
604 s->sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev,
605 s->i2c_adap, &adv7842_info, NULL);
606 if (s->sd) {
607 int err = v4l2_subdev_call(s->sd, pad, set_edid, &cobalt_edid);
608
609 if (err)
610 return err;
611 err = v4l2_subdev_call(s->sd, pad, set_fmt, NULL,
612 &sd_fmt);
613 if (err)
614 return err;
615 cobalt->have_hsma_rx = true;
616 s->pad_source = ADV7842_PAD_SOURCE;
617 s->is_dummy = false;
618 cobalt->streams[4 + COBALT_AUDIO_IN_STREAM].is_dummy = false;
619 /* Reset channel video module */
620 cobalt_s_bit_sysctrl(cobalt,
621 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 0);
622 mdelay(2);
623 cobalt_s_bit_sysctrl(cobalt,
624 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 1);
625 mdelay(1);
626 return err;
627 }
628 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), 0);
629 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_PWRDN0_TO_HSMA_TX_BIT, 0);
630 s++;
631 s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1];
632 s->sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev,
633 s->i2c_adap, &adv7511_info, NULL);
634 if (s->sd) {
635 /* A transmitter is hooked up, so we can set this bit */
636 cobalt_s_bit_sysctrl(cobalt,
637 COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 1);
638 cobalt_s_bit_sysctrl(cobalt,
639 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 0);
640 cobalt_s_bit_sysctrl(cobalt,
641 COBALT_SYS_CTRL_VIDEO_TX_RESETN_BIT, 1);
642 cobalt->have_hsma_tx = true;
643 v4l2_subdev_call(s->sd, core, s_power, 1);
644 v4l2_subdev_call(s->sd, video, s_stream, 1);
645 v4l2_subdev_call(s->sd, audio, s_stream, 1);
646 v4l2_ctrl_s_ctrl(v4l2_ctrl_find(s->sd->ctrl_handler,
647 V4L2_CID_DV_TX_MODE), V4L2_DV_TX_MODE_HDMI);
648 s->is_dummy = false;
649 cobalt->streams[COBALT_AUDIO_OUT_STREAM].is_dummy = false;
650 return 0;
651 }
652 return -ENODEV;
653 }
654
cobalt_probe(struct pci_dev * pci_dev,const struct pci_device_id * pci_id)655 static int cobalt_probe(struct pci_dev *pci_dev,
656 const struct pci_device_id *pci_id)
657 {
658 struct cobalt *cobalt;
659 int retval = 0;
660 int i;
661
662 /* FIXME - module parameter arrays constrain max instances */
663 i = atomic_inc_return(&cobalt_instance) - 1;
664
665 cobalt = kzalloc(sizeof(struct cobalt), GFP_KERNEL);
666 if (cobalt == NULL)
667 return -ENOMEM;
668 cobalt->pci_dev = pci_dev;
669 cobalt->instance = i;
670
671 retval = v4l2_device_register(&pci_dev->dev, &cobalt->v4l2_dev);
672 if (retval) {
673 pr_err("cobalt: v4l2_device_register of card %d failed\n",
674 cobalt->instance);
675 kfree(cobalt);
676 return retval;
677 }
678 snprintf(cobalt->v4l2_dev.name, sizeof(cobalt->v4l2_dev.name),
679 "cobalt-%d", cobalt->instance);
680 cobalt->v4l2_dev.notify = cobalt_notify;
681 cobalt_info("Initializing card %d\n", cobalt->instance);
682
683 cobalt->irq_work_queues =
684 create_singlethread_workqueue(cobalt->v4l2_dev.name);
685 if (cobalt->irq_work_queues == NULL) {
686 cobalt_err("Could not create workqueue\n");
687 retval = -ENOMEM;
688 goto err;
689 }
690
691 INIT_WORK(&cobalt->irq_work_queue, cobalt_irq_work_handler);
692
693 /* PCI Device Setup */
694 retval = cobalt_setup_pci(cobalt, pci_dev, pci_id);
695 if (retval != 0)
696 goto err_wq;
697
698 /* Show HDL version info */
699 if (cobalt_hdl_info_get(cobalt))
700 cobalt_info("Not able to read the HDL info\n");
701 else
702 cobalt_info("%s", cobalt->hdl_info);
703
704 retval = cobalt_i2c_init(cobalt);
705 if (retval)
706 goto err_pci;
707
708 cobalt_stream_struct_init(cobalt);
709
710 retval = cobalt_subdevs_init(cobalt);
711 if (retval)
712 goto err_i2c;
713
714 if (!(cobalt_read_bar1(cobalt, COBALT_SYS_STAT_BASE) &
715 COBALT_SYSSTAT_HSMA_PRSNTN_MSK)) {
716 retval = cobalt_subdevs_hsma_init(cobalt);
717 if (retval)
718 goto err_i2c;
719 }
720
721 retval = cobalt_nodes_register(cobalt);
722 if (retval) {
723 cobalt_err("Error %d registering device nodes\n", retval);
724 goto err_i2c;
725 }
726 cobalt_set_interrupt(cobalt, true);
727 v4l2_device_call_all(&cobalt->v4l2_dev, 0, core,
728 interrupt_service_routine, 0, NULL);
729
730 cobalt_info("Initialized cobalt card\n");
731
732 cobalt_flash_probe(cobalt);
733
734 return 0;
735
736 err_i2c:
737 cobalt_i2c_exit(cobalt);
738 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 0);
739 err_pci:
740 cobalt_free_msi(cobalt, pci_dev);
741 cobalt_pci_iounmap(cobalt, pci_dev);
742 pci_release_regions(cobalt->pci_dev);
743 pci_disable_device(cobalt->pci_dev);
744 err_wq:
745 destroy_workqueue(cobalt->irq_work_queues);
746 err:
747 cobalt_err("error %d on initialization\n", retval);
748
749 v4l2_device_unregister(&cobalt->v4l2_dev);
750 kfree(cobalt);
751 return retval;
752 }
753
cobalt_remove(struct pci_dev * pci_dev)754 static void cobalt_remove(struct pci_dev *pci_dev)
755 {
756 struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev);
757 struct cobalt *cobalt = to_cobalt(v4l2_dev);
758 int i;
759
760 cobalt_flash_remove(cobalt);
761 cobalt_set_interrupt(cobalt, false);
762 flush_workqueue(cobalt->irq_work_queues);
763 cobalt_nodes_unregister(cobalt);
764 for (i = 0; i < COBALT_NUM_ADAPTERS; i++) {
765 struct v4l2_subdev *sd = cobalt->streams[i].sd;
766 struct i2c_client *client;
767
768 if (sd == NULL)
769 continue;
770 client = v4l2_get_subdevdata(sd);
771 v4l2_device_unregister_subdev(sd);
772 i2c_unregister_device(client);
773 }
774 cobalt_i2c_exit(cobalt);
775 cobalt_free_msi(cobalt, pci_dev);
776 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 0);
777 cobalt_pci_iounmap(cobalt, pci_dev);
778 pci_release_regions(cobalt->pci_dev);
779 pci_disable_device(cobalt->pci_dev);
780 destroy_workqueue(cobalt->irq_work_queues);
781
782 cobalt_info("removed cobalt card\n");
783
784 v4l2_device_unregister(v4l2_dev);
785 kfree(cobalt);
786 }
787
788 /* define a pci_driver for card detection */
789 static struct pci_driver cobalt_pci_driver = {
790 .name = "cobalt",
791 .id_table = cobalt_pci_tbl,
792 .probe = cobalt_probe,
793 .remove = cobalt_remove,
794 };
795
796 module_pci_driver(cobalt_pci_driver);
797
