1 /*
2 * Copyright(c) 2011-2017 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23 #include <linux/debugfs.h>
24 #include <linux/list_sort.h>
25 #include "i915_drv.h"
26 #include "gvt.h"
27
28 struct mmio_diff_param {
29 struct intel_vgpu *vgpu;
30 int total;
31 int diff;
32 struct list_head diff_mmio_list;
33 };
34
35 struct diff_mmio {
36 struct list_head node;
37 u32 offset;
38 u32 preg;
39 u32 vreg;
40 };
41
42 /* Compare two diff_mmio items. */
mmio_offset_compare(void * priv,struct list_head * a,struct list_head * b)43 static int mmio_offset_compare(void *priv,
44 struct list_head *a, struct list_head *b)
45 {
46 struct diff_mmio *ma;
47 struct diff_mmio *mb;
48
49 ma = container_of(a, struct diff_mmio, node);
50 mb = container_of(b, struct diff_mmio, node);
51 if (ma->offset < mb->offset)
52 return -1;
53 else if (ma->offset > mb->offset)
54 return 1;
55 return 0;
56 }
57
mmio_diff_handler(struct intel_gvt * gvt,u32 offset,void * data)58 static inline int mmio_diff_handler(struct intel_gvt *gvt,
59 u32 offset, void *data)
60 {
61 struct drm_i915_private *i915 = gvt->dev_priv;
62 struct mmio_diff_param *param = data;
63 struct diff_mmio *node;
64 u32 preg, vreg;
65
66 preg = intel_uncore_read_notrace(&i915->uncore, _MMIO(offset));
67 vreg = vgpu_vreg(param->vgpu, offset);
68
69 if (preg != vreg) {
70 node = kmalloc(sizeof(*node), GFP_KERNEL);
71 if (!node)
72 return -ENOMEM;
73
74 node->offset = offset;
75 node->preg = preg;
76 node->vreg = vreg;
77 list_add(&node->node, ¶m->diff_mmio_list);
78 param->diff++;
79 }
80 param->total++;
81 return 0;
82 }
83
84 /* Show the all the different values of tracked mmio. */
vgpu_mmio_diff_show(struct seq_file * s,void * unused)85 static int vgpu_mmio_diff_show(struct seq_file *s, void *unused)
86 {
87 struct intel_vgpu *vgpu = s->private;
88 struct intel_gvt *gvt = vgpu->gvt;
89 struct mmio_diff_param param = {
90 .vgpu = vgpu,
91 .total = 0,
92 .diff = 0,
93 };
94 struct diff_mmio *node, *next;
95
96 INIT_LIST_HEAD(¶m.diff_mmio_list);
97
98 mutex_lock(&gvt->lock);
99 spin_lock_bh(&gvt->scheduler.mmio_context_lock);
100
101 mmio_hw_access_pre(gvt->dev_priv);
102 /* Recognize all the diff mmios to list. */
103 intel_gvt_for_each_tracked_mmio(gvt, mmio_diff_handler, ¶m);
104 mmio_hw_access_post(gvt->dev_priv);
105
106 spin_unlock_bh(&gvt->scheduler.mmio_context_lock);
107 mutex_unlock(&gvt->lock);
108
109 /* In an ascending order by mmio offset. */
110 list_sort(NULL, ¶m.diff_mmio_list, mmio_offset_compare);
111
112 seq_printf(s, "%-8s %-8s %-8s %-8s\n", "Offset", "HW", "vGPU", "Diff");
113 list_for_each_entry_safe(node, next, ¶m.diff_mmio_list, node) {
114 u32 diff = node->preg ^ node->vreg;
115
116 seq_printf(s, "%08x %08x %08x %*pbl\n",
117 node->offset, node->preg, node->vreg,
118 32, &diff);
119 list_del(&node->node);
120 kfree(node);
121 }
122 seq_printf(s, "Total: %d, Diff: %d\n", param.total, param.diff);
123 return 0;
124 }
125 DEFINE_SHOW_ATTRIBUTE(vgpu_mmio_diff);
126
127 static int
vgpu_scan_nonprivbb_get(void * data,u64 * val)128 vgpu_scan_nonprivbb_get(void *data, u64 *val)
129 {
130 struct intel_vgpu *vgpu = (struct intel_vgpu *)data;
131 *val = vgpu->scan_nonprivbb;
132 return 0;
133 }
134
135 /*
136 * set/unset bit engine_id of vgpu->scan_nonprivbb to turn on/off scanning
137 * of non-privileged batch buffer. e.g.
138 * if vgpu->scan_nonprivbb=3, then it will scan non-privileged batch buffer
139 * on engine 0 and 1.
140 */
141 static int
vgpu_scan_nonprivbb_set(void * data,u64 val)142 vgpu_scan_nonprivbb_set(void *data, u64 val)
143 {
144 struct intel_vgpu *vgpu = (struct intel_vgpu *)data;
145 struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
146 enum intel_engine_id id;
147 char buf[128], *s;
148 int len;
149
150 val &= (1 << I915_NUM_ENGINES) - 1;
151
152 if (vgpu->scan_nonprivbb == val)
153 return 0;
154
155 if (!val)
156 goto done;
157
158 len = sprintf(buf,
159 "gvt: vgpu %d turns on non-privileged batch buffers scanning on Engines:",
160 vgpu->id);
161
162 s = buf + len;
163
164 for (id = 0; id < I915_NUM_ENGINES; id++) {
165 struct intel_engine_cs *engine;
166
167 engine = dev_priv->engine[id];
168 if (engine && (val & (1 << id))) {
169 len = snprintf(s, 4, "%d, ", engine->id);
170 s += len;
171 } else
172 val &= ~(1 << id);
173 }
174
175 if (val)
176 sprintf(s, "low performance expected.");
177
178 pr_warn("%s\n", buf);
179
180 done:
181 vgpu->scan_nonprivbb = val;
182 return 0;
183 }
184
185 DEFINE_SIMPLE_ATTRIBUTE(vgpu_scan_nonprivbb_fops,
186 vgpu_scan_nonprivbb_get, vgpu_scan_nonprivbb_set,
187 "0x%llx\n");
188
189 /**
190 * intel_gvt_debugfs_add_vgpu - register debugfs entries for a vGPU
191 * @vgpu: a vGPU
192 */
intel_gvt_debugfs_add_vgpu(struct intel_vgpu * vgpu)193 void intel_gvt_debugfs_add_vgpu(struct intel_vgpu *vgpu)
194 {
195 char name[16] = "";
196
197 snprintf(name, 16, "vgpu%d", vgpu->id);
198 vgpu->debugfs = debugfs_create_dir(name, vgpu->gvt->debugfs_root);
199
200 debugfs_create_bool("active", 0444, vgpu->debugfs, &vgpu->active);
201 debugfs_create_file("mmio_diff", 0444, vgpu->debugfs, vgpu,
202 &vgpu_mmio_diff_fops);
203 debugfs_create_file("scan_nonprivbb", 0644, vgpu->debugfs, vgpu,
204 &vgpu_scan_nonprivbb_fops);
205 }
206
207 /**
208 * intel_gvt_debugfs_remove_vgpu - remove debugfs entries of a vGPU
209 * @vgpu: a vGPU
210 */
intel_gvt_debugfs_remove_vgpu(struct intel_vgpu * vgpu)211 void intel_gvt_debugfs_remove_vgpu(struct intel_vgpu *vgpu)
212 {
213 debugfs_remove_recursive(vgpu->debugfs);
214 vgpu->debugfs = NULL;
215 }
216
217 /**
218 * intel_gvt_debugfs_init - register gvt debugfs root entry
219 * @gvt: GVT device
220 */
intel_gvt_debugfs_init(struct intel_gvt * gvt)221 void intel_gvt_debugfs_init(struct intel_gvt *gvt)
222 {
223 struct drm_minor *minor = gvt->dev_priv->drm.primary;
224
225 gvt->debugfs_root = debugfs_create_dir("gvt", minor->debugfs_root);
226
227 debugfs_create_ulong("num_tracked_mmio", 0444, gvt->debugfs_root,
228 &gvt->mmio.num_tracked_mmio);
229 }
230
231 /**
232 * intel_gvt_debugfs_clean - remove debugfs entries
233 * @gvt: GVT device
234 */
intel_gvt_debugfs_clean(struct intel_gvt * gvt)235 void intel_gvt_debugfs_clean(struct intel_gvt *gvt)
236 {
237 debugfs_remove_recursive(gvt->debugfs_root);
238 gvt->debugfs_root = NULL;
239 }
240