1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2014-2019 Intel Corporation 4 */ 5 6 #ifndef _INTEL_GUC_SUBMISSION_H_ 7 #define _INTEL_GUC_SUBMISSION_H_ 8 9 #include <linux/spinlock.h> 10 11 #include "gt/intel_engine_types.h" 12 13 #include "i915_gem.h" 14 #include "i915_selftest.h" 15 16 struct drm_i915_private; 17 18 /* 19 * This structure primarily describes the GEM object shared with the GuC. 20 * The specs sometimes refer to this object as a "GuC context", but we use 21 * the term "client" to avoid confusion with hardware contexts. This 22 * GEM object is held for the entire lifetime of our interaction with 23 * the GuC, being allocated before the GuC is loaded with its firmware. 24 * Because there's no way to update the address used by the GuC after 25 * initialisation, the shared object must stay pinned into the GGTT as 26 * long as the GuC is in use. We also keep the first page (only) mapped 27 * into kernel address space, as it includes shared data that must be 28 * updated on every request submission. 29 * 30 * The single GEM object described here is actually made up of several 31 * separate areas, as far as the GuC is concerned. The first page (kept 32 * kmap'd) includes the "process descriptor" which holds sequence data for 33 * the doorbell, and one cacheline which actually *is* the doorbell; a 34 * write to this will "ring the doorbell" (i.e. send an interrupt to the 35 * GuC). The subsequent pages of the client object constitute the work 36 * queue (a circular array of work items), again described in the process 37 * descriptor. Work queue pages are mapped momentarily as required. 38 */ 39 struct intel_guc_client { 40 struct i915_vma *vma; 41 void *vaddr; 42 struct intel_guc *guc; 43 44 /* bitmap of (host) engine ids */ 45 u32 priority; 46 u32 stage_id; 47 u32 proc_desc_offset; 48 49 u16 doorbell_id; 50 unsigned long doorbell_offset; 51 52 /* Protects GuC client's WQ access */ 53 spinlock_t wq_lock; 54 55 /* For testing purposes, use nop WQ items instead of real ones */ 56 I915_SELFTEST_DECLARE(bool use_nop_wqi); 57 }; 58 59 void intel_guc_submission_init_early(struct intel_guc *guc); 60 int intel_guc_submission_init(struct intel_guc *guc); 61 int intel_guc_submission_enable(struct intel_guc *guc); 62 void intel_guc_submission_disable(struct intel_guc *guc); 63 void intel_guc_submission_fini(struct intel_guc *guc); 64 int intel_guc_preempt_work_create(struct intel_guc *guc); 65 void intel_guc_preempt_work_destroy(struct intel_guc *guc); 66 67 #endif 68
