1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_HUBP_H__ 27 #define __DAL_HUBP_H__ 28 29 #include "mem_input.h" 30 31 #define OPP_ID_INVALID 0xf 32 33 34 enum cursor_pitch { 35 CURSOR_PITCH_64_PIXELS = 0, 36 CURSOR_PITCH_128_PIXELS, 37 CURSOR_PITCH_256_PIXELS 38 }; 39 40 enum cursor_lines_per_chunk { 41 #if defined(CONFIG_DRM_AMD_DC_DCN2_0) 42 CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */ 43 #endif 44 CURSOR_LINE_PER_CHUNK_2 = 1, 45 CURSOR_LINE_PER_CHUNK_4, 46 CURSOR_LINE_PER_CHUNK_8, 47 CURSOR_LINE_PER_CHUNK_16 48 }; 49 50 enum hubp_ind_block_size { 51 hubp_ind_block_unconstrained = 0, 52 hubp_ind_block_64b, 53 }; 54 55 struct hubp { 56 const struct hubp_funcs *funcs; 57 struct dc_context *ctx; 58 struct dc_plane_address request_address; 59 int inst; 60 61 /* run time states */ 62 int opp_id; 63 int mpcc_id; 64 struct dc_cursor_attributes curs_attr; 65 bool power_gated; 66 }; 67 68 struct hubp_funcs { 69 void (*hubp_setup)( 70 struct hubp *hubp, 71 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 72 struct _vcs_dpi_display_ttu_regs_st *ttu_regs, 73 struct _vcs_dpi_display_rq_regs_st *rq_regs, 74 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest); 75 76 void (*hubp_setup_interdependent)( 77 struct hubp *hubp, 78 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 79 struct _vcs_dpi_display_ttu_regs_st *ttu_regs); 80 81 void (*dcc_control)(struct hubp *hubp, bool enable, 82 enum hubp_ind_block_size blk_size); 83 84 void (*mem_program_viewport)( 85 struct hubp *hubp, 86 const struct rect *viewport, 87 const struct rect *viewport_c); 88 89 bool (*hubp_program_surface_flip_and_addr)( 90 struct hubp *hubp, 91 const struct dc_plane_address *address, 92 bool flip_immediate); 93 94 void (*hubp_program_pte_vm)( 95 struct hubp *hubp, 96 enum surface_pixel_format format, 97 union dc_tiling_info *tiling_info, 98 enum dc_rotation_angle rotation); 99 100 void (*hubp_set_vm_system_aperture_settings)( 101 struct hubp *hubp, 102 struct vm_system_aperture_param *apt); 103 104 void (*hubp_set_vm_context0_settings)( 105 struct hubp *hubp, 106 const struct vm_context0_param *vm0); 107 108 void (*hubp_program_surface_config)( 109 struct hubp *hubp, 110 enum surface_pixel_format format, 111 union dc_tiling_info *tiling_info, 112 struct plane_size *plane_size, 113 enum dc_rotation_angle rotation, 114 struct dc_plane_dcc_param *dcc, 115 bool horizontal_mirror, 116 unsigned int compa_level); 117 118 bool (*hubp_is_flip_pending)(struct hubp *hubp); 119 120 void (*set_blank)(struct hubp *hubp, bool blank); 121 void (*set_hubp_blank_en)(struct hubp *hubp, bool blank); 122 123 void (*set_cursor_attributes)( 124 struct hubp *hubp, 125 const struct dc_cursor_attributes *attr); 126 127 void (*set_cursor_position)( 128 struct hubp *hubp, 129 const struct dc_cursor_position *pos, 130 const struct dc_cursor_mi_param *param); 131 132 void (*hubp_disconnect)(struct hubp *hubp); 133 134 void (*hubp_clk_cntl)(struct hubp *hubp, bool enable); 135 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst); 136 void (*hubp_read_state)(struct hubp *hubp); 137 void (*hubp_clear_underflow)(struct hubp *hubp); 138 void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp); 139 unsigned int (*hubp_get_underflow_status)(struct hubp *hubp); 140 void (*hubp_init)(struct hubp *hubp); 141 142 #if defined(CONFIG_DRM_AMD_DC_DCN2_0) 143 void (*dmdata_set_attributes)( 144 struct hubp *hubp, 145 const struct dc_dmdata_attributes *attr); 146 147 void (*dmdata_load)( 148 struct hubp *hubp, 149 uint32_t dmdata_sw_size, 150 const uint32_t *dmdata_sw_data); 151 bool (*dmdata_status_done)(struct hubp *hubp); 152 void (*hubp_enable_tripleBuffer)( 153 struct hubp *hubp, 154 bool enable); 155 156 bool (*hubp_is_triplebuffer_enabled)( 157 struct hubp *hubp); 158 159 void (*hubp_set_flip_control_surface_gsl)( 160 struct hubp *hubp, 161 bool enable); 162 #endif 163 164 }; 165 166 #endif 167
