1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
4 *
5 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
6 */
7
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/cpufreq.h>
12 #include <linux/timex.h>
13
14 #include <asm/msr.h>
15 #include <asm/processor.h>
16 #include <asm/cpu_device_id.h>
17
18 static struct cpufreq_driver longrun_driver;
19
20 /**
21 * longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
22 * values into per cent values. In TMTA microcode, the following is valid:
23 * performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
24 */
25 static unsigned int longrun_low_freq, longrun_high_freq;
26
27
28 /**
29 * longrun_get_policy - get the current LongRun policy
30 * @policy: struct cpufreq_policy where current policy is written into
31 *
32 * Reads the current LongRun policy by access to MSR_TMTA_LONGRUN_FLAGS
33 * and MSR_TMTA_LONGRUN_CTRL
34 */
longrun_get_policy(struct cpufreq_policy * policy)35 static void longrun_get_policy(struct cpufreq_policy *policy)
36 {
37 u32 msr_lo, msr_hi;
38
39 rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
40 pr_debug("longrun flags are %x - %x\n", msr_lo, msr_hi);
41 if (msr_lo & 0x01)
42 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
43 else
44 policy->policy = CPUFREQ_POLICY_POWERSAVE;
45
46 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
47 pr_debug("longrun ctrl is %x - %x\n", msr_lo, msr_hi);
48 msr_lo &= 0x0000007F;
49 msr_hi &= 0x0000007F;
50
51 if (longrun_high_freq <= longrun_low_freq) {
52 /* Assume degenerate Longrun table */
53 policy->min = policy->max = longrun_high_freq;
54 } else {
55 policy->min = longrun_low_freq + msr_lo *
56 ((longrun_high_freq - longrun_low_freq) / 100);
57 policy->max = longrun_low_freq + msr_hi *
58 ((longrun_high_freq - longrun_low_freq) / 100);
59 }
60 policy->cpu = 0;
61 }
62
63
64 /**
65 * longrun_set_policy - sets a new CPUFreq policy
66 * @policy: new policy
67 *
68 * Sets a new CPUFreq policy on LongRun-capable processors. This function
69 * has to be called with cpufreq_driver locked.
70 */
longrun_set_policy(struct cpufreq_policy * policy)71 static int longrun_set_policy(struct cpufreq_policy *policy)
72 {
73 u32 msr_lo, msr_hi;
74 u32 pctg_lo, pctg_hi;
75
76 if (!policy)
77 return -EINVAL;
78
79 if (longrun_high_freq <= longrun_low_freq) {
80 /* Assume degenerate Longrun table */
81 pctg_lo = pctg_hi = 100;
82 } else {
83 pctg_lo = (policy->min - longrun_low_freq) /
84 ((longrun_high_freq - longrun_low_freq) / 100);
85 pctg_hi = (policy->max - longrun_low_freq) /
86 ((longrun_high_freq - longrun_low_freq) / 100);
87 }
88
89 if (pctg_hi > 100)
90 pctg_hi = 100;
91 if (pctg_lo > pctg_hi)
92 pctg_lo = pctg_hi;
93
94 /* performance or economy mode */
95 rdmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
96 msr_lo &= 0xFFFFFFFE;
97 switch (policy->policy) {
98 case CPUFREQ_POLICY_PERFORMANCE:
99 msr_lo |= 0x00000001;
100 break;
101 case CPUFREQ_POLICY_POWERSAVE:
102 break;
103 }
104 wrmsr(MSR_TMTA_LONGRUN_FLAGS, msr_lo, msr_hi);
105
106 /* lower and upper boundary */
107 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
108 msr_lo &= 0xFFFFFF80;
109 msr_hi &= 0xFFFFFF80;
110 msr_lo |= pctg_lo;
111 msr_hi |= pctg_hi;
112 wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
113
114 return 0;
115 }
116
117
118 /**
119 * longrun_verify_poliy - verifies a new CPUFreq policy
120 * @policy: the policy to verify
121 *
122 * Validates a new CPUFreq policy. This function has to be called with
123 * cpufreq_driver locked.
124 */
longrun_verify_policy(struct cpufreq_policy * policy)125 static int longrun_verify_policy(struct cpufreq_policy *policy)
126 {
127 if (!policy)
128 return -EINVAL;
129
130 policy->cpu = 0;
131 cpufreq_verify_within_cpu_limits(policy);
132
133 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
134 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
135 return -EINVAL;
136
137 return 0;
138 }
139
longrun_get(unsigned int cpu)140 static unsigned int longrun_get(unsigned int cpu)
141 {
142 u32 eax, ebx, ecx, edx;
143
144 if (cpu)
145 return 0;
146
147 cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
148 pr_debug("cpuid eax is %u\n", eax);
149
150 return eax * 1000;
151 }
152
153 /**
154 * longrun_determine_freqs - determines the lowest and highest possible core frequency
155 * @low_freq: an int to put the lowest frequency into
156 * @high_freq: an int to put the highest frequency into
157 *
158 * Determines the lowest and highest possible core frequencies on this CPU.
159 * This is necessary to calculate the performance percentage according to
160 * TMTA rules:
161 * performance_pctg = (target_freq - low_freq)/(high_freq - low_freq)
162 */
longrun_determine_freqs(unsigned int * low_freq,unsigned int * high_freq)163 static int longrun_determine_freqs(unsigned int *low_freq,
164 unsigned int *high_freq)
165 {
166 u32 msr_lo, msr_hi;
167 u32 save_lo, save_hi;
168 u32 eax, ebx, ecx, edx;
169 u32 try_hi;
170 struct cpuinfo_x86 *c = &cpu_data(0);
171
172 if (!low_freq || !high_freq)
173 return -EINVAL;
174
175 if (cpu_has(c, X86_FEATURE_LRTI)) {
176 /* if the LongRun Table Interface is present, the
177 * detection is a bit easier:
178 * For minimum frequency, read out the maximum
179 * level (msr_hi), write that into "currently
180 * selected level", and read out the frequency.
181 * For maximum frequency, read out level zero.
182 */
183 /* minimum */
184 rdmsr(MSR_TMTA_LRTI_READOUT, msr_lo, msr_hi);
185 wrmsr(MSR_TMTA_LRTI_READOUT, msr_hi, msr_hi);
186 rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
187 *low_freq = msr_lo * 1000; /* to kHz */
188
189 /* maximum */
190 wrmsr(MSR_TMTA_LRTI_READOUT, 0, msr_hi);
191 rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
192 *high_freq = msr_lo * 1000; /* to kHz */
193
194 pr_debug("longrun table interface told %u - %u kHz\n",
195 *low_freq, *high_freq);
196
197 if (*low_freq > *high_freq)
198 *low_freq = *high_freq;
199 return 0;
200 }
201
202 /* set the upper border to the value determined during TSC init */
203 *high_freq = (cpu_khz / 1000);
204 *high_freq = *high_freq * 1000;
205 pr_debug("high frequency is %u kHz\n", *high_freq);
206
207 /* get current borders */
208 rdmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
209 save_lo = msr_lo & 0x0000007F;
210 save_hi = msr_hi & 0x0000007F;
211
212 /* if current perf_pctg is larger than 90%, we need to decrease the
213 * upper limit to make the calculation more accurate.
214 */
215 cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
216 /* try decreasing in 10% steps, some processors react only
217 * on some barrier values */
218 for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
219 /* set to 0 to try_hi perf_pctg */
220 msr_lo &= 0xFFFFFF80;
221 msr_hi &= 0xFFFFFF80;
222 msr_hi |= try_hi;
223 wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
224
225 /* read out current core MHz and current perf_pctg */
226 cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
227
228 /* restore values */
229 wrmsr(MSR_TMTA_LONGRUN_CTRL, save_lo, save_hi);
230 }
231 pr_debug("percentage is %u %%, freq is %u MHz\n", ecx, eax);
232
233 /* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
234 * eqals
235 * low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
236 *
237 * high_freq * perf_pctg is stored tempoarily into "ebx".
238 */
239 ebx = (((cpu_khz / 1000) * ecx) / 100); /* to MHz */
240
241 if ((ecx > 95) || (ecx == 0) || (eax < ebx))
242 return -EIO;
243
244 edx = ((eax - ebx) * 100) / (100 - ecx);
245 *low_freq = edx * 1000; /* back to kHz */
246
247 pr_debug("low frequency is %u kHz\n", *low_freq);
248
249 if (*low_freq > *high_freq)
250 *low_freq = *high_freq;
251
252 return 0;
253 }
254
255
longrun_cpu_init(struct cpufreq_policy * policy)256 static int longrun_cpu_init(struct cpufreq_policy *policy)
257 {
258 int result = 0;
259
260 /* capability check */
261 if (policy->cpu != 0)
262 return -ENODEV;
263
264 /* detect low and high frequency */
265 result = longrun_determine_freqs(&longrun_low_freq, &longrun_high_freq);
266 if (result)
267 return result;
268
269 /* cpuinfo and default policy values */
270 policy->cpuinfo.min_freq = longrun_low_freq;
271 policy->cpuinfo.max_freq = longrun_high_freq;
272 longrun_get_policy(policy);
273
274 return 0;
275 }
276
277
278 static struct cpufreq_driver longrun_driver = {
279 .flags = CPUFREQ_CONST_LOOPS,
280 .verify = longrun_verify_policy,
281 .setpolicy = longrun_set_policy,
282 .get = longrun_get,
283 .init = longrun_cpu_init,
284 .name = "longrun",
285 };
286
287 static const struct x86_cpu_id longrun_ids[] = {
288 { X86_VENDOR_TRANSMETA, X86_FAMILY_ANY, X86_MODEL_ANY,
289 X86_FEATURE_LONGRUN },
290 {}
291 };
292 MODULE_DEVICE_TABLE(x86cpu, longrun_ids);
293
294 /**
295 * longrun_init - initializes the Transmeta Crusoe LongRun CPUFreq driver
296 *
297 * Initializes the LongRun support.
298 */
longrun_init(void)299 static int __init longrun_init(void)
300 {
301 if (!x86_match_cpu(longrun_ids))
302 return -ENODEV;
303 return cpufreq_register_driver(&longrun_driver);
304 }
305
306
307 /**
308 * longrun_exit - unregisters LongRun support
309 */
longrun_exit(void)310 static void __exit longrun_exit(void)
311 {
312 cpufreq_unregister_driver(&longrun_driver);
313 }
314
315
316 MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
317 MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
318 "Efficeon processors.");
319 MODULE_LICENSE("GPL");
320
321 module_init(longrun_init);
322 module_exit(longrun_exit);
323