1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * linux/arch/unicore32/mm/tlb-ucv2.S
4 *
5 * Code specific to PKUnity SoC and UniCore ISA
6 *
7 * Copyright (C) 2001-2010 GUAN Xue-tao
8 */
9#include <linux/init.h>
10#include <linux/linkage.h>
11#include <asm/assembler.h>
12#include <asm/page.h>
13#include <asm/tlbflush.h>
14#include "proc-macros.S"
15
16/*
17 *	__cpu_flush_user_tlb_range(start, end, vma)
18 *
19 *	Invalidate a range of TLB entries in the specified address space.
20 *
21 *	- start - start address (may not be aligned)
22 *	- end   - end address (exclusive, may not be aligned)
23 *	- vma   - vma_struct describing address range
24 */
25ENTRY(__cpu_flush_user_tlb_range)
26#ifndef	CONFIG_CPU_TLB_SINGLE_ENTRY_DISABLE
27	mov	r0, r0 >> #PAGE_SHIFT		@ align address
28	mov	r0, r0 << #PAGE_SHIFT
29	vma_vm_flags r2, r2			@ get vma->vm_flags
301:
31	movc	p0.c6, r0, #3
32	nop8
33
34	cand.a	r2, #VM_EXEC			@ Executable area ?
35	beq	2f
36
37	movc	p0.c6, r0, #5
38	nop8
392:
40	add	r0, r0, #PAGE_SZ
41	csub.a	r0, r1
42	beb	1b
43#else
44	movc	p0.c6, r0, #2
45	nop8
46
47	cand.a	r2, #VM_EXEC			@ Executable area ?
48	beq	2f
49
50	movc	p0.c6, r0, #4
51	nop8
522:
53#endif
54	mov	pc, lr
55
56/*
57 *	__cpu_flush_kern_tlb_range(start,end)
58 *
59 *	Invalidate a range of kernel TLB entries
60 *
61 *	- start - start address (may not be aligned)
62 *	- end   - end address (exclusive, may not be aligned)
63 */
64ENTRY(__cpu_flush_kern_tlb_range)
65#ifndef	CONFIG_CPU_TLB_SINGLE_ENTRY_DISABLE
66	mov	r0, r0 >> #PAGE_SHIFT		@ align address
67	mov	r0, r0 << #PAGE_SHIFT
681:
69	movc	p0.c6, r0, #3
70	nop8
71
72	movc	p0.c6, r0, #5
73	nop8
74
75	add	r0, r0, #PAGE_SZ
76	csub.a	r0, r1
77	beb	1b
78#else
79	movc	p0.c6, r0, #2
80	nop8
81
82	movc	p0.c6, r0, #4
83	nop8
84#endif
85	mov	pc, lr
86
87