1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support
4  *
5  * This file handles the board specific parts of the Cayman interrupt system
6  *
7  * Copyright (C) 2002 Stuart Menefy
8  */
9 #include <linux/io.h>
10 #include <linux/irq.h>
11 #include <linux/interrupt.h>
12 #include <linux/signal.h>
13 #include <cpu/irq.h>
14 #include <asm/page.h>
15 
16 /* Setup for the SMSC FDC37C935 / LAN91C100FD */
17 #define SMSC_IRQ         IRQ_IRL1
18 
19 /* Setup for PCI Bus 2, which transmits interrupts via the EPLD */
20 #define PCI2_IRQ         IRQ_IRL3
21 
22 unsigned long epld_virt;
23 
24 #define EPLD_BASE        0x04002000
25 #define EPLD_STATUS_BASE (epld_virt + 0x10)
26 #define EPLD_MASK_BASE   (epld_virt + 0x20)
27 
28 /* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto
29    the same SH-5 interrupt */
30 
cayman_interrupt_smsc(int irq,void * dev_id)31 static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id)
32 {
33         printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n");
34 	return IRQ_NONE;
35 }
36 
cayman_interrupt_pci2(int irq,void * dev_id)37 static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id)
38 {
39         printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq);
40 	return IRQ_NONE;
41 }
42 
43 static struct irqaction cayman_action_smsc = {
44 	.name		= "Cayman SMSC Mux",
45 	.handler	= cayman_interrupt_smsc,
46 };
47 
48 static struct irqaction cayman_action_pci2 = {
49 	.name		= "Cayman PCI2 Mux",
50 	.handler	= cayman_interrupt_pci2,
51 };
52 
enable_cayman_irq(struct irq_data * data)53 static void enable_cayman_irq(struct irq_data *data)
54 {
55 	unsigned int irq = data->irq;
56 	unsigned long flags;
57 	unsigned long mask;
58 	unsigned int reg;
59 	unsigned char bit;
60 
61 	irq -= START_EXT_IRQS;
62 	reg = EPLD_MASK_BASE + ((irq / 8) << 2);
63 	bit = 1<<(irq % 8);
64 	local_irq_save(flags);
65 	mask = __raw_readl(reg);
66 	mask |= bit;
67 	__raw_writel(mask, reg);
68 	local_irq_restore(flags);
69 }
70 
disable_cayman_irq(struct irq_data * data)71 static void disable_cayman_irq(struct irq_data *data)
72 {
73 	unsigned int irq = data->irq;
74 	unsigned long flags;
75 	unsigned long mask;
76 	unsigned int reg;
77 	unsigned char bit;
78 
79 	irq -= START_EXT_IRQS;
80 	reg = EPLD_MASK_BASE + ((irq / 8) << 2);
81 	bit = 1<<(irq % 8);
82 	local_irq_save(flags);
83 	mask = __raw_readl(reg);
84 	mask &= ~bit;
85 	__raw_writel(mask, reg);
86 	local_irq_restore(flags);
87 }
88 
89 struct irq_chip cayman_irq_type = {
90 	.name		= "Cayman-IRQ",
91 	.irq_unmask	= enable_cayman_irq,
92 	.irq_mask	= disable_cayman_irq,
93 };
94 
cayman_irq_demux(int evt)95 int cayman_irq_demux(int evt)
96 {
97 	int irq = intc_evt_to_irq[evt];
98 
99 	if (irq == SMSC_IRQ) {
100 		unsigned long status;
101 		int i;
102 
103 		status = __raw_readl(EPLD_STATUS_BASE) &
104 			 __raw_readl(EPLD_MASK_BASE) & 0xff;
105 		if (status == 0) {
106 			irq = -1;
107 		} else {
108 			for (i=0; i<8; i++) {
109 				if (status & (1<<i))
110 					break;
111 			}
112 			irq = START_EXT_IRQS + i;
113 		}
114 	}
115 
116 	if (irq == PCI2_IRQ) {
117 		unsigned long status;
118 		int i;
119 
120 		status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
121 			 __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
122 		if (status == 0) {
123 			irq = -1;
124 		} else {
125 			for (i=0; i<8; i++) {
126 				if (status & (1<<i))
127 					break;
128 			}
129 			irq = START_EXT_IRQS + (3 * 8) + i;
130 		}
131 	}
132 
133 	return irq;
134 }
135 
init_cayman_irq(void)136 void init_cayman_irq(void)
137 {
138 	int i;
139 
140 	epld_virt = (unsigned long)ioremap_nocache(EPLD_BASE, 1024);
141 	if (!epld_virt) {
142 		printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n");
143 		return;
144 	}
145 
146 	for (i = 0; i < NR_EXT_IRQS; i++) {
147 		irq_set_chip_and_handler(START_EXT_IRQS + i,
148 					 &cayman_irq_type, handle_level_irq);
149 	}
150 
151 	/* Setup the SMSC interrupt */
152 	setup_irq(SMSC_IRQ, &cayman_action_smsc);
153 	setup_irq(PCI2_IRQ, &cayman_action_pci2);
154 }
155