1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * SMP initialisation and IPI support
4 * Based on arch/arm64/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Regents of the University of California
8 * Copyright (C) 2017 SiFive
9 */
10
11 #include <linux/cpu.h>
12 #include <linux/interrupt.h>
13 #include <linux/profile.h>
14 #include <linux/smp.h>
15 #include <linux/sched.h>
16 #include <linux/seq_file.h>
17 #include <linux/delay.h>
18
19 #include <asm/sbi.h>
20 #include <asm/tlbflush.h>
21 #include <asm/cacheflush.h>
22
23 enum ipi_message_type {
24 IPI_RESCHEDULE,
25 IPI_CALL_FUNC,
26 IPI_CPU_STOP,
27 IPI_MAX
28 };
29
30 unsigned long __cpuid_to_hartid_map[NR_CPUS] = {
31 [0 ... NR_CPUS-1] = INVALID_HARTID
32 };
33
smp_setup_processor_id(void)34 void __init smp_setup_processor_id(void)
35 {
36 cpuid_to_hartid_map(0) = boot_cpu_hartid;
37 }
38
39 /* A collection of single bit ipi messages. */
40 static struct {
41 unsigned long stats[IPI_MAX] ____cacheline_aligned;
42 unsigned long bits ____cacheline_aligned;
43 } ipi_data[NR_CPUS] __cacheline_aligned;
44
riscv_hartid_to_cpuid(int hartid)45 int riscv_hartid_to_cpuid(int hartid)
46 {
47 int i;
48
49 for (i = 0; i < NR_CPUS; i++)
50 if (cpuid_to_hartid_map(i) == hartid)
51 return i;
52
53 pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
54 return i;
55 }
56
riscv_cpuid_to_hartid_mask(const struct cpumask * in,struct cpumask * out)57 void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
58 {
59 int cpu;
60
61 cpumask_clear(out);
62 for_each_cpu(cpu, in)
63 cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
64 }
65
arch_match_cpu_phys_id(int cpu,u64 phys_id)66 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
67 {
68 return phys_id == cpuid_to_hartid_map(cpu);
69 }
70
71 /* Unsupported */
setup_profiling_timer(unsigned int multiplier)72 int setup_profiling_timer(unsigned int multiplier)
73 {
74 return -EINVAL;
75 }
76
ipi_stop(void)77 static void ipi_stop(void)
78 {
79 set_cpu_online(smp_processor_id(), false);
80 while (1)
81 wait_for_interrupt();
82 }
83
send_ipi_mask(const struct cpumask * mask,enum ipi_message_type op)84 static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
85 {
86 struct cpumask hartid_mask;
87 int cpu;
88
89 smp_mb__before_atomic();
90 for_each_cpu(cpu, mask)
91 set_bit(op, &ipi_data[cpu].bits);
92 smp_mb__after_atomic();
93
94 riscv_cpuid_to_hartid_mask(mask, &hartid_mask);
95 sbi_send_ipi(cpumask_bits(&hartid_mask));
96 }
97
send_ipi_single(int cpu,enum ipi_message_type op)98 static void send_ipi_single(int cpu, enum ipi_message_type op)
99 {
100 int hartid = cpuid_to_hartid_map(cpu);
101
102 smp_mb__before_atomic();
103 set_bit(op, &ipi_data[cpu].bits);
104 smp_mb__after_atomic();
105
106 sbi_send_ipi(cpumask_bits(cpumask_of(hartid)));
107 }
108
clear_ipi(void)109 static inline void clear_ipi(void)
110 {
111 csr_clear(CSR_SIP, SIE_SSIE);
112 }
113
riscv_software_interrupt(void)114 void riscv_software_interrupt(void)
115 {
116 unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
117 unsigned long *stats = ipi_data[smp_processor_id()].stats;
118
119 clear_ipi();
120
121 while (true) {
122 unsigned long ops;
123
124 /* Order bit clearing and data access. */
125 mb();
126
127 ops = xchg(pending_ipis, 0);
128 if (ops == 0)
129 return;
130
131 if (ops & (1 << IPI_RESCHEDULE)) {
132 stats[IPI_RESCHEDULE]++;
133 scheduler_ipi();
134 }
135
136 if (ops & (1 << IPI_CALL_FUNC)) {
137 stats[IPI_CALL_FUNC]++;
138 generic_smp_call_function_interrupt();
139 }
140
141 if (ops & (1 << IPI_CPU_STOP)) {
142 stats[IPI_CPU_STOP]++;
143 ipi_stop();
144 }
145
146 BUG_ON((ops >> IPI_MAX) != 0);
147
148 /* Order data access and bit testing. */
149 mb();
150 }
151 }
152
153 static const char * const ipi_names[] = {
154 [IPI_RESCHEDULE] = "Rescheduling interrupts",
155 [IPI_CALL_FUNC] = "Function call interrupts",
156 [IPI_CPU_STOP] = "CPU stop interrupts",
157 };
158
show_ipi_stats(struct seq_file * p,int prec)159 void show_ipi_stats(struct seq_file *p, int prec)
160 {
161 unsigned int cpu, i;
162
163 for (i = 0; i < IPI_MAX; i++) {
164 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
165 prec >= 4 ? " " : "");
166 for_each_online_cpu(cpu)
167 seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]);
168 seq_printf(p, " %s\n", ipi_names[i]);
169 }
170 }
171
arch_send_call_function_ipi_mask(struct cpumask * mask)172 void arch_send_call_function_ipi_mask(struct cpumask *mask)
173 {
174 send_ipi_mask(mask, IPI_CALL_FUNC);
175 }
176
arch_send_call_function_single_ipi(int cpu)177 void arch_send_call_function_single_ipi(int cpu)
178 {
179 send_ipi_single(cpu, IPI_CALL_FUNC);
180 }
181
smp_send_stop(void)182 void smp_send_stop(void)
183 {
184 unsigned long timeout;
185
186 if (num_online_cpus() > 1) {
187 cpumask_t mask;
188
189 cpumask_copy(&mask, cpu_online_mask);
190 cpumask_clear_cpu(smp_processor_id(), &mask);
191
192 if (system_state <= SYSTEM_RUNNING)
193 pr_crit("SMP: stopping secondary CPUs\n");
194 send_ipi_mask(&mask, IPI_CPU_STOP);
195 }
196
197 /* Wait up to one second for other CPUs to stop */
198 timeout = USEC_PER_SEC;
199 while (num_online_cpus() > 1 && timeout--)
200 udelay(1);
201
202 if (num_online_cpus() > 1)
203 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
204 cpumask_pr_args(cpu_online_mask));
205 }
206
smp_send_reschedule(int cpu)207 void smp_send_reschedule(int cpu)
208 {
209 send_ipi_single(cpu, IPI_RESCHEDULE);
210 }
211 EXPORT_SYMBOL_GPL(smp_send_reschedule);
212
