1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * ppc64 "iomap" interface implementation.
4  *
5  * (C) Copyright 2004 Linus Torvalds
6  */
7 #include <linux/pci.h>
8 #include <linux/mm.h>
9 #include <linux/export.h>
10 #include <asm/io.h>
11 #include <asm/pci-bridge.h>
12 #include <asm/isa-bridge.h>
13 
14 /*
15  * Here comes the ppc64 implementation of the IOMAP
16  * interfaces.
17  */
ioread8(void __iomem * addr)18 unsigned int ioread8(void __iomem *addr)
19 {
20 	return readb(addr);
21 }
ioread16(void __iomem * addr)22 unsigned int ioread16(void __iomem *addr)
23 {
24 	return readw(addr);
25 }
ioread16be(void __iomem * addr)26 unsigned int ioread16be(void __iomem *addr)
27 {
28 	return readw_be(addr);
29 }
ioread32(void __iomem * addr)30 unsigned int ioread32(void __iomem *addr)
31 {
32 	return readl(addr);
33 }
ioread32be(void __iomem * addr)34 unsigned int ioread32be(void __iomem *addr)
35 {
36 	return readl_be(addr);
37 }
38 EXPORT_SYMBOL(ioread8);
39 EXPORT_SYMBOL(ioread16);
40 EXPORT_SYMBOL(ioread16be);
41 EXPORT_SYMBOL(ioread32);
42 EXPORT_SYMBOL(ioread32be);
43 #ifdef __powerpc64__
ioread64(void __iomem * addr)44 u64 ioread64(void __iomem *addr)
45 {
46 	return readq(addr);
47 }
ioread64_lo_hi(void __iomem * addr)48 u64 ioread64_lo_hi(void __iomem *addr)
49 {
50 	return readq(addr);
51 }
ioread64_hi_lo(void __iomem * addr)52 u64 ioread64_hi_lo(void __iomem *addr)
53 {
54 	return readq(addr);
55 }
ioread64be(void __iomem * addr)56 u64 ioread64be(void __iomem *addr)
57 {
58 	return readq_be(addr);
59 }
ioread64be_lo_hi(void __iomem * addr)60 u64 ioread64be_lo_hi(void __iomem *addr)
61 {
62 	return readq_be(addr);
63 }
ioread64be_hi_lo(void __iomem * addr)64 u64 ioread64be_hi_lo(void __iomem *addr)
65 {
66 	return readq_be(addr);
67 }
68 EXPORT_SYMBOL(ioread64);
69 EXPORT_SYMBOL(ioread64_lo_hi);
70 EXPORT_SYMBOL(ioread64_hi_lo);
71 EXPORT_SYMBOL(ioread64be);
72 EXPORT_SYMBOL(ioread64be_lo_hi);
73 EXPORT_SYMBOL(ioread64be_hi_lo);
74 #endif /* __powerpc64__ */
75 
iowrite8(u8 val,void __iomem * addr)76 void iowrite8(u8 val, void __iomem *addr)
77 {
78 	writeb(val, addr);
79 }
iowrite16(u16 val,void __iomem * addr)80 void iowrite16(u16 val, void __iomem *addr)
81 {
82 	writew(val, addr);
83 }
iowrite16be(u16 val,void __iomem * addr)84 void iowrite16be(u16 val, void __iomem *addr)
85 {
86 	writew_be(val, addr);
87 }
iowrite32(u32 val,void __iomem * addr)88 void iowrite32(u32 val, void __iomem *addr)
89 {
90 	writel(val, addr);
91 }
iowrite32be(u32 val,void __iomem * addr)92 void iowrite32be(u32 val, void __iomem *addr)
93 {
94 	writel_be(val, addr);
95 }
96 EXPORT_SYMBOL(iowrite8);
97 EXPORT_SYMBOL(iowrite16);
98 EXPORT_SYMBOL(iowrite16be);
99 EXPORT_SYMBOL(iowrite32);
100 EXPORT_SYMBOL(iowrite32be);
101 #ifdef __powerpc64__
iowrite64(u64 val,void __iomem * addr)102 void iowrite64(u64 val, void __iomem *addr)
103 {
104 	writeq(val, addr);
105 }
iowrite64_lo_hi(u64 val,void __iomem * addr)106 void iowrite64_lo_hi(u64 val, void __iomem *addr)
107 {
108 	writeq(val, addr);
109 }
iowrite64_hi_lo(u64 val,void __iomem * addr)110 void iowrite64_hi_lo(u64 val, void __iomem *addr)
111 {
112 	writeq(val, addr);
113 }
iowrite64be(u64 val,void __iomem * addr)114 void iowrite64be(u64 val, void __iomem *addr)
115 {
116 	writeq_be(val, addr);
117 }
iowrite64be_lo_hi(u64 val,void __iomem * addr)118 void iowrite64be_lo_hi(u64 val, void __iomem *addr)
119 {
120 	writeq_be(val, addr);
121 }
iowrite64be_hi_lo(u64 val,void __iomem * addr)122 void iowrite64be_hi_lo(u64 val, void __iomem *addr)
123 {
124 	writeq_be(val, addr);
125 }
126 EXPORT_SYMBOL(iowrite64);
127 EXPORT_SYMBOL(iowrite64_lo_hi);
128 EXPORT_SYMBOL(iowrite64_hi_lo);
129 EXPORT_SYMBOL(iowrite64be);
130 EXPORT_SYMBOL(iowrite64be_lo_hi);
131 EXPORT_SYMBOL(iowrite64be_hi_lo);
132 #endif /* __powerpc64__ */
133 
134 /*
135  * These are the "repeat read/write" functions. Note the
136  * non-CPU byte order. We do things in "IO byteorder"
137  * here.
138  *
139  * FIXME! We could make these do EEH handling if we really
140  * wanted. Not clear if we do.
141  */
ioread8_rep(void __iomem * addr,void * dst,unsigned long count)142 void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
143 {
144 	readsb(addr, dst, count);
145 }
ioread16_rep(void __iomem * addr,void * dst,unsigned long count)146 void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
147 {
148 	readsw(addr, dst, count);
149 }
ioread32_rep(void __iomem * addr,void * dst,unsigned long count)150 void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
151 {
152 	readsl(addr, dst, count);
153 }
154 EXPORT_SYMBOL(ioread8_rep);
155 EXPORT_SYMBOL(ioread16_rep);
156 EXPORT_SYMBOL(ioread32_rep);
157 
iowrite8_rep(void __iomem * addr,const void * src,unsigned long count)158 void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
159 {
160 	writesb(addr, src, count);
161 }
iowrite16_rep(void __iomem * addr,const void * src,unsigned long count)162 void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
163 {
164 	writesw(addr, src, count);
165 }
iowrite32_rep(void __iomem * addr,const void * src,unsigned long count)166 void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
167 {
168 	writesl(addr, src, count);
169 }
170 EXPORT_SYMBOL(iowrite8_rep);
171 EXPORT_SYMBOL(iowrite16_rep);
172 EXPORT_SYMBOL(iowrite32_rep);
173 
ioport_map(unsigned long port,unsigned int len)174 void __iomem *ioport_map(unsigned long port, unsigned int len)
175 {
176 	return (void __iomem *) (port + _IO_BASE);
177 }
178 
ioport_unmap(void __iomem * addr)179 void ioport_unmap(void __iomem *addr)
180 {
181 	/* Nothing to do */
182 }
183 EXPORT_SYMBOL(ioport_map);
184 EXPORT_SYMBOL(ioport_unmap);
185 
186 #ifdef CONFIG_PCI
pci_iounmap(struct pci_dev * dev,void __iomem * addr)187 void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
188 {
189 	if (isa_vaddr_is_ioport(addr))
190 		return;
191 	if (pcibios_vaddr_is_ioport(addr))
192 		return;
193 	iounmap(addr);
194 }
195 
196 EXPORT_SYMBOL(pci_iounmap);
197 #endif /* CONFIG_PCI */
198