1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/module.h>
3 #include <linux/kernel.h>
4 #include <linux/init.h>
5 #include <linux/list.h>
6 #include <linux/io.h>
7 #include <linux/clk.h>
8 #include <linux/clk/mmp.h>
9
10 #include "addr-map.h"
11
12 #include "common.h"
13 #include "clock.h"
14
15 /*
16 * APB Clock register offsets for PXA910
17 */
18 #define APBC_UART0 APBC_REG(0x000)
19 #define APBC_UART1 APBC_REG(0x004)
20 #define APBC_GPIO APBC_REG(0x008)
21 #define APBC_PWM1 APBC_REG(0x00c)
22 #define APBC_PWM2 APBC_REG(0x010)
23 #define APBC_PWM3 APBC_REG(0x014)
24 #define APBC_PWM4 APBC_REG(0x018)
25 #define APBC_SSP1 APBC_REG(0x01c)
26 #define APBC_SSP2 APBC_REG(0x020)
27 #define APBC_RTC APBC_REG(0x028)
28 #define APBC_TWSI0 APBC_REG(0x02c)
29 #define APBC_KPC APBC_REG(0x030)
30 #define APBC_SSP3 APBC_REG(0x04c)
31 #define APBC_TWSI1 APBC_REG(0x06c)
32
33 #define APMU_NAND APMU_REG(0x060)
34 #define APMU_USB APMU_REG(0x05c)
35
36 static APBC_CLK(uart1, UART0, 1, 14745600);
37 static APBC_CLK(uart2, UART1, 1, 14745600);
38 static APBC_CLK(twsi0, TWSI0, 1, 33000000);
39 static APBC_CLK(twsi1, TWSI1, 1, 33000000);
40 static APBC_CLK(pwm1, PWM1, 1, 13000000);
41 static APBC_CLK(pwm2, PWM2, 1, 13000000);
42 static APBC_CLK(pwm3, PWM3, 1, 13000000);
43 static APBC_CLK(pwm4, PWM4, 1, 13000000);
44 static APBC_CLK(gpio, GPIO, 0, 13000000);
45 static APBC_CLK(rtc, RTC, 8, 32768);
46
47 static APMU_CLK(nand, NAND, 0x19b, 156000000);
48 static APMU_CLK(u2o, USB, 0x1b, 480000000);
49
50 /* device and clock bindings */
51 static struct clk_lookup pxa910_clkregs[] = {
52 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
53 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
54 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
55 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
56 INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
57 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
58 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
59 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
60 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
61 INIT_CLKREG(&clk_gpio, "mmp-gpio", NULL),
62 INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"),
63 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
64 };
65
pxa910_clk_init(phys_addr_t mpmu_phys,phys_addr_t apmu_phys,phys_addr_t apbc_phys,phys_addr_t apbcp_phys)66 void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
67 phys_addr_t apbc_phys, phys_addr_t apbcp_phys)
68 {
69 clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
70 }
71
