1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
5 *
6 * Author: Fabio Estevam <fabio.estevam@freescale.com>
7 *
8 * Copyright (C) 2011 Meprolight, Ltd.
9 * Alex Gershgorin <alexg@meprolight.com>
10 *
11 * Modified from i.MX31 3-Stack Development System
12 */
13
14 /*
15 * This machine is known as:
16 * - i.MX35 3-Stack Development System
17 * - i.MX35 Platform Development Kit (i.MX35 PDK)
18 */
19
20 #include <linux/types.h>
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/memory.h>
24 #include <linux/gpio.h>
25 #include <linux/usb/otg.h>
26
27 #include <linux/mtd/physmap.h>
28 #include <linux/mfd/mc13892.h>
29 #include <linux/regulator/machine.h>
30
31 #include <asm/mach-types.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/time.h>
34 #include <asm/mach/map.h>
35
36 #include <video/platform_lcd.h>
37
38 #include "3ds_debugboard.h"
39 #include "common.h"
40 #include "devices-imx35.h"
41 #include "ehci.h"
42 #include "hardware.h"
43 #include "iomux-mx35.h"
44
45 #define GPIO_MC9S08DZ60_GPS_ENABLE 0
46 #define GPIO_MC9S08DZ60_HDD_ENABLE 4
47 #define GPIO_MC9S08DZ60_WIFI_ENABLE 5
48 #define GPIO_MC9S08DZ60_LCD_ENABLE 6
49 #define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8
50
51 static const struct fb_videomode fb_modedb[] = {
52 {
53 /* 800x480 @ 55 Hz */
54 .name = "Ceramate-CLAA070VC01",
55 .refresh = 55,
56 .xres = 800,
57 .yres = 480,
58 .pixclock = 40000,
59 .left_margin = 40,
60 .right_margin = 40,
61 .upper_margin = 5,
62 .lower_margin = 5,
63 .hsync_len = 20,
64 .vsync_len = 10,
65 .sync = FB_SYNC_OE_ACT_HIGH,
66 .vmode = FB_VMODE_NONINTERLACED,
67 .flag = 0,
68 },
69 };
70
71 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
72 .name = "Ceramate-CLAA070VC01",
73 .mode = fb_modedb,
74 .num_modes = ARRAY_SIZE(fb_modedb),
75 };
76
77 static struct i2c_board_info __initdata i2c_devices_3ds[] = {
78 {
79 I2C_BOARD_INFO("mc9s08dz60", 0x69),
80 },
81 };
82
83 static int lcd_power_gpio = -ENXIO;
84
mc9s08dz60_gpiochip_match(struct gpio_chip * chip,void * data)85 static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)
86 {
87 return !strcmp(chip->label, data);
88 }
89
mx35_3ds_lcd_set_power(struct plat_lcd_data * pd,unsigned int power)90 static void mx35_3ds_lcd_set_power(
91 struct plat_lcd_data *pd, unsigned int power)
92 {
93 struct gpio_chip *chip;
94
95 if (!gpio_is_valid(lcd_power_gpio)) {
96 chip = gpiochip_find(
97 "mc9s08dz60", mc9s08dz60_gpiochip_match);
98 if (chip) {
99 lcd_power_gpio =
100 chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
101 if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
102 pr_err("error: gpio already requested!\n");
103 lcd_power_gpio = -ENXIO;
104 }
105 } else {
106 pr_err("error: didn't find mc9s08dz60 gpio chip\n");
107 }
108 }
109
110 if (gpio_is_valid(lcd_power_gpio))
111 gpio_set_value_cansleep(lcd_power_gpio, power);
112 }
113
114 static struct plat_lcd_data mx35_3ds_lcd_data = {
115 .set_power = mx35_3ds_lcd_set_power,
116 };
117
118 static struct platform_device mx35_3ds_lcd = {
119 .name = "platform-lcd",
120 .dev.platform_data = &mx35_3ds_lcd_data,
121 };
122
123 static const struct imxuart_platform_data uart_pdata __initconst = {
124 .flags = IMXUART_HAVE_RTSCTS,
125 };
126
127 static struct physmap_flash_data mx35pdk_flash_data = {
128 .width = 2,
129 };
130
131 static struct resource mx35pdk_flash_resource = {
132 .start = MX35_CS0_BASE_ADDR,
133 .end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
134 .flags = IORESOURCE_MEM,
135 };
136
137 static struct platform_device mx35pdk_flash = {
138 .name = "physmap-flash",
139 .id = 0,
140 .dev = {
141 .platform_data = &mx35pdk_flash_data,
142 },
143 .resource = &mx35pdk_flash_resource,
144 .num_resources = 1,
145 };
146
147 static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
148 .width = 1,
149 .hw_ecc = 1,
150 .flash_bbt = 1,
151 };
152
153 static struct platform_device *devices[] __initdata = {
154 &mx35pdk_flash,
155 };
156
157 static const iomux_v3_cfg_t mx35pdk_pads[] __initconst = {
158 /* UART1 */
159 MX35_PAD_CTS1__UART1_CTS,
160 MX35_PAD_RTS1__UART1_RTS,
161 MX35_PAD_TXD1__UART1_TXD_MUX,
162 MX35_PAD_RXD1__UART1_RXD_MUX,
163 /* FEC */
164 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
165 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
166 MX35_PAD_FEC_RX_DV__FEC_RX_DV,
167 MX35_PAD_FEC_COL__FEC_COL,
168 MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
169 MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
170 MX35_PAD_FEC_TX_EN__FEC_TX_EN,
171 MX35_PAD_FEC_MDC__FEC_MDC,
172 MX35_PAD_FEC_MDIO__FEC_MDIO,
173 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
174 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
175 MX35_PAD_FEC_CRS__FEC_CRS,
176 MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
177 MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
178 MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
179 MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
180 MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
181 MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
182 /* USBOTG */
183 MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
184 MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
185 /* USBH1 */
186 MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
187 MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
188 /* SDCARD */
189 MX35_PAD_SD1_CMD__ESDHC1_CMD,
190 MX35_PAD_SD1_CLK__ESDHC1_CLK,
191 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
192 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
193 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
194 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
195 /* I2C1 */
196 MX35_PAD_I2C1_CLK__I2C1_SCL,
197 MX35_PAD_I2C1_DAT__I2C1_SDA,
198 /* Display */
199 MX35_PAD_LD0__IPU_DISPB_DAT_0,
200 MX35_PAD_LD1__IPU_DISPB_DAT_1,
201 MX35_PAD_LD2__IPU_DISPB_DAT_2,
202 MX35_PAD_LD3__IPU_DISPB_DAT_3,
203 MX35_PAD_LD4__IPU_DISPB_DAT_4,
204 MX35_PAD_LD5__IPU_DISPB_DAT_5,
205 MX35_PAD_LD6__IPU_DISPB_DAT_6,
206 MX35_PAD_LD7__IPU_DISPB_DAT_7,
207 MX35_PAD_LD8__IPU_DISPB_DAT_8,
208 MX35_PAD_LD9__IPU_DISPB_DAT_9,
209 MX35_PAD_LD10__IPU_DISPB_DAT_10,
210 MX35_PAD_LD11__IPU_DISPB_DAT_11,
211 MX35_PAD_LD12__IPU_DISPB_DAT_12,
212 MX35_PAD_LD13__IPU_DISPB_DAT_13,
213 MX35_PAD_LD14__IPU_DISPB_DAT_14,
214 MX35_PAD_LD15__IPU_DISPB_DAT_15,
215 MX35_PAD_LD16__IPU_DISPB_DAT_16,
216 MX35_PAD_LD17__IPU_DISPB_DAT_17,
217 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
218 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
219 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
220 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
221 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
222 MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
223 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
224 /*PMIC IRQ*/
225 MX35_PAD_GPIO2_0__GPIO2_0,
226 };
227
228 static struct regulator_consumer_supply sw1_consumers[] = {
229 {
230 .supply = "cpu_vcc",
231 }
232 };
233
234 static struct regulator_consumer_supply vcam_consumers[] = {
235 /* sgtl5000 */
236 REGULATOR_SUPPLY("VDDA", "0-000a"),
237 };
238
239 static struct regulator_init_data sw1_init = {
240 .constraints = {
241 .name = "SW1",
242 .min_uV = 600000,
243 .max_uV = 1375000,
244 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
245 .valid_modes_mask = 0,
246 .always_on = 1,
247 .boot_on = 1,
248 },
249 .num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
250 .consumer_supplies = sw1_consumers,
251 };
252
253 static struct regulator_init_data sw2_init = {
254 .constraints = {
255 .name = "SW2",
256 .always_on = 1,
257 .boot_on = 1,
258 }
259 };
260
261 static struct regulator_init_data sw3_init = {
262 .constraints = {
263 .name = "SW3",
264 .always_on = 1,
265 .boot_on = 1,
266 }
267 };
268
269 static struct regulator_init_data sw4_init = {
270 .constraints = {
271 .name = "SW4",
272 .always_on = 1,
273 .boot_on = 1,
274 }
275 };
276
277 static struct regulator_init_data viohi_init = {
278 .constraints = {
279 .name = "VIOHI",
280 .boot_on = 1,
281 }
282 };
283
284 static struct regulator_init_data vusb_init = {
285 .constraints = {
286 .name = "VUSB",
287 .boot_on = 1,
288 }
289 };
290
291 static struct regulator_init_data vdig_init = {
292 .constraints = {
293 .name = "VDIG",
294 .boot_on = 1,
295 }
296 };
297
298 static struct regulator_init_data vpll_init = {
299 .constraints = {
300 .name = "VPLL",
301 .boot_on = 1,
302 }
303 };
304
305 static struct regulator_init_data vusb2_init = {
306 .constraints = {
307 .name = "VUSB2",
308 .boot_on = 1,
309 }
310 };
311
312 static struct regulator_init_data vvideo_init = {
313 .constraints = {
314 .name = "VVIDEO",
315 .boot_on = 1
316 }
317 };
318
319 static struct regulator_init_data vcam_init = {
320 .constraints = {
321 .name = "VCAM",
322 .min_uV = 2500000,
323 .max_uV = 3000000,
324 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
325 REGULATOR_CHANGE_MODE,
326 .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
327 .boot_on = 1
328 },
329 .num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
330 .consumer_supplies = vcam_consumers,
331 };
332
333 static struct regulator_init_data vgen1_init = {
334 .constraints = {
335 .name = "VGEN1",
336 }
337 };
338
339 static struct regulator_init_data vgen2_init = {
340 .constraints = {
341 .name = "VGEN2",
342 .boot_on = 1,
343 }
344 };
345
346 static struct regulator_init_data vgen3_init = {
347 .constraints = {
348 .name = "VGEN3",
349 }
350 };
351
352 static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
353 { .id = MC13892_SW1, .init_data = &sw1_init },
354 { .id = MC13892_SW2, .init_data = &sw2_init },
355 { .id = MC13892_SW3, .init_data = &sw3_init },
356 { .id = MC13892_SW4, .init_data = &sw4_init },
357 { .id = MC13892_VIOHI, .init_data = &viohi_init },
358 { .id = MC13892_VPLL, .init_data = &vpll_init },
359 { .id = MC13892_VDIG, .init_data = &vdig_init },
360 { .id = MC13892_VUSB2, .init_data = &vusb2_init },
361 { .id = MC13892_VVIDEO, .init_data = &vvideo_init },
362 { .id = MC13892_VCAM, .init_data = &vcam_init },
363 { .id = MC13892_VGEN1, .init_data = &vgen1_init },
364 { .id = MC13892_VGEN2, .init_data = &vgen2_init },
365 { .id = MC13892_VGEN3, .init_data = &vgen3_init },
366 { .id = MC13892_VUSB, .init_data = &vusb_init },
367 };
368
369 static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
370 .flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
371 .regulators = {
372 .num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
373 .regulators = mx35_3ds_regulators,
374 },
375 };
376
377 #define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
378
379 static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
380
381 I2C_BOARD_INFO("mc13892", 0x08),
382 .platform_data = &mx35_3ds_mc13892_data,
383 /* irq number is run-time assigned */
384 };
385
imx35_3ds_init_mc13892(void)386 static void __init imx35_3ds_init_mc13892(void)
387 {
388 int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
389
390 if (ret) {
391 pr_err("failed to get pmic irq: %d\n", ret);
392 return;
393 }
394
395 mx35_3ds_i2c_mc13892.irq = gpio_to_irq(GPIO_PMIC_INT);
396 i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
397 }
398
mx35_3ds_otg_init(struct platform_device * pdev)399 static int mx35_3ds_otg_init(struct platform_device *pdev)
400 {
401 return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
402 }
403
404 /* OTG config */
405 static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
406 .operating_mode = FSL_USB2_DR_DEVICE,
407 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
408 .workaround = FLS_USB2_WORKAROUND_ENGCM09152,
409 /*
410 * ENGCM09152 also requires a hardware change.
411 * Please check the MX35 Chip Errata document for details.
412 */
413 };
414
415 static struct mxc_usbh_platform_data otg_pdata __initdata = {
416 .init = mx35_3ds_otg_init,
417 .portsc = MXC_EHCI_MODE_UTMI,
418 };
419
mx35_3ds_usbh_init(struct platform_device * pdev)420 static int mx35_3ds_usbh_init(struct platform_device *pdev)
421 {
422 return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
423 MXC_EHCI_INTERNAL_PHY);
424 }
425
426 /* USB HOST config */
427 static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
428 .init = mx35_3ds_usbh_init,
429 .portsc = MXC_EHCI_MODE_SERIAL,
430 };
431
432 static bool otg_mode_host __initdata;
433
mx35_3ds_otg_mode(char * options)434 static int __init mx35_3ds_otg_mode(char *options)
435 {
436 if (!strcmp(options, "host"))
437 otg_mode_host = true;
438 else if (!strcmp(options, "device"))
439 otg_mode_host = false;
440 else
441 pr_info("otg_mode neither \"host\" nor \"device\". "
442 "Defaulting to device\n");
443 return 1;
444 }
445 __setup("otg_mode=", mx35_3ds_otg_mode);
446
447 static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
448 .bitrate = 100000,
449 };
450
451 /*
452 * Board specific initialization.
453 */
mx35_3ds_init(void)454 static void __init mx35_3ds_init(void)
455 {
456 imx35_soc_init();
457
458 mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
459
460 imx35_add_fec(NULL);
461 imx35_add_imx2_wdt();
462 imx35_add_mxc_rtc();
463 platform_add_devices(devices, ARRAY_SIZE(devices));
464
465 imx35_add_imx_uart0(&uart_pdata);
466
467 if (otg_mode_host)
468 imx35_add_mxc_ehci_otg(&otg_pdata);
469
470 imx35_add_mxc_ehci_hs(&usb_host_pdata);
471
472 if (!otg_mode_host)
473 imx35_add_fsl_usb2_udc(&usb_otg_pdata);
474
475 imx35_add_mxc_nand(&mx35pdk_nand_board_info);
476 imx35_add_sdhci_esdhc_imx(0, NULL);
477
478 imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);
479
480 i2c_register_board_info(
481 0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));
482
483 imx35_add_ipu_core();
484 }
485
mx35_3ds_late_init(void)486 static void __init mx35_3ds_late_init(void)
487 {
488 struct platform_device *imx35_fb_pdev;
489
490 if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1)))
491 pr_warn("Init of the debugboard failed, all "
492 "devices on the debugboard are unusable.\n");
493
494 imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
495 mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
496 platform_device_register(&mx35_3ds_lcd);
497
498 imx35_3ds_init_mc13892();
499 }
500
mx35pdk_timer_init(void)501 static void __init mx35pdk_timer_init(void)
502 {
503 mx35_clocks_init();
504 }
505
506 MACHINE_START(MX35_3DS, "Freescale MX35PDK")
507 /* Maintainer: Freescale Semiconductor, Inc */
508 .atag_offset = 0x100,
509 .map_io = mx35_map_io,
510 .init_early = imx35_init_early,
511 .init_irq = mx35_init_irq,
512 .init_time = mx35pdk_timer_init,
513 .init_machine = mx35_3ds_init,
514 .init_late = mx35_3ds_late_init,
515 .restart = mxc_restart,
516 MACHINE_END
517
