1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * LILLY-1131 module support
4 *
5 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
6 *
7 * based on code for other MX31 boards,
8 *
9 * Copyright 2005-2007 Freescale Semiconductor
10 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
11 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
12 */
13
14 #include <linux/types.h>
15 #include <linux/init.h>
16 #include <linux/clk.h>
17 #include <linux/gpio.h>
18 #include <linux/delay.h>
19 #include <linux/platform_device.h>
20 #include <linux/interrupt.h>
21 #include <linux/moduleparam.h>
22 #include <linux/smsc911x.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/spi/spi.h>
25 #include <linux/mfd/mc13783.h>
26 #include <linux/usb/otg.h>
27 #include <linux/usb/ulpi.h>
28 #include <linux/regulator/machine.h>
29 #include <linux/regulator/fixed.h>
30
31 #include <asm/mach-types.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/time.h>
34 #include <asm/mach/map.h>
35
36 #include "board-mx31lilly.h"
37 #include "common.h"
38 #include "devices-imx31.h"
39 #include "ehci.h"
40 #include "hardware.h"
41 #include "iomux-mx3.h"
42 #include "ulpi.h"
43
44 /*
45 * This file contains module-specific initialization routines for LILLY-1131.
46 * Initialization of peripherals found on the baseboard is implemented in the
47 * appropriate baseboard support code.
48 */
49
50 static unsigned int mx31lilly_pins[] __initdata = {
51 MX31_PIN_CTS1__CTS1,
52 MX31_PIN_RTS1__RTS1,
53 MX31_PIN_TXD1__TXD1,
54 MX31_PIN_RXD1__RXD1,
55 MX31_PIN_CTS2__CTS2,
56 MX31_PIN_RTS2__RTS2,
57 MX31_PIN_TXD2__TXD2,
58 MX31_PIN_RXD2__RXD2,
59 MX31_PIN_CSPI3_MOSI__RXD3,
60 MX31_PIN_CSPI3_MISO__TXD3,
61 MX31_PIN_CSPI3_SCLK__RTS3,
62 MX31_PIN_CSPI3_SPI_RDY__CTS3,
63 };
64
65 /* UART */
66 static const struct imxuart_platform_data uart_pdata __initconst = {
67 .flags = IMXUART_HAVE_RTSCTS,
68 };
69
70 /* SMSC ethernet support */
71
72 static struct resource smsc91x_resources[] = {
73 {
74 .start = MX31_CS4_BASE_ADDR,
75 .end = MX31_CS4_BASE_ADDR + 0xffff,
76 .flags = IORESOURCE_MEM,
77 },
78 {
79 /* irq number is run-time assigned */
80 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
81 }
82 };
83
84 static struct smsc911x_platform_config smsc911x_config = {
85 .phy_interface = PHY_INTERFACE_MODE_MII,
86 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
87 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
88 .flags = SMSC911X_USE_32BIT |
89 SMSC911X_SAVE_MAC_ADDRESS |
90 SMSC911X_FORCE_INTERNAL_PHY,
91 };
92
93 static struct platform_device smsc91x_device = {
94 .name = "smsc911x",
95 .id = -1,
96 .num_resources = ARRAY_SIZE(smsc91x_resources),
97 .resource = smsc91x_resources,
98 .dev = {
99 .platform_data = &smsc911x_config,
100 }
101 };
102
103 /* NOR flash */
104 static struct physmap_flash_data nor_flash_data = {
105 .width = 2,
106 };
107
108 static struct resource nor_flash_resource = {
109 .start = 0xa0000000,
110 .end = 0xa1ffffff,
111 .flags = IORESOURCE_MEM,
112 };
113
114 static struct platform_device physmap_flash_device = {
115 .name = "physmap-flash",
116 .id = 0,
117 .dev = {
118 .platform_data = &nor_flash_data,
119 },
120 .resource = &nor_flash_resource,
121 .num_resources = 1,
122 };
123
124 /* USB */
125
126 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
127 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
128
usbh1_init(struct platform_device * pdev)129 static int usbh1_init(struct platform_device *pdev)
130 {
131 int pins[] = {
132 MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
133 MX31_PIN_CSPI1_MISO__USBH1_RXDP,
134 MX31_PIN_CSPI1_SS0__USBH1_TXDM,
135 MX31_PIN_CSPI1_SS1__USBH1_TXDP,
136 MX31_PIN_CSPI1_SS2__USBH1_RCV,
137 MX31_PIN_CSPI1_SCLK__USBH1_OEB,
138 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
139 };
140
141 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
142
143 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
144 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
145 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
146 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
147 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
150
151 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
152
153 mdelay(10);
154
155 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
156 MXC_EHCI_INTERFACE_SINGLE_UNI);
157 }
158
usbh2_init(struct platform_device * pdev)159 static int usbh2_init(struct platform_device *pdev)
160 {
161 int pins[] = {
162 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
163 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
164 MX31_PIN_USBH2_CLK__USBH2_CLK,
165 MX31_PIN_USBH2_DIR__USBH2_DIR,
166 MX31_PIN_USBH2_NXT__USBH2_NXT,
167 MX31_PIN_USBH2_STP__USBH2_STP,
168 };
169
170 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
171
172 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
173 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
174 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
175 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
176 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
177 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
178 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
179 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
180 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
181 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
182 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
183 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
184
185 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
186
187 /* chip select */
188 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
189 "USBH2_CS");
190 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
191 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
192
193 mdelay(10);
194
195 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
196 }
197
198 static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
199 .init = usbh1_init,
200 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
201 };
202
203 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
204 .init = usbh2_init,
205 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
206 };
207
lilly1131_usb_init(void)208 static void __init lilly1131_usb_init(void)
209 {
210 imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
211
212 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
213 ULPI_OTG_DRVVBUS_EXT);
214 if (usbh2_pdata.otg)
215 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
216 }
217
218 /* SPI */
219
220 static const struct spi_imx_master spi0_pdata __initconst = {
221 .num_chipselect = 3,
222 };
223
224 static const struct spi_imx_master spi1_pdata __initconst = {
225 .num_chipselect = 3,
226 };
227
228 static struct mc13xxx_platform_data mc13783_pdata __initdata = {
229 .flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
230 };
231
232 static struct spi_board_info mc13783_dev __initdata = {
233 .modalias = "mc13783",
234 .max_speed_hz = 1000000,
235 .bus_num = 1,
236 .chip_select = 0,
237 .platform_data = &mc13783_pdata,
238 /* irq number is run-time assigned */
239 };
240
241 static struct platform_device *devices[] __initdata = {
242 &smsc91x_device,
243 &physmap_flash_device,
244 };
245
246 static int mx31lilly_baseboard;
247 core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
248
249 static struct regulator_consumer_supply dummy_supplies[] = {
250 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
251 REGULATOR_SUPPLY("vddvario", "smsc911x"),
252 };
253
mx31lilly_board_init(void)254 static void __init mx31lilly_board_init(void)
255 {
256 imx31_soc_init();
257
258 mxc_iomux_setup_multiple_pins(mx31lilly_pins,
259 ARRAY_SIZE(mx31lilly_pins), "mx31lily");
260
261 imx31_add_imx_uart0(&uart_pdata);
262 imx31_add_imx_uart1(&uart_pdata);
263 imx31_add_imx_uart2(&uart_pdata);
264
265 mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
266
267 /* SPI */
268 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
269 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
270 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
271 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
272 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
273 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
274 mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
275
276 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
277 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
278 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
279 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
280 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
281 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
282 mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
283
284 imx31_add_spi_imx0(&spi0_pdata);
285 imx31_add_spi_imx1(&spi1_pdata);
286
287 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
288 }
289
mx31lilly_late_init(void)290 static void __init mx31lilly_late_init(void)
291 {
292 if (mx31lilly_baseboard == MX31LILLY_DB)
293 mx31lilly_db_init();
294
295 mc13783_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
296 spi_register_board_info(&mc13783_dev, 1);
297
298 smsc91x_resources[1].start =
299 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
300 smsc91x_resources[1].end =
301 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
302 platform_add_devices(devices, ARRAY_SIZE(devices));
303
304 /* USB */
305 lilly1131_usb_init();
306 }
307
mx31lilly_timer_init(void)308 static void __init mx31lilly_timer_init(void)
309 {
310 mx31_clocks_init(26000000);
311 }
312
313 MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
314 .atag_offset = 0x100,
315 .map_io = mx31_map_io,
316 .init_early = imx31_init_early,
317 .init_irq = mx31_init_irq,
318 .init_time = mx31lilly_timer_init,
319 .init_machine = mx31lilly_board_init,
320 .init_late = mx31lilly_late_init,
321 .restart = mxc_restart,
322 MACHINE_END
323