1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Veyron Fievel Rev 0+ board device tree source
4 *
5 * Copyright 2016 Google, Inc
6 */
7
8/dts-v1/;
9#include "rk3288-veyron.dtsi"
10#include "rk3288-veyron-analog-audio.dtsi"
11
12/ {
13	model = "Google Fievel";
14	compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
15		     "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
16		     "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
17		     "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
18		     "google,veyron-fievel-rev0", "google,veyron-fievel",
19		     "google,veyron", "rockchip,rk3288";
20
21	/delete-node/ bt-activity;
22
23	vccsys: vccsys {
24		compatible = "regulator-fixed";
25		regulator-name = "vccsys";
26		regulator-boot-on;
27		regulator-always-on;
28	};
29
30	/*
31	 * vcc33_pmuio and vcc33_io is sourced directly from vcc33_sys,
32	 * enabled by vcc_18
33	 */
34	vcc33_io: vcc33-io {
35		compatible = "regulator-fixed";
36		regulator-always-on;
37		regulator-boot-on;
38		regulator-name = "vcc33_io";
39	};
40
41	vcc5_host1: vcc5-host1-regulator {
42		compatible = "regulator-fixed";
43		enable-active-high;
44		gpio = <&gpio5 RK_PC2 GPIO_ACTIVE_HIGH>;
45		pinctrl-names = "default";
46		pinctrl-0 = <&hub_usb1_pwr_en>;
47		regulator-name = "vcc5_host1";
48		regulator-always-on;
49		regulator-boot-on;
50	};
51
52	vcc5_host2: vcc5-host2-regulator {
53		compatible = "regulator-fixed";
54		enable-active-high;
55		gpio = <&gpio5 RK_PB6 GPIO_ACTIVE_HIGH>;
56		pinctrl-names = "default";
57		pinctrl-0 = <&hub_usb2_pwr_en>;
58		regulator-name = "vcc5_host2";
59		regulator-always-on;
60		regulator-boot-on;
61	};
62
63	vcc5v_otg: vcc5v-otg-regulator {
64		compatible = "regulator-fixed";
65		enable-active-high;
66		gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
67		pinctrl-names = "default";
68		pinctrl-0 = <&usb_otg_pwr_en>;
69		regulator-name = "vcc5_otg";
70		regulator-always-on;
71		regulator-boot-on;
72	};
73
74	ext_gmac: external-gmac-clock {
75		compatible = "fixed-clock";
76		#clock-cells = <0>;
77		clock-frequency = <125000000>;
78		clock-output-names = "ext_gmac";
79	};
80};
81
82&gmac {
83	status = "okay";
84
85	assigned-clocks = <&cru SCLK_MAC>;
86	assigned-clock-parents = <&ext_gmac>;
87	clock_in_out = "input";
88	phy-handle = <&ethphy>;
89	phy-mode = "rgmii";
90	phy-supply = <&vcc33_lan>;
91	pinctrl-names = "default";
92	pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
93	rx_delay = <0x10>;
94	tx_delay = <0x30>;
95
96	/*
97	 * Reset for the RTL8211 PHY which requires a 10-ms reset pulse (low)
98	 * with a 30ms settling time.
99	 */
100	snps,reset-gpio = <&gpio4 RK_PB0 0>;
101	snps,reset-active-low;
102	snps,reset-delays-us = <0 10000 30000>;
103	wakeup-source;
104
105	mdio0 {
106		compatible = "snps,dwmac-mdio";
107		#address-cells = <1>;
108		#size-cells = <0>;
109
110		ethphy: ethernet-phy@1 {
111			reg = <1>;
112		};
113	};
114};
115
116&rk808 {
117	dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
118		    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
119	pinctrl-names = "default";
120	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
121
122	vcc6-supply = <&vcc33_sys>;
123	vcc10-supply = <&vcc33_sys>;
124	vcc11-supply = <&vcc_5v>;
125	vcc12-supply = <&vcc33_sys>;
126
127	regulators {
128		/delete-node/ LDO_REG1;
129
130		/*
131		 * According to the schematic, vcc18_lcdt is for
132		 * HDMI_AVDD_1V8
133		 */
134		vcc18_lcdt: LDO_REG2 {
135			regulator-always-on;
136			regulator-boot-on;
137			regulator-min-microvolt = <1800000>;
138			regulator-max-microvolt = <1800000>;
139			regulator-name = "vdd18_lcdt";
140			regulator-state-mem {
141				regulator-off-in-suspend;
142			};
143		};
144
145		/*
146		 * This is not a pwren anymore, but the real power supply,
147		 * vdd10_lcd for HDMI_AVDD_1V0
148		 */
149		vdd10_lcd: LDO_REG7 {
150			regulator-always-on;
151			regulator-boot-on;
152			regulator-min-microvolt = <1000000>;
153			regulator-max-microvolt = <1000000>;
154			regulator-name = "vdd10_lcd";
155			regulator-state-mem {
156				regulator-off-in-suspend;
157			};
158		};
159
160		/* for usb camera */
161		vcc33_ccd: LDO_REG8 {
162			regulator-always-on;
163			regulator-boot-on;
164			regulator-min-microvolt = <3300000>;
165			regulator-max-microvolt = <3300000>;
166			regulator-name = "vcc33_ccd";
167			regulator-state-mem {
168				regulator-off-in-suspend;
169			};
170		};
171
172		vcc33_lan: SWITCH_REG2 {
173			regulator-name = "vcc33_lan";
174		};
175	};
176};
177
178&sdio0 {
179	#address-cells = <1>;
180	#size-cells = <0>;
181
182	btmrvl: btmrvl@2 {
183		compatible = "marvell,sd8897-bt";
184		reg = <2>;
185		interrupt-parent = <&gpio4>;
186		interrupts = <RK_PD7 IRQ_TYPE_LEVEL_LOW>;
187		marvell,wakeup-pin = /bits/ 16 <13>;
188		pinctrl-names = "default";
189		pinctrl-0 = <&bt_host_wake_l>;
190	};
191};
192
193&vcc50_hdmi {
194	enable-active-high;
195	gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
196	pinctrl-names = "default";
197	pinctrl-0 = <&vcc50_hdmi_en>;
198};
199
200&vcc_5v {
201	enable-active-high;
202	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
203	pinctrl-names = "default";
204	pinctrl-0 = <&drv_5v>;
205};
206
207&gpio0 {
208	gpio-line-names = "PMIC_SLEEP_AP",
209			  "DDRIO_PWROFF",
210			  "DDRIO_RETEN",
211			  "TS3A227E_INT_L",
212			  "PMIC_INT_L",
213			  "PWR_KEY_L",
214			  "HUB_USB1_nFALUT",
215			  "PHY_PMEB",
216
217			  "PHY_INT",
218			  "REC_MODE_L",
219			  "OTP_OUT",
220			  "",
221			  "USB_OTG_POWER_EN",
222			  "AP_WARM_RESET_H",
223			  "USB_OTG_nFALUT",
224			  "I2C0_SDA_PMIC",
225
226			  "I2C0_SCL_PMIC",
227			  "DEVMODE_L",
228			  "USB_INT";
229};
230
231&gpio2 {
232	gpio-line-names = "CONFIG0",
233			  "CONFIG1",
234			  "CONFIG2",
235			  "",
236			  "",
237			  "",
238			  "",
239			  "CONFIG3",
240
241			  "",
242			  "EMMC_RST_L",
243			  "",
244			  "",
245			  "BL_PWR_EN",
246			  "",
247			  "TOUCH_INT",
248			  "TOUCH_RST",
249
250			  "I2C3_SCL_TP",
251			  "I2C3_SDA_TP";
252};
253
254&gpio3 {
255	gpio-line-names = "FLASH0_D0",
256			  "FLASH0_D1",
257			  "FLASH0_D2",
258			  "FLASH0_D3",
259			  "FLASH0_D4",
260			  "FLASH0_D5",
261			  "FLASH0_D6",
262			  "FLASH0_D7",
263
264			  "VCC5V_GOOD_H",
265			  "",
266			  "",
267			  "",
268			  "",
269			  "",
270			  "",
271			  "",
272
273			  "FLASH0_CS2/EMMC_CMD",
274			  "",
275			  "FLASH0_DQS/EMMC_CLKO",
276			  "",
277			  "",
278			  "",
279			  "",
280			  "",
281
282			  "PHY_TXD2",
283			  "PHY_TXD3",
284			  "MAC_RXD2",
285			  "MAC_RXD3",
286			  "PHY_TXD0",
287			  "PHY_TXD1",
288			  "MAC_RXD0",
289			  "MAC_RXD1";
290};
291
292&gpio4 {
293	gpio-line-names = "MAC_MDC",
294			  "MAC_RXDV",
295			  "MAC_RXER",
296			  "MAC_CLK",
297			  "PHY_TXEN",
298			  "MAC_MDIO",
299			  "MAC_RXCLK",
300			  "",
301
302			  "PHY_RST",
303			  "PHY_TXCLK",
304			  "",
305			  "",
306			  "",
307			  "",
308			  "",
309			  "",
310
311			  "UART0_RXD",
312			  "UART0_TXD",
313			  "UART0_CTS_L",
314			  "UART0_RTS_L",
315			  "SDIO0_D0",
316			  "SDIO0_D1",
317			  "SDIO0_D2",
318			  "SDIO0_D3",
319
320			  "SDIO0_CMD",
321			  "SDIO0_CLK",
322			  "BT_DEV_WAKE",
323			  "",
324			  "WIFI_ENABLE_H",
325			  "BT_ENABLE_L",
326			  "WIFI_HOST_WAKE",
327			  "BT_HOST_WAKE";
328};
329
330&gpio5 {
331	gpio-line-names = "",
332			  "",
333			  "",
334			  "",
335			  "",
336			  "",
337			  "",
338			  "",
339
340			  "",
341			  "",
342			  "",
343			  "",
344			  "USB_OTG_CTL1",
345			  "HUB_USB2_CTL1",
346			  "HUB_USB2_PWR_EN",
347			  "HUB_USB_ILIM_SEL",
348
349			  "USB_OTG_STATUS_L",
350			  "HUB_USB1_CTL1",
351			  "HUB_USB1_PWR_EN",
352			  "VCC50_HDMI_EN";
353};
354
355&gpio6 {
356	gpio-line-names = "I2S0_SCLK",
357			  "I2S0_LRCK_RX",
358			  "I2S0_LRCK_TX",
359			  "I2S0_SDI",
360			  "I2S0_SDO0",
361			  "HP_DET_H",
362			  "",
363			  "INT_CODEC",
364
365			  "I2S0_CLK",
366			  "I2C2_SDA",
367			  "I2C2_SCL",
368			  "MICDET",
369			  "",
370			  "",
371			  "",
372			  "",
373
374			  "HUB_USB2_nFALUT",
375			  "USB_OTG_ILIM_SEL";
376};
377
378&gpio7 {
379	gpio-line-names = "LCD_BL_PWM",
380			  "PWM_LOG",
381			  "BL_EN",
382			  "PWR_LED1",
383			  "TPM_INT_H",
384			  "SPK_ON",
385			  "FW_WP_AP",
386			  "",
387
388			  "CPU_NMI",
389			  "DVSOK",
390			  "",
391			  "EDP_HPD",
392			  "DVS1",
393			  "",
394			  "LCD_EN",
395			  "DVS2",
396
397			  "HDMI_CEC",
398			  "I2C4_SDA",
399			  "I2C4_SCL",
400			  "I2C5_SDA_HDMI",
401			  "I2C5_SCL_HDMI",
402			  "5V_DRV",
403			  "UART2_RXD",
404			  "UART2_TXD";
405};
406
407&gpio8 {
408	gpio-line-names = "RAM_ID0",
409			  "RAM_ID1",
410			  "RAM_ID2",
411			  "RAM_ID3",
412			  "I2C1_SDA_TPM",
413			  "I2C1_SCL_TPM",
414			  "SPI2_CLK",
415			  "SPI2_CS0",
416
417			  "SPI2_RXD",
418			  "SPI2_TXD";
419};
420
421&pinctrl {
422	pinctrl-names = "default", "sleep";
423	pinctrl-0 = <
424		/* Common for sleep and wake, but no owners */
425		&ddr0_retention
426		&ddrio_pwroff
427		&global_pwroff
428
429		/* For usb bc1.2 */
430		&usb_otg_ilim_sel
431		&usb_usb_ilim_sel
432
433		/* Wake only */
434		&bt_dev_wake_awake
435		&pwr_led1_on
436	>;
437
438	pinctrl-1 = <
439		/* Common for sleep and wake, but no owners */
440		&ddr0_retention
441		&ddrio_pwroff
442		&global_pwroff
443
444		/* For usb bc1.2 */
445		&usb_otg_ilim_sel
446		&usb_usb_ilim_sel
447
448		/* Sleep only */
449		&bt_dev_wake_sleep
450		&pwr_led1_blink
451	>;
452
453	buck-5v {
454		drv_5v: drv-5v {
455			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
456		};
457	};
458
459	gmac {
460		phy_rst: phy-rst {
461			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
462		};
463
464		phy_pmeb: phy-pmeb {
465			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
466		};
467
468		phy_int: phy-int {
469			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
470		};
471	};
472
473	hdmi {
474		vcc50_hdmi_en: vcc50-hdmi-en {
475			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
476		};
477	};
478
479	leds {
480		pwr_led1_on: pwr-led1-on {
481			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_output_low>;
482		};
483
484		pwr_led1_blink: pwr-led1-blink {
485			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
486		};
487	};
488
489	pmic {
490		dvs_1: dvs-1 {
491			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
492		};
493
494		dvs_2: dvs-2 {
495			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
496		};
497	};
498
499	usb-bc12 {
500		usb_otg_ilim_sel: usb-otg-ilim-sel {
501			rockchip,pins = <6 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>;
502		};
503
504		usb_usb_ilim_sel: usb-usb-ilim-sel {
505			rockchip,pins = <5 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>;
506		};
507	};
508
509	usb-host {
510		hub_usb1_pwr_en: hub_usb1_pwr_en {
511			rockchip,pins = <5 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
512		};
513
514		hub_usb2_pwr_en: hub_usb2_pwr_en {
515			rockchip,pins = <5 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
516		};
517
518		usb_otg_pwr_en: usb_otg_pwr_en {
519			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
520		};
521	};
522};
523