1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC 4 * 5 * Copyright (C) 2014 Microchip 6 * Alexandre Belloni <alexandre.belloni@free-electrons.com> 7 */ 8 9#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/clock/at91.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/pwm/pwm.h> 14 15/ { 16 #address-cells = <1>; 17 #size-cells = <1>; 18 model = "Atmel AT91SAM9RL family SoC"; 19 compatible = "atmel,at91sam9rl", "atmel,at91sam9"; 20 interrupt-parent = <&aic>; 21 22 aliases { 23 serial0 = &dbgu; 24 serial1 = &usart0; 25 serial2 = &usart1; 26 serial3 = &usart2; 27 serial4 = &usart3; 28 gpio0 = &pioA; 29 gpio1 = &pioB; 30 gpio2 = &pioC; 31 gpio3 = &pioD; 32 tcb0 = &tcb0; 33 i2c0 = &i2c0; 34 i2c1 = &i2c1; 35 ssc0 = &ssc0; 36 ssc1 = &ssc1; 37 pwm0 = &pwm0; 38 }; 39 40 cpus { 41 #address-cells = <0>; 42 #size-cells = <0>; 43 44 cpu { 45 compatible = "arm,arm926ej-s"; 46 device_type = "cpu"; 47 }; 48 }; 49 50 memory { 51 device_type = "memory"; 52 reg = <0x20000000 0x04000000>; 53 }; 54 55 clocks { 56 slow_xtal: slow_xtal { 57 compatible = "fixed-clock"; 58 #clock-cells = <0>; 59 clock-frequency = <0>; 60 }; 61 62 main_xtal: main_xtal { 63 compatible = "fixed-clock"; 64 #clock-cells = <0>; 65 clock-frequency = <0>; 66 }; 67 68 adc_op_clk: adc_op_clk{ 69 compatible = "fixed-clock"; 70 #clock-cells = <0>; 71 clock-frequency = <1000000>; 72 }; 73 }; 74 75 sram: sram@300000 { 76 compatible = "mmio-sram"; 77 reg = <0x00300000 0x10000>; 78 }; 79 80 ahb { 81 compatible = "simple-bus"; 82 #address-cells = <1>; 83 #size-cells = <1>; 84 ranges; 85 86 fb0: fb@500000 { 87 compatible = "atmel,at91sam9rl-lcdc"; 88 reg = <0x00500000 0x1000>; 89 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; 90 pinctrl-names = "default"; 91 pinctrl-0 = <&pinctrl_fb>; 92 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; 93 clock-names = "hclk", "lcdc_clk"; 94 status = "disabled"; 95 }; 96 97 ebi: ebi@10000000 { 98 compatible = "atmel,at91sam9rl-ebi"; 99 #address-cells = <2>; 100 #size-cells = <1>; 101 atmel,smc = <&smc>; 102 atmel,matrix = <&matrix>; 103 reg = <0x10000000 0x80000000>; 104 ranges = <0x0 0x0 0x10000000 0x10000000 105 0x1 0x0 0x20000000 0x10000000 106 0x2 0x0 0x30000000 0x10000000 107 0x3 0x0 0x40000000 0x10000000 108 0x4 0x0 0x50000000 0x10000000 109 0x5 0x0 0x60000000 0x10000000>; 110 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 111 status = "disabled"; 112 113 nand_controller: nand-controller { 114 compatible = "atmel,at91sam9g45-nand-controller"; 115 #address-cells = <2>; 116 #size-cells = <1>; 117 ranges; 118 status = "disabled"; 119 }; 120 }; 121 122 apb { 123 compatible = "simple-bus"; 124 #address-cells = <1>; 125 #size-cells = <1>; 126 ranges; 127 128 tcb0: timer@fffa0000 { 129 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 130 #address-cells = <1>; 131 #size-cells = <0>; 132 reg = <0xfffa0000 0x100>; 133 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, 134 <17 IRQ_TYPE_LEVEL_HIGH 0>, 135 <18 IRQ_TYPE_LEVEL_HIGH 0>; 136 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 137 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 138 }; 139 140 mmc0: mmc@fffa4000 { 141 compatible = "atmel,hsmci"; 142 reg = <0xfffa4000 0x600>; 143 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 144 #address-cells = <1>; 145 #size-cells = <0>; 146 pinctrl-names = "default"; 147 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 148 clock-names = "mci_clk"; 149 status = "disabled"; 150 }; 151 152 i2c0: i2c@fffa8000 { 153 compatible = "atmel,at91sam9260-i2c"; 154 reg = <0xfffa8000 0x100>; 155 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; 156 #address-cells = <1>; 157 #size-cells = <0>; 158 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 159 status = "disabled"; 160 }; 161 162 i2c1: i2c@fffac000 { 163 compatible = "atmel,at91sam9260-i2c"; 164 reg = <0xfffac000 0x100>; 165 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 166 #address-cells = <1>; 167 #size-cells = <0>; 168 status = "disabled"; 169 }; 170 171 usart0: serial@fffb0000 { 172 compatible = "atmel,at91sam9260-usart"; 173 reg = <0xfffb0000 0x200>; 174 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 175 atmel,use-dma-rx; 176 atmel,use-dma-tx; 177 pinctrl-names = "default"; 178 pinctrl-0 = <&pinctrl_usart0>; 179 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 180 clock-names = "usart"; 181 status = "disabled"; 182 }; 183 184 usart1: serial@fffb4000 { 185 compatible = "atmel,at91sam9260-usart"; 186 reg = <0xfffb4000 0x200>; 187 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 188 atmel,use-dma-rx; 189 atmel,use-dma-tx; 190 pinctrl-names = "default"; 191 pinctrl-0 = <&pinctrl_usart1>; 192 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 193 clock-names = "usart"; 194 status = "disabled"; 195 }; 196 197 usart2: serial@fffb8000 { 198 compatible = "atmel,at91sam9260-usart"; 199 reg = <0xfffb8000 0x200>; 200 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 201 atmel,use-dma-rx; 202 atmel,use-dma-tx; 203 pinctrl-names = "default"; 204 pinctrl-0 = <&pinctrl_usart2>; 205 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 206 clock-names = "usart"; 207 status = "disabled"; 208 }; 209 210 usart3: serial@fffbc000 { 211 compatible = "atmel,at91sam9260-usart"; 212 reg = <0xfffbc000 0x200>; 213 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 214 atmel,use-dma-rx; 215 atmel,use-dma-tx; 216 pinctrl-names = "default"; 217 pinctrl-0 = <&pinctrl_usart3>; 218 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 219 clock-names = "usart"; 220 status = "disabled"; 221 }; 222 223 ssc0: ssc@fffc0000 { 224 compatible = "atmel,at91sam9rl-ssc"; 225 reg = <0xfffc0000 0x4000>; 226 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 227 pinctrl-names = "default"; 228 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 229 status = "disabled"; 230 }; 231 232 ssc1: ssc@fffc4000 { 233 compatible = "atmel,at91sam9rl-ssc"; 234 reg = <0xfffc4000 0x4000>; 235 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 238 status = "disabled"; 239 }; 240 241 pwm0: pwm@fffc8000 { 242 compatible = "atmel,at91sam9rl-pwm"; 243 reg = <0xfffc8000 0x300>; 244 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; 245 #pwm-cells = <3>; 246 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 247 clock-names = "pwm_clk"; 248 status = "disabled"; 249 }; 250 251 spi0: spi@fffcc000 { 252 #address-cells = <1>; 253 #size-cells = <0>; 254 compatible = "atmel,at91rm9200-spi"; 255 reg = <0xfffcc000 0x200>; 256 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 257 pinctrl-names = "default"; 258 pinctrl-0 = <&pinctrl_spi0>; 259 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 260 clock-names = "spi_clk"; 261 status = "disabled"; 262 }; 263 264 adc0: adc@fffd0000 { 265 #address-cells = <1>; 266 #size-cells = <0>; 267 compatible = "atmel,at91sam9rl-adc"; 268 reg = <0xfffd0000 0x100>; 269 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 270 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; 271 clock-names = "adc_clk", "adc_op_clk"; 272 atmel,adc-use-external-triggers; 273 atmel,adc-channels-used = <0x3f>; 274 atmel,adc-vref = <3300>; 275 atmel,adc-startup-time = <40>; 276 atmel,adc-res = <8 10>; 277 atmel,adc-res-names = "lowres", "highres"; 278 atmel,adc-use-res = "highres"; 279 280 trigger0 { 281 trigger-name = "timer-counter-0"; 282 trigger-value = <0x1>; 283 }; 284 trigger1 { 285 trigger-name = "timer-counter-1"; 286 trigger-value = <0x3>; 287 }; 288 289 trigger2 { 290 trigger-name = "timer-counter-2"; 291 trigger-value = <0x5>; 292 }; 293 294 trigger3 { 295 trigger-name = "external"; 296 trigger-value = <0x13>; 297 trigger-external; 298 }; 299 }; 300 301 usb0: gadget@fffd4000 { 302 #address-cells = <1>; 303 #size-cells = <0>; 304 compatible = "atmel,at91sam9rl-udc"; 305 reg = <0x00600000 0x100000>, 306 <0xfffd4000 0x4000>; 307 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 308 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 309 clock-names = "pclk", "hclk"; 310 status = "disabled"; 311 312 ep@0 { 313 reg = <0>; 314 atmel,fifo-size = <64>; 315 atmel,nb-banks = <1>; 316 }; 317 318 ep@1 { 319 reg = <1>; 320 atmel,fifo-size = <1024>; 321 atmel,nb-banks = <2>; 322 atmel,can-dma; 323 atmel,can-isoc; 324 }; 325 326 ep@2 { 327 reg = <2>; 328 atmel,fifo-size = <1024>; 329 atmel,nb-banks = <2>; 330 atmel,can-dma; 331 atmel,can-isoc; 332 }; 333 334 ep@3 { 335 reg = <3>; 336 atmel,fifo-size = <1024>; 337 atmel,nb-banks = <3>; 338 atmel,can-dma; 339 }; 340 341 ep@4 { 342 reg = <4>; 343 atmel,fifo-size = <1024>; 344 atmel,nb-banks = <3>; 345 atmel,can-dma; 346 }; 347 348 ep@5 { 349 reg = <5>; 350 atmel,fifo-size = <1024>; 351 atmel,nb-banks = <3>; 352 atmel,can-dma; 353 atmel,can-isoc; 354 }; 355 356 ep@6 { 357 reg = <6>; 358 atmel,fifo-size = <1024>; 359 atmel,nb-banks = <3>; 360 atmel,can-dma; 361 atmel,can-isoc; 362 }; 363 }; 364 365 dma0: dma-controller@ffffe600 { 366 compatible = "atmel,at91sam9rl-dma"; 367 reg = <0xffffe600 0x200>; 368 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 369 #dma-cells = <2>; 370 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 371 clock-names = "dma_clk"; 372 }; 373 374 ramc0: ramc@ffffea00 { 375 compatible = "atmel,at91sam9260-sdramc"; 376 reg = <0xffffea00 0x200>; 377 }; 378 379 smc: smc@ffffec00 { 380 compatible = "atmel,at91sam9260-smc", "syscon"; 381 reg = <0xffffec00 0x200>; 382 }; 383 384 matrix: matrix@ffffee00 { 385 compatible = "atmel,at91sam9rl-matrix", "syscon"; 386 reg = <0xffffee00 0x200>; 387 }; 388 389 aic: interrupt-controller@fffff000 { 390 #interrupt-cells = <3>; 391 compatible = "atmel,at91rm9200-aic"; 392 interrupt-controller; 393 reg = <0xfffff000 0x200>; 394 atmel,external-irqs = <31>; 395 }; 396 397 dbgu: serial@fffff200 { 398 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 399 reg = <0xfffff200 0x200>; 400 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 401 pinctrl-names = "default"; 402 pinctrl-0 = <&pinctrl_dbgu>; 403 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 404 clock-names = "usart"; 405 status = "disabled"; 406 }; 407 408 pinctrl@fffff400 { 409 #address-cells = <1>; 410 #size-cells = <1>; 411 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 412 ranges = <0xfffff400 0xfffff400 0x800>; 413 414 atmel,mux-mask = 415 /* A B */ 416 <0xffffffff 0xe05c6738>, /* pioA */ 417 <0xffffffff 0x0000c780>, /* pioB */ 418 <0xffffffff 0xe3ffff0e>, /* pioC */ 419 <0x003fffff 0x0001ff3c>; /* pioD */ 420 421 /* shared pinctrl settings */ 422 adc0 { 423 pinctrl_adc0_ts: adc0_ts-0 { 424 atmel,pins = 425 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, 426 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, 427 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, 428 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 429 }; 430 431 pinctrl_adc0_ad0: adc0_ad0-0 { 432 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; 433 }; 434 435 pinctrl_adc0_ad1: adc0_ad1-0 { 436 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 437 }; 438 439 pinctrl_adc0_ad2: adc0_ad2-0 { 440 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; 441 }; 442 443 pinctrl_adc0_ad3: adc0_ad3-0 { 444 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 445 }; 446 447 pinctrl_adc0_ad4: adc0_ad4-0 { 448 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; 449 }; 450 451 pinctrl_adc0_ad5: adc0_ad5-0 { 452 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; 453 }; 454 455 pinctrl_adc0_adtrg: adc0_adtrg-0 { 456 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 457 }; 458 }; 459 460 dbgu { 461 pinctrl_dbgu: dbgu-0 { 462 atmel,pins = 463 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 464 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 465 }; 466 }; 467 468 ebi { 469 pinctrl_ebi_addr_nand: ebi-addr-0 { 470 atmel,pins = 471 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, 472 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; 473 }; 474 }; 475 476 fb { 477 pinctrl_fb: fb-0 { 478 atmel,pins = 479 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, 480 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, 481 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, 482 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, 483 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 484 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, 485 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, 486 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, 487 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, 488 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, 489 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, 490 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, 491 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, 492 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, 493 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, 494 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, 495 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, 496 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, 497 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, 498 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, 499 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; 500 }; 501 }; 502 503 i2c_gpio0 { 504 pinctrl_i2c_gpio0: i2c_gpio0-0 { 505 atmel,pins = 506 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, 507 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 508 }; 509 }; 510 511 i2c_gpio1 { 512 pinctrl_i2c_gpio1: i2c_gpio1-0 { 513 atmel,pins = 514 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, 515 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 516 }; 517 }; 518 519 mmc0 { 520 pinctrl_mmc0_clk: mmc0_clk-0 { 521 atmel,pins = 522 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 523 }; 524 525 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 526 atmel,pins = 527 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 528 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 529 }; 530 531 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 532 atmel,pins = 533 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 534 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 535 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 536 }; 537 }; 538 539 nand { 540 pinctrl_nand_rb: nand-rb-0 { 541 atmel,pins = 542 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 543 }; 544 545 pinctrl_nand_cs: nand-cs-0 { 546 atmel,pins = 547 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 548 }; 549 550 pinctrl_nand_oe_we: nand-oe-we-0 { 551 atmel,pins = 552 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, 553 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; 554 }; 555 }; 556 557 pwm0 { 558 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { 559 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 560 }; 561 562 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { 563 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 564 }; 565 566 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { 567 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 568 }; 569 570 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { 571 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 572 }; 573 574 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { 575 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 576 }; 577 578 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { 579 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; 580 }; 581 582 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { 583 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 584 }; 585 586 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { 587 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; 588 }; 589 590 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { 591 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 592 }; 593 594 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { 595 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 596 }; 597 598 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { 599 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 600 }; 601 }; 602 603 spi0 { 604 pinctrl_spi0: spi0-0 { 605 atmel,pins = 606 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, 607 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, 608 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 609 }; 610 }; 611 612 ssc0 { 613 pinctrl_ssc0_tx: ssc0_tx-0 { 614 atmel,pins = 615 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, 616 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, 617 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; 618 }; 619 620 pinctrl_ssc0_rx: ssc0_rx-0 { 621 atmel,pins = 622 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, 623 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, 624 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 625 }; 626 }; 627 628 ssc1 { 629 pinctrl_ssc1_tx: ssc1_tx-0 { 630 atmel,pins = 631 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, 632 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, 633 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 634 }; 635 636 pinctrl_ssc1_rx: ssc1_rx-0 { 637 atmel,pins = 638 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, 639 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, 640 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 641 }; 642 }; 643 644 tcb0 { 645 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 646 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 647 }; 648 649 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 650 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; 651 }; 652 653 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 654 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 655 }; 656 657 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 658 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 659 }; 660 661 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 662 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; 663 }; 664 665 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 666 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 667 }; 668 669 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 670 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 671 }; 672 673 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 674 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 675 }; 676 677 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 678 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; 679 }; 680 }; 681 682 usart0 { 683 pinctrl_usart0: usart0-0 { 684 atmel,pins = 685 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, 686 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 687 }; 688 689 pinctrl_usart0_rts: usart0_rts-0 { 690 atmel,pins = 691 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 692 }; 693 694 pinctrl_usart0_cts: usart0_cts-0 { 695 atmel,pins = 696 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 697 }; 698 699 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { 700 atmel,pins = 701 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, 702 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 703 }; 704 705 pinctrl_usart0_dcd: usart0_dcd-0 { 706 atmel,pins = 707 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; 708 }; 709 710 pinctrl_usart0_ri: usart0_ri-0 { 711 atmel,pins = 712 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; 713 }; 714 715 pinctrl_usart0_sck: usart0_sck-0 { 716 atmel,pins = 717 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; 718 }; 719 }; 720 721 usart1 { 722 pinctrl_usart1: usart1-0 { 723 atmel,pins = 724 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>, 725 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 726 }; 727 728 pinctrl_usart1_rts: usart1_rts-0 { 729 atmel,pins = 730 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 731 }; 732 733 pinctrl_usart1_cts: usart1_cts-0 { 734 atmel,pins = 735 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 736 }; 737 738 pinctrl_usart1_sck: usart1_sck-0 { 739 atmel,pins = 740 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 741 }; 742 }; 743 744 usart2 { 745 pinctrl_usart2: usart2-0 { 746 atmel,pins = 747 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>, 748 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 749 }; 750 751 pinctrl_usart2_rts: usart2_rts-0 { 752 atmel,pins = 753 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 754 }; 755 756 pinctrl_usart2_cts: usart2_cts-0 { 757 atmel,pins = 758 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 759 }; 760 761 pinctrl_usart2_sck: usart2_sck-0 { 762 atmel,pins = 763 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 764 }; 765 }; 766 767 usart3 { 768 pinctrl_usart3: usart3-0 { 769 atmel,pins = 770 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, 771 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 772 }; 773 774 pinctrl_usart3_rts: usart3_rts-0 { 775 atmel,pins = 776 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 777 }; 778 779 pinctrl_usart3_cts: usart3_cts-0 { 780 atmel,pins = 781 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 782 }; 783 784 pinctrl_usart3_sck: usart3_sck-0 { 785 atmel,pins = 786 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; 787 }; 788 }; 789 790 pioA: gpio@fffff400 { 791 compatible = "atmel,at91rm9200-gpio"; 792 reg = <0xfffff400 0x200>; 793 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 794 #gpio-cells = <2>; 795 gpio-controller; 796 interrupt-controller; 797 #interrupt-cells = <2>; 798 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 799 }; 800 801 pioB: gpio@fffff600 { 802 compatible = "atmel,at91rm9200-gpio"; 803 reg = <0xfffff600 0x200>; 804 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 805 #gpio-cells = <2>; 806 gpio-controller; 807 interrupt-controller; 808 #interrupt-cells = <2>; 809 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 810 }; 811 812 pioC: gpio@fffff800 { 813 compatible = "atmel,at91rm9200-gpio"; 814 reg = <0xfffff800 0x200>; 815 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 816 #gpio-cells = <2>; 817 gpio-controller; 818 interrupt-controller; 819 #interrupt-cells = <2>; 820 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 821 }; 822 823 pioD: gpio@fffffa00 { 824 compatible = "atmel,at91rm9200-gpio"; 825 reg = <0xfffffa00 0x200>; 826 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 827 #gpio-cells = <2>; 828 gpio-controller; 829 interrupt-controller; 830 #interrupt-cells = <2>; 831 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 832 }; 833 }; 834 835 pmc: pmc@fffffc00 { 836 compatible = "atmel,at91sam9rl-pmc", "syscon"; 837 reg = <0xfffffc00 0x100>; 838 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 839 #clock-cells = <2>; 840 clocks = <&clk32k>, <&main_xtal>; 841 clock-names = "slow_clk", "main_xtal"; 842 }; 843 844 rstc@fffffd00 { 845 compatible = "atmel,at91sam9260-rstc"; 846 reg = <0xfffffd00 0x10>; 847 clocks = <&clk32k>; 848 }; 849 850 shdwc@fffffd10 { 851 compatible = "atmel,at91sam9260-shdwc"; 852 reg = <0xfffffd10 0x10>; 853 clocks = <&clk32k>; 854 }; 855 856 pit: timer@fffffd30 { 857 compatible = "atmel,at91sam9260-pit"; 858 reg = <0xfffffd30 0xf>; 859 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 860 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 861 }; 862 863 watchdog@fffffd40 { 864 compatible = "atmel,at91sam9260-wdt"; 865 reg = <0xfffffd40 0x10>; 866 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 867 clocks = <&clk32k>; 868 status = "disabled"; 869 }; 870 871 clk32k: sckc@fffffd50 { 872 compatible = "atmel,at91sam9x5-sckc"; 873 reg = <0xfffffd50 0x4>; 874 clocks = <&slow_xtal>; 875 #clock-cells = <0>; 876 }; 877 878 rtc@fffffd20 { 879 compatible = "atmel,at91sam9260-rtt"; 880 reg = <0xfffffd20 0x10>; 881 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 882 clocks = <&clk32k>; 883 status = "disabled"; 884 }; 885 886 gpbr: syscon@fffffd60 { 887 compatible = "atmel,at91sam9260-gpbr", "syscon"; 888 reg = <0xfffffd60 0x10>; 889 status = "disabled"; 890 }; 891 892 rtc@fffffe00 { 893 compatible = "atmel,at91rm9200-rtc"; 894 reg = <0xfffffe00 0x40>; 895 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 896 clocks = <&clk32k>; 897 status = "disabled"; 898 }; 899 900 }; 901 }; 902 903 i2c-gpio-0 { 904 compatible = "i2c-gpio"; 905 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ 906 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ 907 i2c-gpio,sda-open-drain; 908 i2c-gpio,scl-open-drain; 909 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 910 #address-cells = <1>; 911 #size-cells = <0>; 912 pinctrl-names = "default"; 913 pinctrl-0 = <&pinctrl_i2c_gpio0>; 914 status = "disabled"; 915 }; 916 917 i2c-gpio-1 { 918 compatible = "i2c-gpio"; 919 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ 920 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ 921 i2c-gpio,sda-open-drain; 922 i2c-gpio,scl-open-drain; 923 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 924 #address-cells = <1>; 925 #size-cells = <0>; 926 pinctrl-names = "default"; 927 pinctrl-0 = <&pinctrl_i2c_gpio1>; 928 status = "disabled"; 929 }; 930}; 931
