1&l4_wkup { /* 0x44c00000 */ 2 compatible = "ti,am4-l4-wkup", "simple-bus"; 3 reg = <0x44c00000 0x800>, 4 <0x44c00800 0x800>, 5 <0x44c01000 0x400>, 6 <0x44c01400 0x400>; 7 reg-names = "ap", "la", "ia0", "ia1"; 8 #address-cells = <1>; 9 #size-cells = <1>; 10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */ 11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */ 12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */ 13 14 segment@0 { /* 0x44c00000 */ 15 compatible = "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 19 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 20 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 21 <0x00001400 0x00001400 0x000400>; /* ap 3 */ 22 }; 23 24 segment@100000 { /* 0x44d00000 */ 25 compatible = "simple-bus"; 26 #address-cells = <1>; 27 #size-cells = <1>; 28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */ 29 <0x00004000 0x00104000 0x001000>, /* ap 5 */ 30 <0x00080000 0x00180000 0x002000>, /* ap 6 */ 31 <0x00082000 0x00182000 0x001000>, /* ap 7 */ 32 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */ 33 34 target-module@0 { /* 0x44d00000, ap 4 28.0 */ 35 compatible = "ti,sysc"; 36 status = "disabled"; 37 #address-cells = <1>; 38 #size-cells = <1>; 39 ranges = <0x0 0x0 0x4000>; 40 }; 41 42 target-module@80000 { /* 0x44d80000, ap 6 10.0 */ 43 compatible = "ti,sysc"; 44 status = "disabled"; 45 #address-cells = <1>; 46 #size-cells = <1>; 47 ranges = <0x0 0x80000 0x2000>; 48 }; 49 50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */ 51 compatible = "ti,sysc-omap4", "ti,sysc"; 52 reg = <0xf0000 0x4>; 53 reg-names = "rev"; 54 #address-cells = <1>; 55 #size-cells = <1>; 56 ranges = <0x0 0xf0000 0x10000>; 57 58 prcm: prcm@0 { 59 compatible = "ti,am4-prcm", "simple-bus"; 60 reg = <0x0 0x11000>; 61 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 ranges = <0 0 0x11000>; 65 66 prcm_clocks: clocks { 67 #address-cells = <1>; 68 #size-cells = <0>; 69 }; 70 71 prcm_clockdomains: clockdomains { 72 }; 73 }; 74 }; 75 }; 76 77 segment@200000 { /* 0x44e00000 */ 78 compatible = "simple-bus"; 79 #address-cells = <1>; 80 #size-cells = <1>; 81 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */ 82 <0x00003000 0x00203000 0x001000>, /* ap 10 */ 83 <0x00004000 0x00204000 0x001000>, /* ap 11 */ 84 <0x00005000 0x00205000 0x001000>, /* ap 12 */ 85 <0x00006000 0x00206000 0x001000>, /* ap 13 */ 86 <0x00007000 0x00207000 0x001000>, /* ap 14 */ 87 <0x00008000 0x00208000 0x001000>, /* ap 15 */ 88 <0x00009000 0x00209000 0x001000>, /* ap 16 */ 89 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */ 90 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */ 91 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */ 92 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */ 93 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */ 94 <0x00010000 0x00210000 0x010000>, /* ap 22 */ 95 <0x00030000 0x00230000 0x001000>, /* ap 23 */ 96 <0x00031000 0x00231000 0x001000>, /* ap 24 */ 97 <0x00032000 0x00232000 0x001000>, /* ap 25 */ 98 <0x00033000 0x00233000 0x001000>, /* ap 26 */ 99 <0x00034000 0x00234000 0x001000>, /* ap 27 */ 100 <0x00035000 0x00235000 0x001000>, /* ap 28 */ 101 <0x00036000 0x00236000 0x001000>, /* ap 29 */ 102 <0x00037000 0x00237000 0x001000>, /* ap 30 */ 103 <0x00038000 0x00238000 0x001000>, /* ap 31 */ 104 <0x00039000 0x00239000 0x001000>, /* ap 32 */ 105 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */ 106 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */ 107 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */ 108 <0x00040000 0x00240000 0x040000>, /* ap 36 */ 109 <0x00080000 0x00280000 0x001000>, /* ap 37 */ 110 <0x00088000 0x00288000 0x008000>, /* ap 38 */ 111 <0x00092000 0x00292000 0x001000>, /* ap 39 */ 112 <0x00086000 0x00286000 0x001000>, /* ap 40 */ 113 <0x00087000 0x00287000 0x001000>, /* ap 41 */ 114 <0x00090000 0x00290000 0x001000>, /* ap 42 */ 115 <0x00091000 0x00291000 0x001000>; /* ap 43 */ 116 117 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */ 118 compatible = "ti,sysc"; 119 status = "disabled"; 120 #address-cells = <1>; 121 #size-cells = <1>; 122 ranges = <0x0 0x3000 0x1000>; 123 }; 124 125 target-module@5000 { /* 0x44e05000, ap 12 30.0 */ 126 compatible = "ti,sysc"; 127 status = "disabled"; 128 #address-cells = <1>; 129 #size-cells = <1>; 130 ranges = <0x0 0x5000 0x1000>; 131 }; 132 133 target-module@7000 { /* 0x44e07000, ap 14 20.0 */ 134 compatible = "ti,sysc-omap2", "ti,sysc"; 135 ti,hwmods = "gpio1"; 136 reg = <0x7000 0x4>, 137 <0x7010 0x4>, 138 <0x7114 0x4>; 139 reg-names = "rev", "sysc", "syss"; 140 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 141 SYSC_OMAP2_SOFTRESET | 142 SYSC_OMAP2_AUTOIDLE)>; 143 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 144 <SYSC_IDLE_NO>, 145 <SYSC_IDLE_SMART>, 146 <SYSC_IDLE_SMART_WKUP>; 147 ti,syss-mask = <1>; 148 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 149 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>, 150 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>; 151 clock-names = "fck", "dbclk"; 152 #address-cells = <1>; 153 #size-cells = <1>; 154 ranges = <0x0 0x7000 0x1000>; 155 156 gpio0: gpio@0 { 157 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 158 reg = <0x0 0x1000>; 159 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 160 gpio-controller; 161 #gpio-cells = <2>; 162 interrupt-controller; 163 #interrupt-cells = <2>; 164 status = "disabled"; 165 }; 166 }; 167 168 target-module@9000 { /* 0x44e09000, ap 16 04.0 */ 169 compatible = "ti,sysc-omap2", "ti,sysc"; 170 ti,hwmods = "uart1"; 171 reg = <0x9050 0x4>, 172 <0x9054 0x4>, 173 <0x9058 0x4>; 174 reg-names = "rev", "sysc", "syss"; 175 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 176 SYSC_OMAP2_SOFTRESET | 177 SYSC_OMAP2_AUTOIDLE)>; 178 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 179 <SYSC_IDLE_NO>, 180 <SYSC_IDLE_SMART>, 181 <SYSC_IDLE_SMART_WKUP>; 182 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 183 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>; 184 clock-names = "fck"; 185 #address-cells = <1>; 186 #size-cells = <1>; 187 ranges = <0x0 0x9000 0x1000>; 188 189 uart0: serial@0 { 190 compatible = "ti,am4372-uart","ti,omap2-uart"; 191 reg = <0x0 0x2000>; 192 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 193 }; 194 }; 195 196 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */ 197 compatible = "ti,sysc-omap2", "ti,sysc"; 198 ti,hwmods = "i2c1"; 199 reg = <0xb000 0x8>, 200 <0xb010 0x8>, 201 <0xb090 0x8>; 202 reg-names = "rev", "sysc", "syss"; 203 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 204 SYSC_OMAP2_ENAWAKEUP | 205 SYSC_OMAP2_SOFTRESET | 206 SYSC_OMAP2_AUTOIDLE)>; 207 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 208 <SYSC_IDLE_NO>, 209 <SYSC_IDLE_SMART>, 210 <SYSC_IDLE_SMART_WKUP>; 211 ti,syss-mask = <1>; 212 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 213 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>; 214 clock-names = "fck"; 215 #address-cells = <1>; 216 #size-cells = <1>; 217 ranges = <0x0 0xb000 0x1000>; 218 219 i2c0: i2c@0 { 220 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 221 reg = <0x0 0x1000>; 222 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 223 #address-cells = <1>; 224 #size-cells = <0>; 225 status = "disabled"; 226 }; 227 }; 228 229 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */ 230 compatible = "ti,sysc-omap4", "ti,sysc"; 231 ti,hwmods = "adc_tsc"; 232 reg = <0xd000 0x4>, 233 <0xd010 0x4>; 234 reg-names = "rev", "sysc"; 235 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 236 <SYSC_IDLE_NO>, 237 <SYSC_IDLE_SMART>, 238 <SYSC_IDLE_SMART_WKUP>; 239 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */ 240 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>; 241 clock-names = "fck"; 242 #address-cells = <1>; 243 #size-cells = <1>; 244 ranges = <0x0 0xd000 0x1000>; 245 246 tscadc: tscadc@0 { 247 compatible = "ti,am3359-tscadc"; 248 reg = <0x0 0x1000>; 249 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&adc_tsc_fck>; 251 clock-names = "fck"; 252 status = "disabled"; 253 dmas = <&edma 53 0>, <&edma 57 0>; 254 dma-names = "fifo0", "fifo1"; 255 256 tsc { 257 compatible = "ti,am3359-tsc"; 258 }; 259 260 adc { 261 #io-channel-cells = <1>; 262 compatible = "ti,am3359-adc"; 263 }; 264 265 }; 266 }; 267 268 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */ 269 compatible = "ti,sysc-omap4", "ti,sysc"; 270 reg = <0x10000 0x4>; 271 reg-names = "rev"; 272 #address-cells = <1>; 273 #size-cells = <1>; 274 ranges = <0x0 0x10000 0x10000>; 275 276 scm: scm@0 { 277 compatible = "ti,am4-scm", "simple-bus"; 278 reg = <0x0 0x4000>; 279 #address-cells = <1>; 280 #size-cells = <1>; 281 ranges = <0 0 0x4000>; 282 283 am43xx_pinmux: pinmux@800 { 284 compatible = "ti,am437-padconf", 285 "pinctrl-single"; 286 reg = <0x800 0x31c>; 287 #address-cells = <1>; 288 #size-cells = <0>; 289 #pinctrl-cells = <1>; 290 #interrupt-cells = <1>; 291 interrupt-controller; 292 pinctrl-single,register-width = <32>; 293 pinctrl-single,function-mask = <0xffffffff>; 294 }; 295 296 scm_conf: scm_conf@0 { 297 compatible = "syscon", "simple-bus"; 298 reg = <0x0 0x800>; 299 #address-cells = <1>; 300 #size-cells = <1>; 301 302 phy_gmii_sel: phy-gmii-sel { 303 compatible = "ti,am43xx-phy-gmii-sel"; 304 reg = <0x650 0x4>; 305 #phy-cells = <2>; 306 }; 307 308 scm_clocks: clocks { 309 #address-cells = <1>; 310 #size-cells = <0>; 311 }; 312 }; 313 314 wkup_m3_ipc: wkup_m3_ipc@1324 { 315 compatible = "ti,am4372-wkup-m3-ipc"; 316 reg = <0x1324 0x44>; 317 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 318 ti,rproc = <&wkup_m3>; 319 mboxes = <&mailbox &mbox_wkupm3>; 320 }; 321 322 edma_xbar: dma-router@f90 { 323 compatible = "ti,am335x-edma-crossbar"; 324 reg = <0xf90 0x40>; 325 #dma-cells = <3>; 326 dma-requests = <64>; 327 dma-masters = <&edma>; 328 }; 329 330 scm_clockdomains: clockdomains { 331 }; 332 }; 333 }; 334 335 target-module@31000 { /* 0x44e31000, ap 24 40.0 */ 336 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 337 ti,hwmods = "timer1"; 338 reg = <0x31000 0x4>, 339 <0x31010 0x4>, 340 <0x31014 0x4>; 341 reg-names = "rev", "sysc", "syss"; 342 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 343 SYSC_OMAP2_SOFTRESET | 344 SYSC_OMAP2_AUTOIDLE)>; 345 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 346 <SYSC_IDLE_NO>, 347 <SYSC_IDLE_SMART>; 348 ti,syss-mask = <1>; 349 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 350 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>; 351 clock-names = "fck"; 352 #address-cells = <1>; 353 #size-cells = <1>; 354 ranges = <0x0 0x31000 0x1000>; 355 356 timer1: timer@0 { 357 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 358 reg = <0x0 0x400>; 359 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 360 ti,timer-alwon; 361 clocks = <&timer1_fck>; 362 clock-names = "fck"; 363 }; 364 }; 365 366 target-module@33000 { /* 0x44e33000, ap 26 18.0 */ 367 compatible = "ti,sysc"; 368 status = "disabled"; 369 #address-cells = <1>; 370 #size-cells = <1>; 371 ranges = <0x0 0x33000 0x1000>; 372 }; 373 374 target-module@35000 { /* 0x44e35000, ap 28 50.0 */ 375 compatible = "ti,sysc-omap2", "ti,sysc"; 376 ti,hwmods = "wd_timer2"; 377 reg = <0x35000 0x4>, 378 <0x35010 0x4>, 379 <0x35014 0x4>; 380 reg-names = "rev", "sysc", "syss"; 381 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE | 382 SYSC_OMAP2_SOFTRESET)>; 383 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 384 <SYSC_IDLE_NO>, 385 <SYSC_IDLE_SMART>, 386 <SYSC_IDLE_SMART_WKUP>; 387 ti,syss-mask = <1>; 388 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 389 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>; 390 clock-names = "fck"; 391 #address-cells = <1>; 392 #size-cells = <1>; 393 ranges = <0x0 0x35000 0x1000>; 394 395 wdt: wdt@0 { 396 compatible = "ti,am4372-wdt","ti,omap3-wdt"; 397 reg = <0x0 0x1000>; 398 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 399 }; 400 }; 401 402 target-module@37000 { /* 0x44e37000, ap 30 08.0 */ 403 compatible = "ti,sysc"; 404 status = "disabled"; 405 #address-cells = <1>; 406 #size-cells = <1>; 407 ranges = <0x0 0x37000 0x1000>; 408 }; 409 410 target-module@39000 { /* 0x44e39000, ap 32 02.0 */ 411 compatible = "ti,sysc"; 412 status = "disabled"; 413 #address-cells = <1>; 414 #size-cells = <1>; 415 ranges = <0x0 0x39000 0x1000>; 416 }; 417 418 target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */ 419 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 420 ti,hwmods = "rtc"; 421 reg = <0x3e074 0x4>, 422 <0x3e078 0x4>; 423 reg-names = "rev", "sysc"; 424 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 425 <SYSC_IDLE_NO>, 426 <SYSC_IDLE_SMART>, 427 <SYSC_IDLE_SMART_WKUP>; 428 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */ 429 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>; 430 clock-names = "fck"; 431 #address-cells = <1>; 432 #size-cells = <1>; 433 ranges = <0x0 0x3e000 0x1000>; 434 435 rtc: rtc@0 { 436 compatible = "ti,am4372-rtc", "ti,am3352-rtc", 437 "ti,da830-rtc"; 438 reg = <0x0 0x1000>; 439 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH 440 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 441 clocks = <&clk_32768_ck>; 442 clock-names = "int-clk"; 443 system-power-controller; 444 status = "disabled"; 445 }; 446 }; 447 448 target-module@40000 { /* 0x44e40000, ap 36 68.0 */ 449 compatible = "ti,sysc"; 450 status = "disabled"; 451 #address-cells = <1>; 452 #size-cells = <1>; 453 ranges = <0x0 0x40000 0x40000>; 454 }; 455 456 target-module@86000 { /* 0x44e86000, ap 40 70.0 */ 457 compatible = "ti,sysc-omap2", "ti,sysc"; 458 ti,hwmods = "counter_32k"; 459 reg = <0x86000 0x4>, 460 <0x86004 0x4>; 461 reg-names = "rev", "sysc"; 462 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 463 <SYSC_IDLE_NO>; 464 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */ 465 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>; 466 clock-names = "fck"; 467 #address-cells = <1>; 468 #size-cells = <1>; 469 ranges = <0x0 0x86000 0x1000>; 470 471 counter32k: counter@0 { 472 compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 473 reg = <0x0 0x40>; 474 }; 475 }; 476 477 target-module@88000 { /* 0x44e88000, ap 38 12.0 */ 478 compatible = "ti,sysc"; 479 status = "disabled"; 480 #address-cells = <1>; 481 #size-cells = <1>; 482 ranges = <0x00000000 0x00088000 0x00008000>, 483 <0x00008000 0x00090000 0x00001000>, 484 <0x00009000 0x00091000 0x00001000>; 485 }; 486 }; 487}; 488 489&l4_fast { /* 0x4a000000 */ 490 compatible = "ti,am4-l4-fast", "simple-bus"; 491 reg = <0x4a000000 0x800>, 492 <0x4a000800 0x800>, 493 <0x4a001000 0x400>; 494 reg-names = "ap", "la", "ia0"; 495 #address-cells = <1>; 496 #size-cells = <1>; 497 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */ 498 499 segment@0 { /* 0x4a000000 */ 500 compatible = "simple-bus"; 501 #address-cells = <1>; 502 #size-cells = <1>; 503 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 504 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 505 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 506 <0x00100000 0x00100000 0x008000>, /* ap 3 */ 507 <0x00108000 0x00108000 0x001000>, /* ap 4 */ 508 <0x00400000 0x00400000 0x002000>, /* ap 5 */ 509 <0x00402000 0x00402000 0x001000>, /* ap 6 */ 510 <0x00200000 0x00200000 0x080000>, /* ap 7 */ 511 <0x00280000 0x00280000 0x001000>; /* ap 8 */ 512 513 target-module@100000 { /* 0x4a100000, ap 3 04.0 */ 514 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 515 reg = <0x101200 0x4>, 516 <0x101208 0x4>, 517 <0x101204 0x4>; 518 reg-names = "rev", "sysc", "syss"; 519 ti,sysc-mask = <0>; 520 ti,sysc-midle = <SYSC_IDLE_FORCE>, 521 <SYSC_IDLE_NO>; 522 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 523 <SYSC_IDLE_NO>; 524 ti,syss-mask = <1>; 525 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 526 clock-names = "fck"; 527 #address-cells = <1>; 528 #size-cells = <1>; 529 ranges = <0x0 0x100000 0x8000>; 530 531 mac: ethernet@0 { 532 compatible = "ti,am4372-cpsw","ti,cpsw"; 533 reg = <0x0 0x800 534 0x1200 0x100>; 535 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 536 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 537 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 538 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 539 #address-cells = <1>; 540 #size-cells = <1>; 541 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>, 542 <&dpll_clksel_mac_clk>; 543 clock-names = "fck", "cpts", "50mclk"; 544 assigned-clocks = <&dpll_clksel_mac_clk>; 545 assigned-clock-rates = <50000000>; 546 status = "disabled"; 547 cpdma_channels = <8>; 548 ale_entries = <1024>; 549 bd_ram_size = <0x2000>; 550 mac_control = <0x20>; 551 slaves = <2>; 552 active_slave = <0>; 553 cpts_clock_mult = <0x80000000>; 554 cpts_clock_shift = <29>; 555 ranges = <0 0 0x8000>; 556 syscon = <&scm_conf>; 557 558 davinci_mdio: mdio@1000 { 559 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio"; 560 reg = <0x1000 0x100>; 561 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 562 clock-names = "fck"; 563 #address-cells = <1>; 564 #size-cells = <0>; 565 bus_freq = <1000000>; 566 status = "disabled"; 567 }; 568 569 cpsw_emac0: slave@200 { 570 /* Filled in by U-Boot */ 571 mac-address = [ 00 00 00 00 00 00 ]; 572 phys = <&phy_gmii_sel 1 0>; 573 }; 574 575 cpsw_emac1: slave@300 { 576 /* Filled in by U-Boot */ 577 mac-address = [ 00 00 00 00 00 00 ]; 578 phys = <&phy_gmii_sel 2 0>; 579 }; 580 }; 581 }; 582 583 target-module@200000 { /* 0x4a200000, ap 7 02.0 */ 584 compatible = "ti,sysc"; 585 status = "disabled"; 586 #address-cells = <1>; 587 #size-cells = <1>; 588 ranges = <0x0 0x200000 0x80000>; 589 }; 590 591 target-module@400000 { /* 0x4a400000, ap 5 08.0 */ 592 compatible = "ti,sysc"; 593 status = "disabled"; 594 #address-cells = <1>; 595 #size-cells = <1>; 596 ranges = <0x0 0x400000 0x2000>; 597 }; 598 }; 599}; 600 601&l4_per { /* 0x48000000 */ 602 compatible = "ti,am4-l4-per", "simple-bus"; 603 reg = <0x48000000 0x800>, 604 <0x48000800 0x800>, 605 <0x48001000 0x400>, 606 <0x48001400 0x400>, 607 <0x48001800 0x400>, 608 <0x48001c00 0x400>; 609 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; 610 #address-cells = <1>; 611 #size-cells = <1>; 612 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */ 613 <0x00100000 0x48100000 0x100000>, /* segment 1 */ 614 <0x00200000 0x48200000 0x100000>, /* segment 2 */ 615 <0x00300000 0x48300000 0x100000>, /* segment 3 */ 616 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 617 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 618 619 segment@0 { /* 0x48000000 */ 620 compatible = "simple-bus"; 621 #address-cells = <1>; 622 #size-cells = <1>; 623 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 624 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 625 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 626 <0x00001400 0x00001400 0x000400>, /* ap 3 */ 627 <0x00001800 0x00001800 0x000400>, /* ap 4 */ 628 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */ 629 <0x00008000 0x00008000 0x001000>, /* ap 6 */ 630 <0x00009000 0x00009000 0x001000>, /* ap 7 */ 631 <0x00022000 0x00022000 0x001000>, /* ap 8 */ 632 <0x00023000 0x00023000 0x001000>, /* ap 9 */ 633 <0x00024000 0x00024000 0x001000>, /* ap 10 */ 634 <0x00025000 0x00025000 0x001000>, /* ap 11 */ 635 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */ 636 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */ 637 <0x00038000 0x00038000 0x002000>, /* ap 14 */ 638 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */ 639 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */ 640 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */ 641 <0x00040000 0x00040000 0x001000>, /* ap 18 */ 642 <0x00041000 0x00041000 0x001000>, /* ap 19 */ 643 <0x00042000 0x00042000 0x001000>, /* ap 20 */ 644 <0x00043000 0x00043000 0x001000>, /* ap 21 */ 645 <0x00044000 0x00044000 0x001000>, /* ap 22 */ 646 <0x00045000 0x00045000 0x001000>, /* ap 23 */ 647 <0x00046000 0x00046000 0x001000>, /* ap 24 */ 648 <0x00047000 0x00047000 0x001000>, /* ap 25 */ 649 <0x00048000 0x00048000 0x001000>, /* ap 26 */ 650 <0x00049000 0x00049000 0x001000>, /* ap 27 */ 651 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */ 652 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */ 653 <0x00060000 0x00060000 0x001000>, /* ap 30 */ 654 <0x00061000 0x00061000 0x001000>, /* ap 31 */ 655 <0x00080000 0x00080000 0x010000>, /* ap 32 */ 656 <0x00090000 0x00090000 0x001000>, /* ap 33 */ 657 <0x00030000 0x00030000 0x001000>, /* ap 65 */ 658 <0x00031000 0x00031000 0x001000>, /* ap 66 */ 659 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */ 660 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */ 661 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */ 662 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */ 663 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */ 664 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */ 665 <0x00034000 0x00034000 0x001000>, /* ap 80 */ 666 <0x00035000 0x00035000 0x001000>, /* ap 81 */ 667 <0x00036000 0x00036000 0x001000>, /* ap 84 */ 668 <0x00037000 0x00037000 0x001000>, /* ap 85 */ 669 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 670 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 671 672 target-module@8000 { /* 0x48008000, ap 6 10.0 */ 673 compatible = "ti,sysc"; 674 status = "disabled"; 675 #address-cells = <1>; 676 #size-cells = <1>; 677 ranges = <0x0 0x8000 0x1000>; 678 }; 679 680 target-module@22000 { /* 0x48022000, ap 8 0a.0 */ 681 compatible = "ti,sysc-omap2", "ti,sysc"; 682 ti,hwmods = "uart2"; 683 reg = <0x22050 0x4>, 684 <0x22054 0x4>, 685 <0x22058 0x4>; 686 reg-names = "rev", "sysc", "syss"; 687 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 688 SYSC_OMAP2_SOFTRESET | 689 SYSC_OMAP2_AUTOIDLE)>; 690 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 691 <SYSC_IDLE_NO>, 692 <SYSC_IDLE_SMART>, 693 <SYSC_IDLE_SMART_WKUP>; 694 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 695 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>; 696 clock-names = "fck"; 697 #address-cells = <1>; 698 #size-cells = <1>; 699 ranges = <0x0 0x22000 0x1000>; 700 701 uart1: serial@0 { 702 compatible = "ti,am4372-uart","ti,omap2-uart"; 703 reg = <0x0 0x2000>; 704 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 705 status = "disabled"; 706 }; 707 }; 708 709 target-module@24000 { /* 0x48024000, ap 10 1c.0 */ 710 compatible = "ti,sysc-omap2", "ti,sysc"; 711 ti,hwmods = "uart3"; 712 reg = <0x24050 0x4>, 713 <0x24054 0x4>, 714 <0x24058 0x4>; 715 reg-names = "rev", "sysc", "syss"; 716 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 717 SYSC_OMAP2_SOFTRESET | 718 SYSC_OMAP2_AUTOIDLE)>; 719 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 720 <SYSC_IDLE_NO>, 721 <SYSC_IDLE_SMART>, 722 <SYSC_IDLE_SMART_WKUP>; 723 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 724 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>; 725 clock-names = "fck"; 726 #address-cells = <1>; 727 #size-cells = <1>; 728 ranges = <0x0 0x24000 0x1000>; 729 730 uart2: serial@0 { 731 compatible = "ti,am4372-uart","ti,omap2-uart"; 732 reg = <0x0 0x2000>; 733 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 734 status = "disabled"; 735 }; 736 }; 737 738 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */ 739 compatible = "ti,sysc-omap2", "ti,sysc"; 740 ti,hwmods = "i2c2"; 741 reg = <0x2a000 0x8>, 742 <0x2a010 0x8>, 743 <0x2a090 0x8>; 744 reg-names = "rev", "sysc", "syss"; 745 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 746 SYSC_OMAP2_ENAWAKEUP | 747 SYSC_OMAP2_SOFTRESET | 748 SYSC_OMAP2_AUTOIDLE)>; 749 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 750 <SYSC_IDLE_NO>, 751 <SYSC_IDLE_SMART>, 752 <SYSC_IDLE_SMART_WKUP>; 753 ti,syss-mask = <1>; 754 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 755 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>; 756 clock-names = "fck"; 757 #address-cells = <1>; 758 #size-cells = <1>; 759 ranges = <0x0 0x2a000 0x1000>; 760 761 i2c1: i2c@0 { 762 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 763 reg = <0x0 0x1000>; 764 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 765 #address-cells = <1>; 766 #size-cells = <0>; 767 status = "disabled"; 768 }; 769 }; 770 771 target-module@30000 { /* 0x48030000, ap 65 08.0 */ 772 compatible = "ti,sysc-omap2", "ti,sysc"; 773 ti,hwmods = "spi0"; 774 reg = <0x30000 0x4>, 775 <0x30110 0x4>, 776 <0x30114 0x4>; 777 reg-names = "rev", "sysc", "syss"; 778 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 779 SYSC_OMAP2_SOFTRESET | 780 SYSC_OMAP2_AUTOIDLE)>; 781 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 782 <SYSC_IDLE_NO>, 783 <SYSC_IDLE_SMART>; 784 ti,syss-mask = <1>; 785 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 786 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>; 787 clock-names = "fck"; 788 #address-cells = <1>; 789 #size-cells = <1>; 790 ranges = <0x0 0x30000 0x1000>; 791 792 spi0: spi@0 { 793 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 794 reg = <0x0 0x400>; 795 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 796 #address-cells = <1>; 797 #size-cells = <0>; 798 status = "disabled"; 799 }; 800 }; 801 802 target-module@34000 { /* 0x48034000, ap 80 56.0 */ 803 compatible = "ti,sysc"; 804 status = "disabled"; 805 #address-cells = <1>; 806 #size-cells = <1>; 807 ranges = <0x0 0x34000 0x1000>; 808 }; 809 810 target-module@36000 { /* 0x48036000, ap 84 3e.0 */ 811 compatible = "ti,sysc"; 812 status = "disabled"; 813 #address-cells = <1>; 814 #size-cells = <1>; 815 ranges = <0x0 0x36000 0x1000>; 816 }; 817 818 target-module@38000 { /* 0x48038000, ap 14 04.0 */ 819 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 820 ti,hwmods = "mcasp0"; 821 reg = <0x38000 0x4>, 822 <0x38004 0x4>; 823 reg-names = "rev", "sysc"; 824 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 825 <SYSC_IDLE_NO>, 826 <SYSC_IDLE_SMART>; 827 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 828 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>; 829 clock-names = "fck"; 830 #address-cells = <1>; 831 #size-cells = <1>; 832 ranges = <0x0 0x38000 0x2000>, 833 <0x46000000 0x46000000 0x400000>; 834 835 mcasp0: mcasp@0 { 836 compatible = "ti,am33xx-mcasp-audio"; 837 reg = <0x0 0x2000>, 838 <0x46000000 0x400000>; 839 reg-names = "mpu", "dat"; 840 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 841 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 842 interrupt-names = "tx", "rx"; 843 status = "disabled"; 844 dmas = <&edma 8 2>, 845 <&edma 9 2>; 846 dma-names = "tx", "rx"; 847 }; 848 }; 849 850 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */ 851 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 852 ti,hwmods = "mcasp1"; 853 reg = <0x3c000 0x4>, 854 <0x3c004 0x4>; 855 reg-names = "rev", "sysc"; 856 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 857 <SYSC_IDLE_NO>, 858 <SYSC_IDLE_SMART>; 859 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 860 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>; 861 clock-names = "fck"; 862 #address-cells = <1>; 863 #size-cells = <1>; 864 ranges = <0x0 0x3c000 0x2000>, 865 <0x46400000 0x46400000 0x400000>; 866 867 mcasp1: mcasp@0 { 868 compatible = "ti,am33xx-mcasp-audio"; 869 reg = <0x0 0x2000>, 870 <0x46400000 0x400000>; 871 reg-names = "mpu", "dat"; 872 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 874 interrupt-names = "tx", "rx"; 875 status = "disabled"; 876 dmas = <&edma 10 2>, 877 <&edma 11 2>; 878 dma-names = "tx", "rx"; 879 }; 880 }; 881 882 target-module@40000 { /* 0x48040000, ap 18 1e.0 */ 883 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 884 ti,hwmods = "timer2"; 885 reg = <0x40000 0x4>, 886 <0x40010 0x4>, 887 <0x40014 0x4>; 888 reg-names = "rev", "sysc", "syss"; 889 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 890 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 891 <SYSC_IDLE_NO>, 892 <SYSC_IDLE_SMART>, 893 <SYSC_IDLE_SMART_WKUP>; 894 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 895 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>; 896 clock-names = "fck"; 897 #address-cells = <1>; 898 #size-cells = <1>; 899 ranges = <0x0 0x40000 0x1000>; 900 901 timer2: timer@0 { 902 compatible = "ti,am4372-timer","ti,am335x-timer"; 903 reg = <0x0 0x400>; 904 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 905 clocks = <&timer2_fck>; 906 clock-names = "fck"; 907 }; 908 }; 909 910 target-module@42000 { /* 0x48042000, ap 20 24.0 */ 911 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 912 ti,hwmods = "timer3"; 913 reg = <0x42000 0x4>, 914 <0x42010 0x4>, 915 <0x42014 0x4>; 916 reg-names = "rev", "sysc", "syss"; 917 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 918 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 919 <SYSC_IDLE_NO>, 920 <SYSC_IDLE_SMART>, 921 <SYSC_IDLE_SMART_WKUP>; 922 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 923 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>; 924 clock-names = "fck"; 925 #address-cells = <1>; 926 #size-cells = <1>; 927 ranges = <0x0 0x42000 0x1000>; 928 929 timer3: timer@0 { 930 compatible = "ti,am4372-timer","ti,am335x-timer"; 931 reg = <0x0 0x400>; 932 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 933 status = "disabled"; 934 }; 935 }; 936 937 target-module@44000 { /* 0x48044000, ap 22 26.0 */ 938 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 939 ti,hwmods = "timer4"; 940 reg = <0x44000 0x4>, 941 <0x44010 0x4>, 942 <0x44014 0x4>; 943 reg-names = "rev", "sysc", "syss"; 944 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 945 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 946 <SYSC_IDLE_NO>, 947 <SYSC_IDLE_SMART>, 948 <SYSC_IDLE_SMART_WKUP>; 949 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 950 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>; 951 clock-names = "fck"; 952 #address-cells = <1>; 953 #size-cells = <1>; 954 ranges = <0x0 0x44000 0x1000>; 955 956 timer4: timer@0 { 957 compatible = "ti,am4372-timer","ti,am335x-timer"; 958 reg = <0x0 0x400>; 959 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 960 ti,timer-pwm; 961 status = "disabled"; 962 }; 963 }; 964 965 target-module@46000 { /* 0x48046000, ap 24 28.0 */ 966 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 967 ti,hwmods = "timer5"; 968 reg = <0x46000 0x4>, 969 <0x46010 0x4>, 970 <0x46014 0x4>; 971 reg-names = "rev", "sysc", "syss"; 972 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 973 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 974 <SYSC_IDLE_NO>, 975 <SYSC_IDLE_SMART>, 976 <SYSC_IDLE_SMART_WKUP>; 977 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 978 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>; 979 clock-names = "fck"; 980 #address-cells = <1>; 981 #size-cells = <1>; 982 ranges = <0x0 0x46000 0x1000>; 983 984 timer5: timer@0 { 985 compatible = "ti,am4372-timer","ti,am335x-timer"; 986 reg = <0x0 0x400>; 987 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 988 ti,timer-pwm; 989 status = "disabled"; 990 }; 991 }; 992 993 target-module@48000 { /* 0x48048000, ap 26 1a.0 */ 994 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 995 ti,hwmods = "timer6"; 996 reg = <0x48000 0x4>, 997 <0x48010 0x4>, 998 <0x48014 0x4>; 999 reg-names = "rev", "sysc", "syss"; 1000 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1001 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1002 <SYSC_IDLE_NO>, 1003 <SYSC_IDLE_SMART>, 1004 <SYSC_IDLE_SMART_WKUP>; 1005 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1006 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>; 1007 clock-names = "fck"; 1008 #address-cells = <1>; 1009 #size-cells = <1>; 1010 ranges = <0x0 0x48000 0x1000>; 1011 1012 timer6: timer@0 { 1013 compatible = "ti,am4372-timer","ti,am335x-timer"; 1014 reg = <0x0 0x400>; 1015 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 1016 ti,timer-pwm; 1017 status = "disabled"; 1018 }; 1019 }; 1020 1021 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */ 1022 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1023 ti,hwmods = "timer7"; 1024 reg = <0x4a000 0x4>, 1025 <0x4a010 0x4>, 1026 <0x4a014 0x4>; 1027 reg-names = "rev", "sysc", "syss"; 1028 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1029 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1030 <SYSC_IDLE_NO>, 1031 <SYSC_IDLE_SMART>, 1032 <SYSC_IDLE_SMART_WKUP>; 1033 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1034 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>; 1035 clock-names = "fck"; 1036 #address-cells = <1>; 1037 #size-cells = <1>; 1038 ranges = <0x0 0x4a000 0x1000>; 1039 1040 timer7: timer@0 { 1041 compatible = "ti,am4372-timer","ti,am335x-timer"; 1042 reg = <0x0 0x400>; 1043 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 1044 ti,timer-pwm; 1045 status = "disabled"; 1046 }; 1047 }; 1048 1049 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */ 1050 compatible = "ti,sysc-omap2", "ti,sysc"; 1051 ti,hwmods = "gpio2"; 1052 reg = <0x4c000 0x4>, 1053 <0x4c010 0x4>, 1054 <0x4c114 0x4>; 1055 reg-names = "rev", "sysc", "syss"; 1056 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1057 SYSC_OMAP2_SOFTRESET | 1058 SYSC_OMAP2_AUTOIDLE)>; 1059 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1060 <SYSC_IDLE_NO>, 1061 <SYSC_IDLE_SMART>, 1062 <SYSC_IDLE_SMART_WKUP>; 1063 ti,syss-mask = <1>; 1064 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1065 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>, 1066 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>; 1067 clock-names = "fck", "dbclk"; 1068 #address-cells = <1>; 1069 #size-cells = <1>; 1070 ranges = <0x0 0x4c000 0x1000>; 1071 1072 gpio1: gpio@0 { 1073 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1074 reg = <0x0 0x1000>; 1075 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 1076 gpio-controller; 1077 #gpio-cells = <2>; 1078 interrupt-controller; 1079 #interrupt-cells = <2>; 1080 status = "disabled"; 1081 }; 1082 }; 1083 1084 target-module@60000 { /* 0x48060000, ap 30 14.0 */ 1085 compatible = "ti,sysc-omap2", "ti,sysc"; 1086 ti,hwmods = "mmc1"; 1087 reg = <0x602fc 0x4>, 1088 <0x60110 0x4>, 1089 <0x60114 0x4>; 1090 reg-names = "rev", "sysc", "syss"; 1091 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1092 SYSC_OMAP2_ENAWAKEUP | 1093 SYSC_OMAP2_SOFTRESET | 1094 SYSC_OMAP2_AUTOIDLE)>; 1095 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1096 <SYSC_IDLE_NO>, 1097 <SYSC_IDLE_SMART>; 1098 ti,syss-mask = <1>; 1099 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1100 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>; 1101 clock-names = "fck"; 1102 #address-cells = <1>; 1103 #size-cells = <1>; 1104 ranges = <0x0 0x60000 0x1000>; 1105 1106 mmc1: mmc@0 { 1107 compatible = "ti,omap4-hsmmc"; 1108 reg = <0x0 0x1000>; 1109 ti,dual-volt; 1110 ti,needs-special-reset; 1111 dmas = <&edma 24 0>, 1112 <&edma 25 0>; 1113 dma-names = "tx", "rx"; 1114 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 1115 status = "disabled"; 1116 }; 1117 }; 1118 1119 target-module@80000 { /* 0x48080000, ap 32 18.0 */ 1120 compatible = "ti,sysc-omap2", "ti,sysc"; 1121 ti,hwmods = "elm"; 1122 reg = <0x80000 0x4>, 1123 <0x80010 0x4>, 1124 <0x80014 0x4>; 1125 reg-names = "rev", "sysc", "syss"; 1126 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1127 SYSC_OMAP2_SOFTRESET | 1128 SYSC_OMAP2_AUTOIDLE)>; 1129 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1130 <SYSC_IDLE_NO>, 1131 <SYSC_IDLE_SMART>; 1132 ti,syss-mask = <1>; 1133 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1134 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>; 1135 clock-names = "fck"; 1136 #address-cells = <1>; 1137 #size-cells = <1>; 1138 ranges = <0x0 0x80000 0x10000>; 1139 1140 elm: elm@0 { 1141 compatible = "ti,am3352-elm"; 1142 reg = <0x0 0x2000>; 1143 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 1144 clocks = <&l4ls_gclk>; 1145 clock-names = "fck"; 1146 status = "disabled"; 1147 }; 1148 }; 1149 1150 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */ 1151 compatible = "ti,sysc-omap4", "ti,sysc"; 1152 ti,hwmods = "mailbox"; 1153 reg = <0xc8000 0x4>, 1154 <0xc8010 0x4>; 1155 reg-names = "rev", "sysc"; 1156 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1157 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1158 <SYSC_IDLE_NO>, 1159 <SYSC_IDLE_SMART>; 1160 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1161 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>; 1162 clock-names = "fck"; 1163 #address-cells = <1>; 1164 #size-cells = <1>; 1165 ranges = <0x0 0xc8000 0x1000>; 1166 1167 mailbox: mailbox@0 { 1168 compatible = "ti,omap4-mailbox"; 1169 reg = <0x0 0x200>; 1170 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 1171 #mbox-cells = <1>; 1172 ti,mbox-num-users = <4>; 1173 ti,mbox-num-fifos = <8>; 1174 mbox_wkupm3: wkup_m3 { 1175 ti,mbox-send-noirq; 1176 ti,mbox-tx = <0 0 0>; 1177 ti,mbox-rx = <0 0 3>; 1178 }; 1179 }; 1180 }; 1181 1182 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */ 1183 compatible = "ti,sysc-omap2", "ti,sysc"; 1184 ti,hwmods = "spinlock"; 1185 reg = <0xca000 0x4>, 1186 <0xca010 0x4>, 1187 <0xca014 0x4>; 1188 reg-names = "rev", "sysc", "syss"; 1189 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1190 SYSC_OMAP2_ENAWAKEUP | 1191 SYSC_OMAP2_SOFTRESET | 1192 SYSC_OMAP2_AUTOIDLE)>; 1193 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1194 <SYSC_IDLE_NO>, 1195 <SYSC_IDLE_SMART>; 1196 ti,syss-mask = <1>; 1197 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1198 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>; 1199 clock-names = "fck"; 1200 #address-cells = <1>; 1201 #size-cells = <1>; 1202 ranges = <0x0 0xca000 0x1000>; 1203 1204 hwspinlock: spinlock@0 { 1205 compatible = "ti,omap4-hwspinlock"; 1206 reg = <0x0 0x1000>; 1207 #hwlock-cells = <1>; 1208 }; 1209 }; 1210 }; 1211 1212 segment@100000 { /* 0x48100000 */ 1213 compatible = "simple-bus"; 1214 #address-cells = <1>; 1215 #size-cells = <1>; 1216 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */ 1217 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */ 1218 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */ 1219 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */ 1220 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */ 1221 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */ 1222 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */ 1223 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */ 1224 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */ 1225 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */ 1226 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */ 1227 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */ 1228 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */ 1229 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */ 1230 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */ 1231 <0x000af000 0x001af000 0x001000>, /* ap 49 */ 1232 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */ 1233 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */ 1234 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */ 1235 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */ 1236 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */ 1237 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */ 1238 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */ 1239 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */ 1240 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */ 1241 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */ 1242 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */ 1243 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */ 1244 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */ 1245 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */ 1246 1247 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */ 1248 compatible = "ti,sysc"; 1249 status = "disabled"; 1250 #address-cells = <1>; 1251 #size-cells = <1>; 1252 ranges = <0x0 0x8c000 0x1000>; 1253 }; 1254 1255 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */ 1256 compatible = "ti,sysc"; 1257 status = "disabled"; 1258 #address-cells = <1>; 1259 #size-cells = <1>; 1260 ranges = <0x0 0x8e000 0x1000>; 1261 }; 1262 1263 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */ 1264 compatible = "ti,sysc-omap2", "ti,sysc"; 1265 ti,hwmods = "i2c3"; 1266 reg = <0x9c000 0x8>, 1267 <0x9c010 0x8>, 1268 <0x9c090 0x8>; 1269 reg-names = "rev", "sysc", "syss"; 1270 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1271 SYSC_OMAP2_ENAWAKEUP | 1272 SYSC_OMAP2_SOFTRESET | 1273 SYSC_OMAP2_AUTOIDLE)>; 1274 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1275 <SYSC_IDLE_NO>, 1276 <SYSC_IDLE_SMART>, 1277 <SYSC_IDLE_SMART_WKUP>; 1278 ti,syss-mask = <1>; 1279 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1280 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>; 1281 clock-names = "fck"; 1282 #address-cells = <1>; 1283 #size-cells = <1>; 1284 ranges = <0x0 0x9c000 0x1000>; 1285 1286 i2c2: i2c@0 { 1287 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 1288 reg = <0x0 0x1000>; 1289 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1290 #address-cells = <1>; 1291 #size-cells = <0>; 1292 status = "disabled"; 1293 }; 1294 }; 1295 1296 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */ 1297 compatible = "ti,sysc-omap2", "ti,sysc"; 1298 ti,hwmods = "spi1"; 1299 reg = <0xa0000 0x4>, 1300 <0xa0110 0x4>, 1301 <0xa0114 0x4>; 1302 reg-names = "rev", "sysc", "syss"; 1303 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1304 SYSC_OMAP2_SOFTRESET | 1305 SYSC_OMAP2_AUTOIDLE)>; 1306 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1307 <SYSC_IDLE_NO>, 1308 <SYSC_IDLE_SMART>; 1309 ti,syss-mask = <1>; 1310 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1311 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>; 1312 clock-names = "fck"; 1313 #address-cells = <1>; 1314 #size-cells = <1>; 1315 ranges = <0x0 0xa0000 0x1000>; 1316 1317 spi1: spi@0 { 1318 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1319 reg = <0x0 0x400>; 1320 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1321 #address-cells = <1>; 1322 #size-cells = <0>; 1323 status = "disabled"; 1324 }; 1325 }; 1326 1327 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */ 1328 compatible = "ti,sysc-omap2", "ti,sysc"; 1329 ti,hwmods = "spi2"; 1330 reg = <0xa2000 0x4>, 1331 <0xa2110 0x4>, 1332 <0xa2114 0x4>; 1333 reg-names = "rev", "sysc", "syss"; 1334 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1335 SYSC_OMAP2_SOFTRESET | 1336 SYSC_OMAP2_AUTOIDLE)>; 1337 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1338 <SYSC_IDLE_NO>, 1339 <SYSC_IDLE_SMART>; 1340 ti,syss-mask = <1>; 1341 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1342 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>; 1343 clock-names = "fck"; 1344 #address-cells = <1>; 1345 #size-cells = <1>; 1346 ranges = <0x0 0xa2000 0x1000>; 1347 1348 spi2: spi@0 { 1349 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1350 reg = <0x0 0x400>; 1351 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 1352 #address-cells = <1>; 1353 #size-cells = <0>; 1354 status = "disabled"; 1355 }; 1356 }; 1357 1358 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */ 1359 compatible = "ti,sysc-omap2", "ti,sysc"; 1360 ti,hwmods = "spi3"; 1361 reg = <0xa4000 0x4>, 1362 <0xa4110 0x4>, 1363 <0xa4114 0x4>; 1364 reg-names = "rev", "sysc", "syss"; 1365 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1366 SYSC_OMAP2_SOFTRESET | 1367 SYSC_OMAP2_AUTOIDLE)>; 1368 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1369 <SYSC_IDLE_NO>, 1370 <SYSC_IDLE_SMART>; 1371 ti,syss-mask = <1>; 1372 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1373 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>; 1374 clock-names = "fck"; 1375 #address-cells = <1>; 1376 #size-cells = <1>; 1377 ranges = <0x0 0xa4000 0x1000>; 1378 1379 spi3: spi@0 { 1380 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1381 reg = <0x0 0x400>; 1382 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 status = "disabled"; 1386 }; 1387 }; 1388 1389 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */ 1390 compatible = "ti,sysc-omap2", "ti,sysc"; 1391 ti,hwmods = "uart4"; 1392 reg = <0xa6050 0x4>, 1393 <0xa6054 0x4>, 1394 <0xa6058 0x4>; 1395 reg-names = "rev", "sysc", "syss"; 1396 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1397 SYSC_OMAP2_SOFTRESET | 1398 SYSC_OMAP2_AUTOIDLE)>; 1399 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1400 <SYSC_IDLE_NO>, 1401 <SYSC_IDLE_SMART>, 1402 <SYSC_IDLE_SMART_WKUP>; 1403 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1404 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>; 1405 clock-names = "fck"; 1406 #address-cells = <1>; 1407 #size-cells = <1>; 1408 ranges = <0x0 0xa6000 0x1000>; 1409 1410 uart3: serial@0 { 1411 compatible = "ti,am4372-uart","ti,omap2-uart"; 1412 reg = <0x0 0x2000>; 1413 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 1414 status = "disabled"; 1415 }; 1416 }; 1417 1418 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */ 1419 compatible = "ti,sysc-omap2", "ti,sysc"; 1420 ti,hwmods = "uart5"; 1421 reg = <0xa8050 0x4>, 1422 <0xa8054 0x4>, 1423 <0xa8058 0x4>; 1424 reg-names = "rev", "sysc", "syss"; 1425 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1426 SYSC_OMAP2_SOFTRESET | 1427 SYSC_OMAP2_AUTOIDLE)>; 1428 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1429 <SYSC_IDLE_NO>, 1430 <SYSC_IDLE_SMART>, 1431 <SYSC_IDLE_SMART_WKUP>; 1432 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1433 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>; 1434 clock-names = "fck"; 1435 #address-cells = <1>; 1436 #size-cells = <1>; 1437 ranges = <0x0 0xa8000 0x1000>; 1438 1439 uart4: serial@0 { 1440 compatible = "ti,am4372-uart","ti,omap2-uart"; 1441 reg = <0x0 0x2000>; 1442 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 1443 status = "disabled"; 1444 }; 1445 }; 1446 1447 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */ 1448 compatible = "ti,sysc-omap2", "ti,sysc"; 1449 ti,hwmods = "uart6"; 1450 reg = <0xaa050 0x4>, 1451 <0xaa054 0x4>, 1452 <0xaa058 0x4>; 1453 reg-names = "rev", "sysc", "syss"; 1454 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1455 SYSC_OMAP2_SOFTRESET | 1456 SYSC_OMAP2_AUTOIDLE)>; 1457 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1458 <SYSC_IDLE_NO>, 1459 <SYSC_IDLE_SMART>, 1460 <SYSC_IDLE_SMART_WKUP>; 1461 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1462 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>; 1463 clock-names = "fck"; 1464 #address-cells = <1>; 1465 #size-cells = <1>; 1466 ranges = <0x0 0xaa000 0x1000>; 1467 1468 uart5: serial@0 { 1469 compatible = "ti,am4372-uart","ti,omap2-uart"; 1470 reg = <0x0 0x2000>; 1471 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 1472 status = "disabled"; 1473 }; 1474 }; 1475 1476 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */ 1477 compatible = "ti,sysc-omap2", "ti,sysc"; 1478 ti,hwmods = "gpio3"; 1479 reg = <0xac000 0x4>, 1480 <0xac010 0x4>, 1481 <0xac114 0x4>; 1482 reg-names = "rev", "sysc", "syss"; 1483 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1484 SYSC_OMAP2_SOFTRESET | 1485 SYSC_OMAP2_AUTOIDLE)>; 1486 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1487 <SYSC_IDLE_NO>, 1488 <SYSC_IDLE_SMART>, 1489 <SYSC_IDLE_SMART_WKUP>; 1490 ti,syss-mask = <1>; 1491 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1492 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>, 1493 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>; 1494 clock-names = "fck", "dbclk"; 1495 #address-cells = <1>; 1496 #size-cells = <1>; 1497 ranges = <0x0 0xac000 0x1000>; 1498 1499 gpio2: gpio@0 { 1500 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1501 reg = <0x0 0x1000>; 1502 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 1503 gpio-controller; 1504 #gpio-cells = <2>; 1505 interrupt-controller; 1506 #interrupt-cells = <2>; 1507 status = "disabled"; 1508 }; 1509 }; 1510 1511 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */ 1512 compatible = "ti,sysc-omap2", "ti,sysc"; 1513 ti,hwmods = "gpio4"; 1514 reg = <0xae000 0x4>, 1515 <0xae010 0x4>, 1516 <0xae114 0x4>; 1517 reg-names = "rev", "sysc", "syss"; 1518 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1519 SYSC_OMAP2_SOFTRESET | 1520 SYSC_OMAP2_AUTOIDLE)>; 1521 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1522 <SYSC_IDLE_NO>, 1523 <SYSC_IDLE_SMART>, 1524 <SYSC_IDLE_SMART_WKUP>; 1525 ti,syss-mask = <1>; 1526 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1527 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>, 1528 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>; 1529 clock-names = "fck", "dbclk"; 1530 #address-cells = <1>; 1531 #size-cells = <1>; 1532 ranges = <0x0 0xae000 0x1000>; 1533 1534 gpio3: gpio@0 { 1535 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1536 reg = <0x0 0x1000>; 1537 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 1538 gpio-controller; 1539 #gpio-cells = <2>; 1540 interrupt-controller; 1541 #interrupt-cells = <2>; 1542 status = "disabled"; 1543 }; 1544 }; 1545 1546 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */ 1547 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1548 ti,hwmods = "timer8"; 1549 reg = <0xc1000 0x4>, 1550 <0xc1010 0x4>, 1551 <0xc1014 0x4>; 1552 reg-names = "rev", "sysc", "syss"; 1553 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1554 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1555 <SYSC_IDLE_NO>, 1556 <SYSC_IDLE_SMART>, 1557 <SYSC_IDLE_SMART_WKUP>; 1558 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1559 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>; 1560 clock-names = "fck"; 1561 #address-cells = <1>; 1562 #size-cells = <1>; 1563 ranges = <0x0 0xc1000 0x1000>; 1564 1565 timer8: timer@0 { 1566 compatible = "ti,am4372-timer","ti,am335x-timer"; 1567 reg = <0x0 0x400>; 1568 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 1569 status = "disabled"; 1570 }; 1571 }; 1572 1573 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */ 1574 compatible = "ti,sysc-omap4", "ti,sysc"; 1575 reg = <0xcc020 0x4>; 1576 reg-names = "rev"; 1577 ti,hwmods = "d_can0"; 1578 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1579 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>; 1580 clock-names = "fck"; 1581 #address-cells = <1>; 1582 #size-cells = <1>; 1583 ranges = <0x0 0xcc000 0x2000>; 1584 1585 dcan0: can@0 { 1586 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1587 reg = <0x0 0x2000>; 1588 syscon-raminit = <&scm_conf 0x644 0>; 1589 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 1590 status = "disabled"; 1591 }; 1592 }; 1593 1594 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */ 1595 compatible = "ti,sysc-omap4", "ti,sysc"; 1596 reg = <0xd0020 0x4>; 1597 reg-names = "rev"; 1598 ti,hwmods = "d_can1"; 1599 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1600 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>; 1601 clock-names = "fck"; 1602 #address-cells = <1>; 1603 #size-cells = <1>; 1604 ranges = <0x0 0xd0000 0x2000>; 1605 1606 dcan1: can@0 { 1607 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1608 reg = <0x0 0x2000>; 1609 syscon-raminit = <&scm_conf 0x644 1>; 1610 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 1611 status = "disabled"; 1612 }; 1613 }; 1614 1615 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */ 1616 compatible = "ti,sysc-omap2", "ti,sysc"; 1617 ti,hwmods = "mmc2"; 1618 reg = <0xd82fc 0x4>, 1619 <0xd8110 0x4>, 1620 <0xd8114 0x4>; 1621 reg-names = "rev", "sysc", "syss"; 1622 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1623 SYSC_OMAP2_ENAWAKEUP | 1624 SYSC_OMAP2_SOFTRESET | 1625 SYSC_OMAP2_AUTOIDLE)>; 1626 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1627 <SYSC_IDLE_NO>, 1628 <SYSC_IDLE_SMART>; 1629 ti,syss-mask = <1>; 1630 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1631 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>; 1632 clock-names = "fck"; 1633 #address-cells = <1>; 1634 #size-cells = <1>; 1635 ranges = <0x0 0xd8000 0x1000>; 1636 1637 mmc2: mmc@0 { 1638 compatible = "ti,omap4-hsmmc"; 1639 reg = <0x0 0x1000>; 1640 ti,needs-special-reset; 1641 dmas = <&edma 2 0>, 1642 <&edma 3 0>; 1643 dma-names = "tx", "rx"; 1644 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 1645 status = "disabled"; 1646 }; 1647 }; 1648 }; 1649 1650 segment@200000 { /* 0x48200000 */ 1651 compatible = "simple-bus"; 1652 #address-cells = <1>; 1653 #size-cells = <1>; 1654 }; 1655 1656 segment@300000 { /* 0x48300000 */ 1657 compatible = "simple-bus"; 1658 #address-cells = <1>; 1659 #size-cells = <1>; 1660 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */ 1661 <0x00001000 0x00301000 0x001000>, /* ap 57 */ 1662 <0x00002000 0x00302000 0x001000>, /* ap 58 */ 1663 <0x00003000 0x00303000 0x001000>, /* ap 59 */ 1664 <0x00004000 0x00304000 0x001000>, /* ap 60 */ 1665 <0x00005000 0x00305000 0x001000>, /* ap 61 */ 1666 <0x00018000 0x00318000 0x004000>, /* ap 62 */ 1667 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */ 1668 <0x00010000 0x00310000 0x002000>, /* ap 64 */ 1669 <0x00028000 0x00328000 0x001000>, /* ap 75 */ 1670 <0x00029000 0x00329000 0x001000>, /* ap 76 */ 1671 <0x00012000 0x00312000 0x001000>, /* ap 79 */ 1672 <0x00020000 0x00320000 0x001000>, /* ap 82 */ 1673 <0x00021000 0x00321000 0x001000>, /* ap 83 */ 1674 <0x00026000 0x00326000 0x001000>, /* ap 86 */ 1675 <0x00027000 0x00327000 0x001000>, /* ap 87 */ 1676 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */ 1677 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */ 1678 <0x00013000 0x00313000 0x001000>, /* ap 90 */ 1679 <0x00014000 0x00314000 0x001000>, /* ap 91 */ 1680 <0x00006000 0x00306000 0x001000>, /* ap 96 */ 1681 <0x00007000 0x00307000 0x001000>, /* ap 97 */ 1682 <0x00008000 0x00308000 0x001000>, /* ap 98 */ 1683 <0x00009000 0x00309000 0x001000>, /* ap 99 */ 1684 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */ 1685 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */ 1686 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */ 1687 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */ 1688 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */ 1689 <0x00040000 0x00340000 0x001000>, /* ap 105 */ 1690 <0x00041000 0x00341000 0x001000>, /* ap 106 */ 1691 <0x00042000 0x00342000 0x001000>, /* ap 107 */ 1692 <0x00045000 0x00345000 0x001000>, /* ap 108 */ 1693 <0x00046000 0x00346000 0x001000>, /* ap 109 */ 1694 <0x00047000 0x00347000 0x001000>, /* ap 110 */ 1695 <0x00048000 0x00348000 0x001000>, /* ap 111 */ 1696 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */ 1697 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */ 1698 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */ 1699 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */ 1700 <0x00022000 0x00322000 0x001000>, /* ap 116 */ 1701 <0x00023000 0x00323000 0x001000>, /* ap 117 */ 1702 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */ 1703 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */ 1704 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */ 1705 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */ 1706 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */ 1707 <0x00080000 0x00380000 0x020000>, /* ap 123 */ 1708 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */ 1709 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */ 1710 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */ 1711 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */ 1712 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */ 1713 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */ 1714 1715 target-module@0 { /* 0x48300000, ap 56 40.0 */ 1716 compatible = "ti,sysc-omap4", "ti,sysc"; 1717 ti,hwmods = "epwmss0"; 1718 reg = <0x0 0x4>, 1719 <0x4 0x4>; 1720 reg-names = "rev", "sysc"; 1721 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1722 <SYSC_IDLE_NO>, 1723 <SYSC_IDLE_SMART>, 1724 <SYSC_IDLE_SMART_WKUP>; 1725 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1726 <SYSC_IDLE_NO>, 1727 <SYSC_IDLE_SMART>, 1728 <SYSC_IDLE_SMART_WKUP>; 1729 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1730 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>; 1731 clock-names = "fck"; 1732 #address-cells = <1>; 1733 #size-cells = <1>; 1734 ranges = <0x0 0x0 0x1000>; 1735 1736 epwmss0: epwmss@0 { 1737 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1738 reg = <0x0 0x10>; 1739 #address-cells = <1>; 1740 #size-cells = <1>; 1741 ranges = <0 0 0x1000>; 1742 status = "disabled"; 1743 1744 ecap0: ecap@100 { 1745 compatible = "ti,am4372-ecap", 1746 "ti,am3352-ecap", 1747 "ti,am33xx-ecap"; 1748 #pwm-cells = <3>; 1749 reg = <0x100 0x80>; 1750 clocks = <&l4ls_gclk>; 1751 clock-names = "fck"; 1752 status = "disabled"; 1753 }; 1754 1755 ehrpwm0: pwm@200 { 1756 compatible = "ti,am4372-ehrpwm", 1757 "ti,am3352-ehrpwm", 1758 "ti,am33xx-ehrpwm"; 1759 #pwm-cells = <3>; 1760 reg = <0x200 0x80>; 1761 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; 1762 clock-names = "tbclk", "fck"; 1763 status = "disabled"; 1764 }; 1765 }; 1766 }; 1767 1768 target-module@2000 { /* 0x48302000, ap 58 4a.0 */ 1769 compatible = "ti,sysc-omap4", "ti,sysc"; 1770 ti,hwmods = "epwmss1"; 1771 reg = <0x2000 0x4>, 1772 <0x2004 0x4>; 1773 reg-names = "rev", "sysc"; 1774 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1775 <SYSC_IDLE_NO>, 1776 <SYSC_IDLE_SMART>, 1777 <SYSC_IDLE_SMART_WKUP>; 1778 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1779 <SYSC_IDLE_NO>, 1780 <SYSC_IDLE_SMART>, 1781 <SYSC_IDLE_SMART_WKUP>; 1782 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1783 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>; 1784 clock-names = "fck"; 1785 #address-cells = <1>; 1786 #size-cells = <1>; 1787 ranges = <0x0 0x2000 0x1000>; 1788 1789 epwmss1: epwmss@0 { 1790 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1791 reg = <0x0 0x10>; 1792 #address-cells = <1>; 1793 #size-cells = <1>; 1794 ranges = <0 0 0x1000>; 1795 status = "disabled"; 1796 1797 ecap1: ecap@100 { 1798 compatible = "ti,am4372-ecap", 1799 "ti,am3352-ecap", 1800 "ti,am33xx-ecap"; 1801 #pwm-cells = <3>; 1802 reg = <0x100 0x80>; 1803 clocks = <&l4ls_gclk>; 1804 clock-names = "fck"; 1805 status = "disabled"; 1806 }; 1807 1808 ehrpwm1: pwm@200 { 1809 compatible = "ti,am4372-ehrpwm", 1810 "ti,am3352-ehrpwm", 1811 "ti,am33xx-ehrpwm"; 1812 #pwm-cells = <3>; 1813 reg = <0x200 0x80>; 1814 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; 1815 clock-names = "tbclk", "fck"; 1816 status = "disabled"; 1817 }; 1818 }; 1819 }; 1820 1821 target-module@4000 { /* 0x48304000, ap 60 44.0 */ 1822 compatible = "ti,sysc-omap4", "ti,sysc"; 1823 ti,hwmods = "epwmss2"; 1824 reg = <0x4000 0x4>, 1825 <0x4004 0x4>; 1826 reg-names = "rev", "sysc"; 1827 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1828 <SYSC_IDLE_NO>, 1829 <SYSC_IDLE_SMART>, 1830 <SYSC_IDLE_SMART_WKUP>; 1831 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1832 <SYSC_IDLE_NO>, 1833 <SYSC_IDLE_SMART>, 1834 <SYSC_IDLE_SMART_WKUP>; 1835 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1836 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>; 1837 clock-names = "fck"; 1838 #address-cells = <1>; 1839 #size-cells = <1>; 1840 ranges = <0x0 0x4000 0x1000>; 1841 1842 epwmss2: epwmss@0 { 1843 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1844 reg = <0x0 0x10>; 1845 #address-cells = <1>; 1846 #size-cells = <1>; 1847 ranges = <0 0 0x1000>; 1848 status = "disabled"; 1849 1850 ecap2: ecap@100 { 1851 compatible = "ti,am4372-ecap", 1852 "ti,am3352-ecap", 1853 "ti,am33xx-ecap"; 1854 #pwm-cells = <3>; 1855 reg = <0x100 0x80>; 1856 clocks = <&l4ls_gclk>; 1857 clock-names = "fck"; 1858 status = "disabled"; 1859 }; 1860 1861 ehrpwm2: pwm@200 { 1862 compatible = "ti,am4372-ehrpwm", 1863 "ti,am3352-ehrpwm", 1864 "ti,am33xx-ehrpwm"; 1865 #pwm-cells = <3>; 1866 reg = <0x200 0x80>; 1867 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; 1868 clock-names = "tbclk", "fck"; 1869 status = "disabled"; 1870 }; 1871 }; 1872 }; 1873 1874 target-module@6000 { /* 0x48306000, ap 96 58.0 */ 1875 compatible = "ti,sysc-omap4", "ti,sysc"; 1876 ti,hwmods = "epwmss3"; 1877 reg = <0x6000 0x4>, 1878 <0x6004 0x4>; 1879 reg-names = "rev", "sysc"; 1880 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1881 <SYSC_IDLE_NO>, 1882 <SYSC_IDLE_SMART>, 1883 <SYSC_IDLE_SMART_WKUP>; 1884 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1885 <SYSC_IDLE_NO>, 1886 <SYSC_IDLE_SMART>, 1887 <SYSC_IDLE_SMART_WKUP>; 1888 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1889 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>; 1890 clock-names = "fck"; 1891 #address-cells = <1>; 1892 #size-cells = <1>; 1893 ranges = <0x0 0x6000 0x1000>; 1894 1895 epwmss3: epwmss@0 { 1896 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1897 reg = <0x0 0x10>; 1898 #address-cells = <1>; 1899 #size-cells = <1>; 1900 ranges = <0 0 0x1000>; 1901 status = "disabled"; 1902 1903 ehrpwm3: pwm@200 { 1904 compatible = "ti,am4372-ehrpwm", 1905 "ti,am3352-ehrpwm", 1906 "ti,am33xx-ehrpwm"; 1907 #pwm-cells = <3>; 1908 reg = <0x200 0x80>; 1909 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>; 1910 clock-names = "tbclk", "fck"; 1911 status = "disabled"; 1912 }; 1913 }; 1914 }; 1915 1916 target-module@8000 { /* 0x48308000, ap 98 54.0 */ 1917 compatible = "ti,sysc-omap4", "ti,sysc"; 1918 ti,hwmods = "epwmss4"; 1919 reg = <0x8000 0x4>, 1920 <0x8004 0x4>; 1921 reg-names = "rev", "sysc"; 1922 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1923 <SYSC_IDLE_NO>, 1924 <SYSC_IDLE_SMART>, 1925 <SYSC_IDLE_SMART_WKUP>; 1926 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1927 <SYSC_IDLE_NO>, 1928 <SYSC_IDLE_SMART>, 1929 <SYSC_IDLE_SMART_WKUP>; 1930 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1931 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>; 1932 clock-names = "fck"; 1933 #address-cells = <1>; 1934 #size-cells = <1>; 1935 ranges = <0x0 0x8000 0x1000>; 1936 1937 epwmss4: epwmss@0 { 1938 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1939 reg = <0x0 0x10>; 1940 #address-cells = <1>; 1941 #size-cells = <1>; 1942 ranges = <0 0 0x1000>; 1943 status = "disabled"; 1944 1945 ehrpwm4: pwm@48308200 { 1946 compatible = "ti,am4372-ehrpwm", 1947 "ti,am3352-ehrpwm", 1948 "ti,am33xx-ehrpwm"; 1949 #pwm-cells = <3>; 1950 reg = <0x200 0x80>; 1951 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>; 1952 clock-names = "tbclk", "fck"; 1953 status = "disabled"; 1954 }; 1955 }; 1956 }; 1957 1958 target-module@a000 { /* 0x4830a000, ap 100 60.0 */ 1959 compatible = "ti,sysc-omap4", "ti,sysc"; 1960 ti,hwmods = "epwmss5"; 1961 reg = <0xa000 0x4>, 1962 <0xa004 0x4>; 1963 reg-names = "rev", "sysc"; 1964 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1965 <SYSC_IDLE_NO>, 1966 <SYSC_IDLE_SMART>, 1967 <SYSC_IDLE_SMART_WKUP>; 1968 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1969 <SYSC_IDLE_NO>, 1970 <SYSC_IDLE_SMART>, 1971 <SYSC_IDLE_SMART_WKUP>; 1972 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1973 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>; 1974 clock-names = "fck"; 1975 #address-cells = <1>; 1976 #size-cells = <1>; 1977 ranges = <0x0 0xa000 0x1000>; 1978 1979 epwmss5: epwmss@0 { 1980 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1981 reg = <0x0 0x10>; 1982 #address-cells = <1>; 1983 #size-cells = <1>; 1984 ranges = <0 0 0x1000>; 1985 status = "disabled"; 1986 1987 ehrpwm5: pwm@200 { 1988 compatible = "ti,am4372-ehrpwm", 1989 "ti,am3352-ehrpwm", 1990 "ti,am33xx-ehrpwm"; 1991 #pwm-cells = <3>; 1992 reg = <0x200 0x80>; 1993 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>; 1994 clock-names = "tbclk", "fck"; 1995 status = "disabled"; 1996 }; 1997 }; 1998 }; 1999 2000 target-module@10000 { /* 0x48310000, ap 64 4e.1 */ 2001 compatible = "ti,sysc-omap2", "ti,sysc"; 2002 ti,hwmods = "rng"; 2003 reg = <0x11fe0 0x4>, 2004 <0x11fe4 0x4>; 2005 reg-names = "rev", "sysc"; 2006 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>; 2007 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2008 <SYSC_IDLE_NO>; 2009 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2010 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>; 2011 clock-names = "fck"; 2012 #address-cells = <1>; 2013 #size-cells = <1>; 2014 ranges = <0x0 0x10000 0x2000>; 2015 2016 rng: rng@0 { 2017 compatible = "ti,omap4-rng"; 2018 reg = <0x0 0x2000>; 2019 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 2020 }; 2021 }; 2022 2023 target-module@13000 { /* 0x48313000, ap 90 50.0 */ 2024 compatible = "ti,sysc"; 2025 status = "disabled"; 2026 #address-cells = <1>; 2027 #size-cells = <1>; 2028 ranges = <0x0 0x13000 0x1000>; 2029 }; 2030 2031 target-module@18000 { /* 0x48318000, ap 62 4c.0 */ 2032 compatible = "ti,sysc"; 2033 status = "disabled"; 2034 #address-cells = <1>; 2035 #size-cells = <1>; 2036 ranges = <0x0 0x18000 0x4000>; 2037 }; 2038 2039 target-module@20000 { /* 0x48320000, ap 82 34.0 */ 2040 compatible = "ti,sysc-omap2", "ti,sysc"; 2041 ti,hwmods = "gpio5"; 2042 reg = <0x20000 0x4>, 2043 <0x20010 0x4>, 2044 <0x20114 0x4>; 2045 reg-names = "rev", "sysc", "syss"; 2046 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 2047 SYSC_OMAP2_SOFTRESET | 2048 SYSC_OMAP2_AUTOIDLE)>; 2049 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2050 <SYSC_IDLE_NO>, 2051 <SYSC_IDLE_SMART>, 2052 <SYSC_IDLE_SMART_WKUP>; 2053 ti,syss-mask = <1>; 2054 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2055 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>, 2056 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>; 2057 clock-names = "fck", "dbclk"; 2058 #address-cells = <1>; 2059 #size-cells = <1>; 2060 ranges = <0x0 0x20000 0x1000>; 2061 2062 gpio4: gpio@0 { 2063 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 2064 reg = <0x0 0x1000>; 2065 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 2066 gpio-controller; 2067 #gpio-cells = <2>; 2068 interrupt-controller; 2069 #interrupt-cells = <2>; 2070 status = "disabled"; 2071 }; 2072 }; 2073 2074 target-module@22000 { /* 0x48322000, ap 116 64.0 */ 2075 compatible = "ti,sysc-omap2", "ti,sysc"; 2076 ti,hwmods = "gpio6"; 2077 reg = <0x22000 0x4>, 2078 <0x22010 0x4>, 2079 <0x22114 0x4>; 2080 reg-names = "rev", "sysc", "syss"; 2081 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 2082 SYSC_OMAP2_SOFTRESET | 2083 SYSC_OMAP2_AUTOIDLE)>; 2084 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2085 <SYSC_IDLE_NO>, 2086 <SYSC_IDLE_SMART>, 2087 <SYSC_IDLE_SMART_WKUP>; 2088 ti,syss-mask = <1>; 2089 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2090 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>, 2091 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>; 2092 clock-names = "fck", "dbclk"; 2093 #address-cells = <1>; 2094 #size-cells = <1>; 2095 ranges = <0x0 0x22000 0x1000>; 2096 2097 gpio5: gpio@0 { 2098 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 2099 reg = <0x0 0x1000>; 2100 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2101 gpio-controller; 2102 #gpio-cells = <2>; 2103 interrupt-controller; 2104 #interrupt-cells = <2>; 2105 status = "disabled"; 2106 }; 2107 }; 2108 2109 target-module@26000 { /* 0x48326000, ap 86 66.0 */ 2110 compatible = "ti,sysc-omap4", "ti,sysc"; 2111 ti,hwmods = "vpfe0"; 2112 reg = <0x26000 0x4>, 2113 <0x26104 0x4>; 2114 reg-names = "rev", "sysc"; 2115 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2116 <SYSC_IDLE_NO>, 2117 <SYSC_IDLE_SMART>; 2118 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2119 <SYSC_IDLE_NO>, 2120 <SYSC_IDLE_SMART>; 2121 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2122 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>; 2123 clock-names = "fck"; 2124 #address-cells = <1>; 2125 #size-cells = <1>; 2126 ranges = <0x0 0x26000 0x1000>; 2127 2128 vpfe0: vpfe@0 { 2129 compatible = "ti,am437x-vpfe"; 2130 reg = <0x0 0x2000>; 2131 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 2132 status = "disabled"; 2133 }; 2134 }; 2135 2136 target-module@28000 { /* 0x48328000, ap 75 0e.0 */ 2137 compatible = "ti,sysc-omap4", "ti,sysc"; 2138 ti,hwmods = "vpfe1"; 2139 reg = <0x28000 0x4>, 2140 <0x28104 0x4>; 2141 reg-names = "rev", "sysc"; 2142 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2143 <SYSC_IDLE_NO>, 2144 <SYSC_IDLE_SMART>; 2145 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2146 <SYSC_IDLE_NO>, 2147 <SYSC_IDLE_SMART>; 2148 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2149 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>; 2150 clock-names = "fck"; 2151 #address-cells = <1>; 2152 #size-cells = <1>; 2153 ranges = <0x0 0x28000 0x1000>; 2154 2155 vpfe1: vpfe@0 { 2156 compatible = "ti,am437x-vpfe"; 2157 reg = <0x0 0x2000>; 2158 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 2159 status = "disabled"; 2160 }; 2161 }; 2162 2163 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */ 2164 compatible = "ti,sysc-omap2", "ti,sysc"; 2165 ti,hwmods = "dss_core"; 2166 reg = <0x2a000 0x4>, 2167 <0x2a010 0x4>, 2168 <0x2a014 0x4>; 2169 reg-names = "rev", "sysc", "syss"; 2170 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2171 SYSC_OMAP2_AUTOIDLE)>; 2172 ti,syss-mask = <1>; 2173 /* Domains (P, C): per_pwrdm, dss_clkdm */ 2174 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>; 2175 clock-names = "fck"; 2176 #address-cells = <1>; 2177 #size-cells = <1>; 2178 ranges = <0x00000000 0x0002a000 0x00000400>, 2179 <0x00000400 0x0002a400 0x00000400>, 2180 <0x00000800 0x0002a800 0x00000400>, 2181 <0x00000c00 0x0002ac00 0x00000400>, 2182 <0x00001000 0x0002b000 0x00001000>; 2183 }; 2184 2185 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */ 2186 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2187 ti,hwmods = "timer9"; 2188 reg = <0x3d000 0x4>, 2189 <0x3d010 0x4>, 2190 <0x3d014 0x4>; 2191 reg-names = "rev", "sysc", "syss"; 2192 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2193 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2194 <SYSC_IDLE_NO>, 2195 <SYSC_IDLE_SMART>, 2196 <SYSC_IDLE_SMART_WKUP>; 2197 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2198 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>; 2199 clock-names = "fck"; 2200 #address-cells = <1>; 2201 #size-cells = <1>; 2202 ranges = <0x0 0x3d000 0x1000>; 2203 2204 timer9: timer@0 { 2205 compatible = "ti,am4372-timer","ti,am335x-timer"; 2206 reg = <0x0 0x400>; 2207 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 2208 status = "disabled"; 2209 }; 2210 }; 2211 2212 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */ 2213 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2214 ti,hwmods = "timer10"; 2215 reg = <0x3f000 0x4>, 2216 <0x3f010 0x4>, 2217 <0x3f014 0x4>; 2218 reg-names = "rev", "sysc", "syss"; 2219 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2220 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2221 <SYSC_IDLE_NO>, 2222 <SYSC_IDLE_SMART>, 2223 <SYSC_IDLE_SMART_WKUP>; 2224 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2225 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>; 2226 clock-names = "fck"; 2227 #address-cells = <1>; 2228 #size-cells = <1>; 2229 ranges = <0x0 0x3f000 0x1000>; 2230 2231 timer10: timer@0 { 2232 compatible = "ti,am4372-timer","ti,am335x-timer"; 2233 reg = <0x0 0x400>; 2234 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 2235 status = "disabled"; 2236 }; 2237 }; 2238 2239 target-module@41000 { /* 0x48341000, ap 106 76.0 */ 2240 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 2241 ti,hwmods = "timer11"; 2242 reg = <0x41000 0x4>, 2243 <0x41010 0x4>, 2244 <0x41014 0x4>; 2245 reg-names = "rev", "sysc", "syss"; 2246 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 2247 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2248 <SYSC_IDLE_NO>, 2249 <SYSC_IDLE_SMART>, 2250 <SYSC_IDLE_SMART_WKUP>; 2251 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2252 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>; 2253 clock-names = "fck"; 2254 #address-cells = <1>; 2255 #size-cells = <1>; 2256 ranges = <0x0 0x41000 0x1000>; 2257 2258 timer11: timer@0 { 2259 compatible = "ti,am4372-timer","ti,am335x-timer"; 2260 reg = <0x0 0x400>; 2261 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 2262 status = "disabled"; 2263 }; 2264 }; 2265 2266 target-module@45000 { /* 0x48345000, ap 108 6a.0 */ 2267 compatible = "ti,sysc-omap2", "ti,sysc"; 2268 ti,hwmods = "spi4"; 2269 reg = <0x45000 0x4>, 2270 <0x45110 0x4>, 2271 <0x45114 0x4>; 2272 reg-names = "rev", "sysc", "syss"; 2273 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 2274 SYSC_OMAP2_SOFTRESET | 2275 SYSC_OMAP2_AUTOIDLE)>; 2276 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2277 <SYSC_IDLE_NO>, 2278 <SYSC_IDLE_SMART>; 2279 ti,syss-mask = <1>; 2280 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2281 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>; 2282 clock-names = "fck"; 2283 #address-cells = <1>; 2284 #size-cells = <1>; 2285 ranges = <0x0 0x45000 0x1000>; 2286 2287 spi4: spi@0 { 2288 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 2289 reg = <0x0 0x400>; 2290 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 2291 #address-cells = <1>; 2292 #size-cells = <0>; 2293 status = "disabled"; 2294 }; 2295 }; 2296 2297 target-module@47000 { /* 0x48347000, ap 110 70.0 */ 2298 compatible = "ti,sysc-omap2", "ti,sysc"; 2299 ti,hwmods = "hdq1w"; 2300 reg = <0x47000 0x4>, 2301 <0x47014 0x4>, 2302 <0x47018 0x4>; 2303 reg-names = "rev", "sysc", "syss"; 2304 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | 2305 SYSC_OMAP2_AUTOIDLE)>; 2306 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2307 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>; 2308 clock-names = "fck"; 2309 #address-cells = <1>; 2310 #size-cells = <1>; 2311 ranges = <0x0 0x47000 0x1000>; 2312 2313 hdq: hdq@0 { 2314 compatible = "ti,am4372-hdq"; 2315 reg = <0x0 0x1000>; 2316 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 2317 clocks = <&func_12m_clk>; 2318 clock-names = "fck"; 2319 status = "disabled"; 2320 }; 2321 }; 2322 2323 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */ 2324 compatible = "ti,sysc"; 2325 status = "disabled"; 2326 #address-cells = <1>; 2327 #size-cells = <1>; 2328 ranges = <0x0 0x4c000 0x2000>; 2329 }; 2330 2331 target-module@80000 { /* 0x48380000, ap 123 42.0 */ 2332 compatible = "ti,sysc-omap4", "ti,sysc"; 2333 ti,hwmods = "usb_otg_ss0"; 2334 reg = <0x80000 0x4>, 2335 <0x80010 0x4>; 2336 reg-names = "rev", "sysc"; 2337 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>; 2338 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2339 <SYSC_IDLE_NO>, 2340 <SYSC_IDLE_SMART>, 2341 <SYSC_IDLE_SMART_WKUP>; 2342 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2343 <SYSC_IDLE_NO>, 2344 <SYSC_IDLE_SMART>, 2345 <SYSC_IDLE_SMART_WKUP>; 2346 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2347 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>; 2348 clock-names = "fck"; 2349 #address-cells = <1>; 2350 #size-cells = <1>; 2351 ranges = <0x0 0x80000 0x20000>; 2352 2353 dwc3_1: omap_dwc3@0 { 2354 compatible = "ti,am437x-dwc3"; 2355 reg = <0x0 0x10000>; 2356 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 2357 #address-cells = <1>; 2358 #size-cells = <1>; 2359 utmi-mode = <1>; 2360 ranges = <0 0 0x20000>; 2361 2362 usb1: usb@10000 { 2363 compatible = "synopsys,dwc3"; 2364 reg = <0x10000 0x10000>; 2365 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 2366 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 2367 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 2368 interrupt-names = "peripheral", 2369 "host", 2370 "otg"; 2371 phys = <&usb2_phy1>; 2372 phy-names = "usb2-phy"; 2373 maximum-speed = "high-speed"; 2374 dr_mode = "otg"; 2375 status = "disabled"; 2376 snps,dis_u3_susphy_quirk; 2377 snps,dis_u2_susphy_quirk; 2378 }; 2379 }; 2380 }; 2381 2382 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */ 2383 compatible = "ti,sysc-omap4", "ti,sysc"; 2384 ti,hwmods = "ocp2scp0"; 2385 reg = <0xa8000 0x4>; 2386 reg-names = "rev"; 2387 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2388 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>; 2389 clock-names = "fck"; 2390 #address-cells = <1>; 2391 #size-cells = <1>; 2392 ranges = <0x0 0xa8000 0x8000>; 2393 2394 ocp2scp0: ocp2scp@0 { 2395 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 2396 #address-cells = <1>; 2397 #size-cells = <1>; 2398 ranges = <0 0 0x8000>; 2399 2400 usb2_phy1: phy@8000 { 2401 compatible = "ti,am437x-usb2"; 2402 reg = <0x0 0x8000>; 2403 syscon-phy-power = <&scm_conf 0x620>; 2404 clocks = <&usb_phy0_always_on_clk32k>, 2405 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>; 2406 clock-names = "wkupclk", "refclk"; 2407 #phy-cells = <0>; 2408 status = "disabled"; 2409 }; 2410 }; 2411 }; 2412 2413 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */ 2414 compatible = "ti,sysc-omap4", "ti,sysc"; 2415 ti,hwmods = "usb_otg_ss1"; 2416 reg = <0xc0000 0x4>, 2417 <0xc0010 0x4>; 2418 reg-names = "rev", "sysc"; 2419 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>; 2420 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2421 <SYSC_IDLE_NO>, 2422 <SYSC_IDLE_SMART>, 2423 <SYSC_IDLE_SMART_WKUP>; 2424 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2425 <SYSC_IDLE_NO>, 2426 <SYSC_IDLE_SMART>, 2427 <SYSC_IDLE_SMART_WKUP>; 2428 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 2429 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>; 2430 clock-names = "fck"; 2431 #address-cells = <1>; 2432 #size-cells = <1>; 2433 ranges = <0x0 0xc0000 0x20000>; 2434 2435 dwc3_2: omap_dwc3@0 { 2436 compatible = "ti,am437x-dwc3"; 2437 reg = <0x0 0x10000>; 2438 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 2439 #address-cells = <1>; 2440 #size-cells = <1>; 2441 utmi-mode = <1>; 2442 ranges = <0 0 0x20000>; 2443 2444 usb2: usb@10000 { 2445 compatible = "synopsys,dwc3"; 2446 reg = <0x10000 0x10000>; 2447 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 2448 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 2449 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 2450 interrupt-names = "peripheral", 2451 "host", 2452 "otg"; 2453 phys = <&usb2_phy2>; 2454 phy-names = "usb2-phy"; 2455 maximum-speed = "high-speed"; 2456 dr_mode = "otg"; 2457 status = "disabled"; 2458 snps,dis_u3_susphy_quirk; 2459 snps,dis_u2_susphy_quirk; 2460 }; 2461 }; 2462 }; 2463 2464 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */ 2465 compatible = "ti,sysc-omap4", "ti,sysc"; 2466 ti,hwmods = "ocp2scp1"; 2467 reg = <0xe8000 0x4>; 2468 reg-names = "rev"; 2469 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2470 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>; 2471 clock-names = "fck"; 2472 #address-cells = <1>; 2473 #size-cells = <1>; 2474 ranges = <0x0 0xe8000 0x8000>; 2475 2476 ocp2scp1: ocp2scp@0 { 2477 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 2478 #address-cells = <1>; 2479 #size-cells = <1>; 2480 ranges = <0 0 0x8000>; 2481 2482 usb2_phy2: phy@8000 { 2483 compatible = "ti,am437x-usb2"; 2484 reg = <0x0 0x8000>; 2485 syscon-phy-power = <&scm_conf 0x628>; 2486 clocks = <&usb_phy1_always_on_clk32k>, 2487 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>; 2488 clock-names = "wkupclk", "refclk"; 2489 #phy-cells = <0>; 2490 status = "disabled"; 2491 }; 2492 }; 2493 }; 2494 2495 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */ 2496 compatible = "ti,sysc"; 2497 status = "disabled"; 2498 #address-cells = <1>; 2499 #size-cells = <1>; 2500 ranges = <0x0 0xf2000 0x2000>; 2501 }; 2502 }; 2503}; 2504 2505
