1================
2MSR Trace Events
3================
4
5The x86 kernel supports tracing most MSR (Model Specific Register) accesses.
6To see the definition of the MSRs on Intel systems please see the SDM
7at http://www.intel.com/sdm (Volume 3)
8
9Available trace points:
10
11/sys/kernel/debug/tracing/events/msr/
12
13Trace MSR reads:
14
15read_msr
16
17  - msr: MSR number
18  - val: Value written
19  - failed: 1 if the access failed, otherwise 0
20
21
22Trace MSR writes:
23
24write_msr
25
26  - msr: MSR number
27  - val: Value written
28  - failed: 1 if the access failed, otherwise 0
29
30
31Trace RDPMC in kernel:
32
33rdpmc
34
35The trace data can be post processed with the postprocess/decode_msr.py script::
36
37  cat /sys/kernel/debug/tracing/trace | decode_msr.py /usr/src/linux/include/asm/msr-index.h
38
39to add symbolic MSR names.
40
41