1* Rockchip SPI Controller 2 3The Rockchip SPI controller is used to interface with various devices such as flash 4and display controllers using the SPI communication interface. 5 6Required Properties: 7 8- compatible: should be one of the following. 9 "rockchip,rv1108-spi" for rv1108 SoCs. 10 "rockchip,px30-spi", "rockchip,rk3066-spi" for px30 SoCs. 11 "rockchip,rk3036-spi" for rk3036 SoCS. 12 "rockchip,rk3066-spi" for rk3066 SoCs. 13 "rockchip,rk3188-spi" for rk3188 SoCs. 14 "rockchip,rk3228-spi" for rk3228 SoCS. 15 "rockchip,rk3288-spi" for rk3288 SoCs. 16 "rockchip,rk3368-spi" for rk3368 SoCs. 17 "rockchip,rk3399-spi" for rk3399 SoCs. 18- reg: physical base address of the controller and length of memory mapped 19 region. 20- interrupts: The interrupt number to the cpu. The interrupt specifier format 21 depends on the interrupt controller. 22- clocks: Must contain an entry for each entry in clock-names. 23- clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for 24 the peripheral clock. 25- #address-cells: should be 1. 26- #size-cells: should be 0. 27 28Optional Properties: 29 30- dmas: DMA specifiers for tx and rx dma. See the DMA client binding, 31 Documentation/devicetree/bindings/dma/dma.txt 32- dma-names: DMA request names should include "tx" and "rx" if present. 33- rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling 34 Rx data (may need to be fine tuned for high capacitance lines). 35 No delay (0) by default. 36- pinctrl-names: Names for the pin configuration(s); may be "default" or 37 "sleep", where the "sleep" configuration may describe the state 38 the pins should be in during system suspend. See also 39 pinctrl/pinctrl-bindings.txt. 40 41 42Example: 43 44 spi0: spi@ff110000 { 45 compatible = "rockchip,rk3066-spi"; 46 reg = <0xff110000 0x1000>; 47 dmas = <&pdma1 11>, <&pdma1 12>; 48 dma-names = "tx", "rx"; 49 rx-sample-delay-ns = <10>; 50 #address-cells = <1>; 51 #size-cells = <0>; 52 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 53 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; 54 clock-names = "spiclk", "apb_pclk"; 55 pinctrl-0 = <&spi1_pins>; 56 pinctrl-1 = <&spi1_sleep>; 57 pinctrl-names = "default", "sleep"; 58 }; 59