1Qualcomm QUSB2 phy controller 2============================= 3 4QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets. 5 6Required properties: 7 - compatible: compatible list, contains 8 "qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996, 9 "qcom,msm8998-qusb2-phy" for 10nm PHY on msm8998, 10 "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845. 11 12 - reg: offset and length of the PHY register set. 13 - #phy-cells: must be 0. 14 15 - clocks: a list of phandles and clock-specifier pairs, 16 one for each entry in clock-names. 17 - clock-names: must be "cfg_ahb" for phy config clock, 18 "ref" for 19.2 MHz ref clk, 19 "iface" for phy interface clock (Optional). 20 21 - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block. 22 - vdda-phy-dpdm-supply: Phandle to 3.1V regulator supply to Dp/Dm port signals. 23 24 - resets: Phandle to reset to phy block. 25 26Optional properties: 27 - nvmem-cells: Phandle to nvmem cell that contains 'HS Tx trim' 28 tuning parameter value for qusb2 phy. 29 30 - qcom,tcsr-syscon: Phandle to TCSR syscon register region. 31 - qcom,imp-res-offset-value: It is a 6 bit value that specifies offset to be 32 added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY 33 tuning parameter that may vary for different boards of same SOC. 34 This property is applicable to only QUSB2 v2 PHY (sdm845). 35 - qcom,hstx-trim-value: It is a 4 bit value that specifies tuning for HSTX 36 output current. 37 Possible range is - 15mA to 24mA (stepsize of 600 uA). 38 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. 39 This property is applicable to only QUSB2 v2 PHY (sdm845). 40 Default value is 22.2mA for sdm845. 41 - qcom,preemphasis-level: It is a 2 bit value that specifies pre-emphasis level. 42 Possible range is 0 to 15% (stepsize of 5%). 43 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. 44 This property is applicable to only QUSB2 v2 PHY (sdm845). 45 Default value is 10% for sdm845. 46- qcom,preemphasis-width: It is a 1 bit value that specifies how long the HSTX 47 pre-emphasis (specified using qcom,preemphasis-level) must be in 48 effect. Duration could be half-bit of full-bit. 49 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. 50 This property is applicable to only QUSB2 v2 PHY (sdm845). 51 Default value is full-bit width for sdm845. 52 53Example: 54 hsusb_phy: phy@7411000 { 55 compatible = "qcom,msm8996-qusb2-phy"; 56 reg = <0x7411000 0x180>; 57 #phy-cells = <0>; 58 59 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, 60 <&gcc GCC_RX1_USB2_CLKREF_CLK>, 61 clock-names = "cfg_ahb", "ref"; 62 63 vdda-pll-supply = <&pm8994_l12>; 64 vdda-phy-dpdm-supply = <&pm8994_l24>; 65 66 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 67 nvmem-cells = <&qusb2p_hstx_trim>; 68 }; 69