1UniPhier SD/eMMC controller 2 3Required properties: 4- compatible: should be one of the following: 5 "socionext,uniphier-sd-v2.91" - IP version 2.91 6 "socionext,uniphier-sd-v3.1" - IP version 3.1 7 "socionext,uniphier-sd-v3.1.1" - IP version 3.1.1 8- reg: offset and length of the register set for the device. 9- interrupts: a single interrupt specifier. 10- clocks: a single clock specifier of the controller clock. 11- reset-names: should contain the following: 12 "host" - mandatory for all versions 13 "bridge" - should exist only for "socionext,uniphier-sd-v2.91" 14 "hw" - should exist if eMMC hw reset line is available 15- resets: a list of reset specifiers, corresponding to the reset-names 16 17Optional properties: 18- pinctrl-names: if present, should contain the following: 19 "default" - should exist for all instances 20 "uhs" - should exist for SD instance with UHS support 21- pinctrl-0: pin control state for the default mode 22- pinctrl-1: pin control state for the UHS mode 23- dma-names: should be "rx-tx" if present. 24 This property can exist only for "socionext,uniphier-sd-v2.91". 25- dmas: a single DMA channel specifier 26 This property can exist only for "socionext,uniphier-sd-v2.91". 27- bus-width: see mmc.txt 28- cap-sd-highspeed: see mmc.txt 29- cap-mmc-highspeed: see mmc.txt 30- sd-uhs-sdr12: see mmc.txt 31- sd-uhs-sdr25: see mmc.txt 32- sd-uhs-sdr50: see mmc.txt 33- cap-mmc-hw-reset: should exist if reset-names contains "hw". see mmc.txt 34- non-removable: see mmc.txt 35 36Example: 37 38 sd: sdhc@5a400000 { 39 compatible = "socionext,uniphier-sd-v2.91"; 40 reg = <0x5a400000 0x200>; 41 interrupts = <0 76 4>; 42 pinctrl-names = "default", "uhs"; 43 pinctrl-0 = <&pinctrl_sd>; 44 pinctrl-1 = <&pinctrl_sd_uhs>; 45 clocks = <&mio_clk 0>; 46 reset-names = "host", "bridge"; 47 resets = <&mio_rst 0>, <&mio_rst 3>; 48 dma-names = "rx-tx"; 49 dmas = <&dmac 4>; 50 bus-width = <4>; 51 cap-sd-highspeed; 52 sd-uhs-sdr12; 53 sd-uhs-sdr25; 54 sd-uhs-sdr50; 55 }; 56