1Device Tree Bindings for the SDHCI Controllers present on TI's AM654 SOCs
2
3The bindings follow the mmc[1], clock[2] and interrupt[3] bindings.
4Only deviations are documented here.
5
6  [1] Documentation/devicetree/bindings/mmc/mmc.txt
7  [2] Documentation/devicetree/bindings/clock/clock-bindings.txt
8  [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
9
10Required Properties:
11	- compatible: should be one of:
12			"ti,am654-sdhci-5.1": SDHCI on AM654 device.
13			"ti,j721e-sdhci-8bit": 8 bit SDHCI on J721E device.
14			"ti,j721e-sdhci-4bit": 4 bit SDHCI on J721E device.
15	- reg: Must be two entries.
16		- The first should be the sdhci register space
17		- The second should the subsystem/phy register space
18	- clocks: Handles to the clock inputs.
19	- clock-names: Tuple including "clk_xin" and "clk_ahb"
20	- interrupts: Interrupt specifiers
21	- ti,otap-del-sel: Output Tap Delay select
22
23Optional Properties (Required for ti,am654-sdhci-5.1 and ti,j721e-sdhci-8bit):
24	- ti,trm-icp: DLL trim select
25	- ti,driver-strength-ohm: driver strength in ohms.
26				  Valid values are 33, 40, 50, 66 and 100 ohms.
27Optional Properties:
28	- ti,strobe-sel: strobe select delay for HS400 speed mode. Default value: 0x0.
29
30Example:
31
32	sdhci0: sdhci@4f80000 {
33		compatible = "ti,am654-sdhci-5.1";
34		reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
35		power-domains = <&k3_pds 47>;
36		clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
37		clock-names = "clk_ahb", "clk_xin";
38		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
39		sdhci-caps-mask = <0x80000007 0x0>;
40		mmc-ddr-1_8v;
41		ti,otap-del-sel = <0x2>;
42		ti,trm-icp = <0x8>;
43	};
44