1MediaTek GCE
2===============
3
4The Global Command Engine (GCE) is used to help read/write registers with
5critical time limitation, such as updating display configuration during the
6vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
7
8CMDQ driver uses mailbox framework for communication. Please refer to
9mailbox.txt for generic information about mailbox device-tree bindings.
10
11Required properties:
12- compatible: can be "mediatek,mt8173-gce" or "mediatek,mt8183-gce"
13- reg: Address range of the GCE unit
14- interrupts: The interrupt signal from the GCE block
15- clock: Clocks according to the common clock binding
16- clock-names: Must be "gce" to stand for GCE clock
17- #mbox-cells: Should be 3.
18	<&phandle channel priority atomic_exec>
19	phandle: Label name of a gce node.
20	channel: Channel of mailbox. Be equal to the thread id of GCE.
21	priority: Priority of GCE thread.
22	atomic_exec: GCE processing continuous packets of commands in atomic
23		way.
24
25Required properties for a client device:
26- mboxes: Client use mailbox to communicate with GCE, it should have this
27  property and list of phandle, mailbox specifiers.
28Optional properties for a client device:
29- mediatek,gce-client-reg: Specify the sub-system id which is corresponding
30  to the register address, it should have this property and list of phandle,
31  sub-system specifiers.
32  <&phandle subsys_number start_offset size>
33  phandle: Label name of a gce node.
34  subsys_number: specify the sub-system id which is corresponding
35                 to the register address.
36  start_offset: the start offset of register address that GCE can access.
37  size: the total size of register address that GCE can access.
38
39Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h'
40or 'dt-binding/gce/mt8183-gce.h'. Such as sub-system ids, thread priority, event ids.
41
42Example:
43
44	gce: gce@10212000 {
45		compatible = "mediatek,mt8173-gce";
46		reg = <0 0x10212000 0 0x1000>;
47		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
48		clocks = <&infracfg CLK_INFRA_GCE>;
49		clock-names = "gce";
50		#mbox-cells = <3>;
51	};
52
53Example for a client device:
54
55	mmsys: clock-controller@14000000 {
56		compatible = "mediatek,mt8173-mmsys";
57		mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST 1>,
58			 <&gce 1 CMDQ_THR_PRIO_LOWEST 1>;
59		mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF
60				CMDQ_EVENT_MUTEX1_STREAM_EOF>;
61		mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>,
62					  <&gce SUBSYS_1401XXXX 0x2000 0x100>;
63		...
64	};
65