1QCOM Secure Channel Manager (SCM)
2
3Qualcomm processors include an interface to communicate to the secure firmware.
4This interface allows for clients to request different types of actions.  These
5can include CPU power up/down, HDCP requests, loading of firmware, and other
6assorted actions.
7
8Required properties:
9- compatible: must contain one of the following:
10 * "qcom,scm-apq8064"
11 * "qcom,scm-apq8084"
12 * "qcom,scm-ipq4019"
13 * "qcom,scm-msm8660"
14 * "qcom,scm-msm8916"
15 * "qcom,scm-msm8960"
16 * "qcom,scm-msm8974"
17 * "qcom,scm-msm8996"
18 * "qcom,scm-msm8998"
19 * "qcom,scm-sc7180"
20 * "qcom,scm-sdm845"
21 * "qcom,scm-sm8150"
22 and:
23 * "qcom,scm"
24- clocks: Specifies clocks needed by the SCM interface, if any:
25 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and
26   "qcom,scm-msm8960"
27 * core, iface and bus clocks required for "qcom,scm-apq8084",
28   "qcom,scm-msm8916" and "qcom,scm-msm8974"
29- clock-names: Must contain "core" for the core clock, "iface" for the interface
30  clock and "bus" for the bus clock per the requirements of the compatible.
31- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
32		   download mode control register (optional)
33
34Example for MSM8916:
35
36	firmware {
37		scm {
38			compatible = "qcom,msm8916", "qcom,scm";
39			clocks = <&gcc GCC_CRYPTO_CLK> ,
40				 <&gcc GCC_CRYPTO_AXI_CLK>,
41				 <&gcc GCC_CRYPTO_AHB_CLK>;
42			clock-names = "core", "bus", "iface";
43		};
44	};
45