1Analog Device ADV7511(W)/13/33 HDMI Encoders 2----------------------------------------- 3 4The ADV7511, ADV7511W, ADV7513 and ADV7533 are HDMI audio and video transmitters 5compatible with HDMI 1.4 and DVI 1.0. They support color space conversion, 6S/PDIF, CEC and HDCP. ADV7533 supports the DSI interface for input pixels, while 7the others support RGB interface. 8 9Required properties: 10 11- compatible: Should be one of: 12 "adi,adv7511" 13 "adi,adv7511w" 14 "adi,adv7513" 15 "adi,adv7533" 16 17- reg: I2C slave addresses 18 The ADV7511 internal registers are split into four pages exposed through 19 different I2C addresses, creating four register maps. Each map has it own 20 I2C address and acts as a standard slave device on the I2C bus. The main 21 address is mandatory, others are optional and revert to defaults if not 22 specified. 23 24 25The ADV7511 supports a large number of input data formats that differ by their 26color depth, color format, clock mode, bit justification and random 27arrangement of components on the data bus. The combination of the following 28properties describe the input and map directly to the video input tables of the 29ADV7511 datasheet that document all the supported combinations. 30 31- adi,input-depth: Number of bits per color component at the input (8, 10 or 32 12). 33- adi,input-colorspace: The input color space, one of "rgb", "yuv422" or 34 "yuv444". 35- adi,input-clock: The input clock type, one of "1x" (one clock cycle per 36 pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel, 37 data driven on both edges). 38 39The following input format properties are required except in "rgb 1x" and 40"yuv444 1x" modes, in which case they must not be specified. 41 42- adi,input-style: The input components arrangement variant (1, 2 or 3), as 43 listed in the input format tables in the datasheet. 44- adi,input-justification: The input bit justification ("left", "evenly", 45 "right"). 46 47- avdd-supply: A 1.8V supply that powers up the AVDD pin on the chip. 48- dvdd-supply: A 1.8V supply that powers up the DVDD pin on the chip. 49- pvdd-supply: A 1.8V supply that powers up the PVDD pin on the chip. 50- dvdd-3v-supply: A 3.3V supply that powers up the pin called DVDD_3V 51 on the chip. 52- bgvdd-supply: A 1.8V supply that powers up the BGVDD pin. This is 53 needed only for ADV7511. 54 55The following properties are required for ADV7533: 56 57- adi,dsi-lanes: Number of DSI data lanes connected to the DSI host. It should 58 be one of 1, 2, 3 or 4. 59- a2vdd-supply: 1.8V supply that powers up the A2VDD pin on the chip. 60- v3p3-supply: A 3.3V supply that powers up the V3P3 pin on the chip. 61- v1p2-supply: A supply that powers up the V1P2 pin on the chip. It can be 62 either 1.2V or 1.8V. 63 64Optional properties: 65 66- interrupts: Specifier for the ADV7511 interrupt 67- pd-gpios: Specifier for the GPIO connected to the power down signal 68 69- adi,clock-delay: Video data clock delay relative to the pixel clock, in ps 70 (-1200 ps .. 1600 ps). Defaults to no delay. 71- adi,embedded-sync: The input uses synchronization signals embedded in the 72 data stream (similar to BT.656). Defaults to separate H/V synchronization 73 signals. 74- adi,disable-timing-generator: Only for ADV7533. Disables the internal timing 75 generator. The chip will rely on the sync signals in the DSI data lanes, 76 rather than generate its own timings for HDMI output. 77- clocks: from common clock binding: reference to the CEC clock. 78- clock-names: from common clock binding: must be "cec". 79- reg-names : Names of maps with programmable addresses. 80 It can contain any map needing a non-default address. 81 Possible maps names are : "main", "edid", "cec", "packet" 82 83Required nodes: 84 85The ADV7511 has two video ports. Their connections are modelled using the OF 86graph bindings specified in Documentation/devicetree/bindings/graph.txt. 87 88- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533, the 89 remote endpoint phandle should be a reference to a valid mipi_dsi_host device 90 node. 91- Video port 1 for the HDMI output 92- Audio port 2 for the HDMI audio input 93 94 95Example 96------- 97 98 adv7511w: hdmi@39 { 99 compatible = "adi,adv7511w"; 100 /* 101 * The EDID page will be accessible on address 0x66 on the I2C 102 * bus. All other maps continue to use their default addresses. 103 */ 104 reg = <0x39>, <0x66>; 105 reg-names = "main", "edid"; 106 interrupt-parent = <&gpio3>; 107 interrupts = <29 IRQ_TYPE_EDGE_FALLING>; 108 clocks = <&cec_clock>; 109 clock-names = "cec"; 110 111 adi,input-depth = <8>; 112 adi,input-colorspace = "rgb"; 113 adi,input-clock = "1x"; 114 adi,input-style = <1>; 115 adi,input-justification = "evenly"; 116 117 ports { 118 #address-cells = <1>; 119 #size-cells = <0>; 120 121 port@0 { 122 reg = <0>; 123 adv7511w_in: endpoint { 124 remote-endpoint = <&dpi_out>; 125 }; 126 }; 127 128 port@1 { 129 reg = <1>; 130 adv7511_out: endpoint { 131 remote-endpoint = <&hdmi_connector_in>; 132 }; 133 }; 134 135 port@2 { 136 reg = <2>; 137 codec_endpoint: endpoint { 138 remote-endpoint = <&i2s0_cpu_endpoint>; 139 }; 140 }; 141 }; 142 }; 143