1* AHCI SATA Controller
2
3SATA nodes are defined to describe on-chip Serial ATA controllers.
4Each SATA controller should have its own node.
5
6It is possible, but not required, to represent each port as a sub-node.
7It allows to enable each port independently when dealing with multiple
8PHYs.
9
10Required properties:
11- compatible        : compatible string, one of:
12  - "allwinner,sun4i-a10-ahci"
13  - "allwinner,sun8i-r40-ahci"
14  - "brcm,iproc-ahci"
15  - "hisilicon,hisi-ahci"
16  - "cavium,octeon-7130-ahci"
17  - "ibm,476gtr-ahci"
18  - "marvell,armada-380-ahci"
19  - "marvell,armada-3700-ahci"
20  - "snps,dwc-ahci"
21  - "snps,spear-ahci"
22  - "generic-ahci"
23- interrupts        : <interrupt mapping for SATA IRQ>
24- reg               : <registers mapping>
25
26Please note that when using "generic-ahci" you must also specify a SoC specific
27compatible:
28	compatible = "manufacturer,soc-model-ahci", "generic-ahci";
29
30Optional properties:
31- dma-coherent      : Present if dma operations are coherent
32- clocks            : a list of phandle + clock specifier pairs
33- resets            : a list of phandle + reset specifier pairs
34- target-supply     : regulator for SATA target power
35- phy-supply        : regulator for PHY power
36- phys              : reference to the SATA PHY node
37- phy-names         : must be "sata-phy"
38- ahci-supply       : regulator for AHCI controller
39- ports-implemented : Mask that indicates which ports that the HBA supports
40		      are available for software to use. Useful if PORTS_IMPL
41		      is not programmed by the BIOS, which is true with
42		      some embedded SOC's.
43
44Required properties when using sub-nodes:
45- #address-cells    : number of cells to encode an address
46- #size-cells       : number of cells representing the size of an address
47
48For allwinner,sun8i-r40-ahci, the reset property must be present.
49
50Sub-nodes required properties:
51- reg		    : the port number
52And at least one of the following properties:
53- phys		    : reference to the SATA PHY node
54- target-supply     : regulator for SATA target power
55
56Examples:
57        sata@ffe08000 {
58		compatible = "snps,spear-ahci";
59		reg = <0xffe08000 0x1000>;
60		interrupts = <115>;
61        };
62
63	ahci: sata@1c18000 {
64		compatible = "allwinner,sun4i-a10-ahci";
65		reg = <0x01c18000 0x1000>;
66		interrupts = <56>;
67		clocks = <&pll6 0>, <&ahb_gates 25>;
68		target-supply = <&reg_ahci_5v>;
69	};
70
71With sub-nodes:
72	sata@f7e90000 {
73		compatible = "marvell,berlin2q-achi", "generic-ahci";
74		reg = <0xe90000 0x1000>;
75		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
76		clocks = <&chip CLKID_SATA>;
77		#address-cells = <1>;
78		#size-cells = <0>;
79
80		sata0: sata-port@0 {
81			reg = <0>;
82			phys = <&sata_phy 0>;
83			target-supply = <&reg_sata0>;
84		};
85
86		sata1: sata-port@1 {
87			reg = <1>;
88			phys = <&sata_phy 1>;
89			target-supply = <&reg_sata1>;;
90		};
91	};
92