1System Control and Management Interface (SCMI) Message Protocol
2----------------------------------------------------------
3
4The SCMI is intended to allow agents such as OSPM to manage various functions
5that are provided by the hardware platform it is running on, including power
6and performance functions.
7
8This binding is intended to define the interface the firmware implementing
9the SCMI as described in ARM document number ARM DEN 0056A ("ARM System Control
10and Management Interface Platform Design Document")[0] provide for OSPM in
11the device tree.
12
13Required properties:
14
15The scmi node with the following properties shall be under the /firmware/ node.
16
17- compatible : shall be "arm,scmi"
18- mboxes: List of phandle and mailbox channel specifiers. It should contain
19	  exactly one or two mailboxes, one for transmitting messages("tx")
20	  and another optional for receiving the notifications("rx") if
21	  supported.
22- shmem : List of phandle pointing to the shared memory(SHM) area as per
23	  generic mailbox client binding.
24- #address-cells : should be '1' if the device has sub-nodes, maps to
25	  protocol identifier for a given sub-node.
26- #size-cells : should be '0' as 'reg' property doesn't have any size
27	  associated with it.
28
29Optional properties:
30
31- mbox-names: shall be "tx" or "rx" depending on mboxes entries.
32
33See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details
34about the generic mailbox controller and client driver bindings.
35
36The mailbox is the only permitted method of calling the SCMI firmware.
37Mailbox doorbell is used as a mechanism to alert the presence of a
38messages and/or notification.
39
40Each protocol supported shall have a sub-node with corresponding compatible
41as described in the following sections. If the platform supports dedicated
42communication channel for a particular protocol, the 3 properties namely:
43mboxes, mbox-names and shmem shall be present in the sub-node corresponding
44to that protocol.
45
46Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol
47------------------------------------------------------------
48
49This binding uses the common clock binding[1].
50
51Required properties:
52- #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands.
53
54Power domain bindings for the power domains based on SCMI Message Protocol
55------------------------------------------------------------
56
57This binding for the SCMI power domain providers uses the generic power
58domain binding[2].
59
60Required properties:
61 - #power-domain-cells : Should be 1. Contains the device or the power
62			 domain ID value used by SCMI commands.
63
64Sensor bindings for the sensors based on SCMI Message Protocol
65--------------------------------------------------------------
66SCMI provides an API to access the various sensors on the SoC.
67
68Required properties:
69- #thermal-sensor-cells: should be set to 1. This property follows the
70			 thermal device tree bindings[3].
71
72			 Valid cell values are raw identifiers (Sensor ID)
73			 as used by the firmware. Refer to  platform details
74			 for your implementation for the IDs to use.
75
76Reset signal bindings for the reset domains based on SCMI Message Protocol
77------------------------------------------------------------
78
79This binding for the SCMI reset domain providers uses the generic reset
80signal binding[5].
81
82Required properties:
83 - #reset-cells : Should be 1. Contains the reset domain ID value used
84		  by SCMI commands.
85
86SRAM and Shared Memory for SCMI
87-------------------------------
88
89A small area of SRAM is reserved for SCMI communication between application
90processors and SCP.
91
92The properties should follow the generic mmio-sram description found in [4]
93
94Each sub-node represents the reserved area for SCMI.
95
96Required sub-node properties:
97- reg : The base offset and size of the reserved area with the SRAM
98- compatible : should be "arm,scmi-shmem" for Non-secure SRAM based
99	       shared memory
100
101[0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html
102[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
103[2] Documentation/devicetree/bindings/power/power_domain.txt
104[3] Documentation/devicetree/bindings/thermal/thermal.txt
105[4] Documentation/devicetree/bindings/sram/sram.txt
106[5] Documentation/devicetree/bindings/reset/reset.txt
107
108Example:
109
110sram@50000000 {
111	compatible = "mmio-sram";
112	reg = <0x0 0x50000000 0x0 0x10000>;
113
114	#address-cells = <1>;
115	#size-cells = <1>;
116	ranges = <0 0x0 0x50000000 0x10000>;
117
118	cpu_scp_lpri: scp-shmem@0 {
119		compatible = "arm,scmi-shmem";
120		reg = <0x0 0x200>;
121	};
122
123	cpu_scp_hpri: scp-shmem@200 {
124		compatible = "arm,scmi-shmem";
125		reg = <0x200 0x200>;
126	};
127};
128
129mailbox@40000000 {
130	....
131	#mbox-cells = <1>;
132	reg = <0x0 0x40000000 0x0 0x10000>;
133};
134
135firmware {
136
137	...
138
139	scmi {
140		compatible = "arm,scmi";
141		mboxes = <&mailbox 0 &mailbox 1>;
142		mbox-names = "tx", "rx";
143		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
144		#address-cells = <1>;
145		#size-cells = <0>;
146
147		scmi_devpd: protocol@11 {
148			reg = <0x11>;
149			#power-domain-cells = <1>;
150		};
151
152		scmi_dvfs: protocol@13 {
153			reg = <0x13>;
154			#clock-cells = <1>;
155		};
156
157		scmi_clk: protocol@14 {
158			reg = <0x14>;
159			#clock-cells = <1>;
160		};
161
162		scmi_sensors0: protocol@15 {
163			reg = <0x15>;
164			#thermal-sensor-cells = <1>;
165		};
166
167		scmi_reset: protocol@16 {
168			reg = <0x16>;
169			#reset-cells = <1>;
170		};
171	};
172};
173
174cpu@0 {
175	...
176	reg = <0 0>;
177	clocks = <&scmi_dvfs 0>;
178};
179
180hdlcd@7ff60000 {
181	...
182	reg = <0 0x7ff60000 0 0x1000>;
183	clocks = <&scmi_clk 4>;
184	power-domains = <&scmi_devpd 1>;
185	resets = <&scmi_reset 10>;
186};
187
188thermal-zones {
189	soc_thermal {
190		polling-delay-passive = <100>;
191		polling-delay = <1000>;
192					/* sensor ID */
193		thermal-sensors = <&scmi_sensors0 3>;
194		...
195	};
196};
197