1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * PCI glue driver for SPI PXA2xx compatible controllers.
4 * CE4100's SPI device is more or less the same one as found on PXA.
5 *
6 * Copyright (C) 2016, 2021 Intel Corporation
7 */
8 #include <linux/clk-provider.h>
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/platform_device.h>
12
13 #include <linux/spi/pxa2xx_spi.h>
14
15 #include <linux/dmaengine.h>
16 #include <linux/platform_data/dma-dw.h>
17
18 enum {
19 PORT_QUARK_X1000,
20 PORT_BYT,
21 PORT_MRFLD,
22 PORT_BSW0,
23 PORT_BSW1,
24 PORT_BSW2,
25 PORT_CE4100,
26 PORT_LPT0,
27 PORT_LPT1,
28 };
29
30 struct pxa_spi_info {
31 enum pxa_ssp_type type;
32 int port_id;
33 int num_chipselect;
34 unsigned long max_clk_rate;
35
36 /* DMA channel request parameters */
37 bool (*dma_filter)(struct dma_chan *chan, void *param);
38 void *tx_param;
39 void *rx_param;
40
41 int dma_burst_size;
42
43 int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c);
44 };
45
46 static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
47 static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
48
49 static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
50 static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
51 static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
52 static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
53 static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
54 static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
55
56 static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
57 static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
58 static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
59 static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
60 static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
61 static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
62
63 static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
64 static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
65 static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
66 static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
67
lpss_dma_filter(struct dma_chan * chan,void * param)68 static bool lpss_dma_filter(struct dma_chan *chan, void *param)
69 {
70 struct dw_dma_slave *dws = param;
71
72 if (dws->dma_dev != chan->device->dev)
73 return false;
74
75 chan->private = dws;
76 return true;
77 }
78
lpss_spi_setup(struct pci_dev * dev,struct pxa_spi_info * c)79 static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
80 {
81 struct pci_dev *dma_dev;
82
83 c->num_chipselect = 1;
84 c->max_clk_rate = 50000000;
85
86 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
87
88 if (c->tx_param) {
89 struct dw_dma_slave *slave = c->tx_param;
90
91 slave->dma_dev = &dma_dev->dev;
92 slave->m_master = 0;
93 slave->p_master = 1;
94 }
95
96 if (c->rx_param) {
97 struct dw_dma_slave *slave = c->rx_param;
98
99 slave->dma_dev = &dma_dev->dev;
100 slave->m_master = 0;
101 slave->p_master = 1;
102 }
103
104 c->dma_filter = lpss_dma_filter;
105 return 0;
106 }
107
mrfld_spi_setup(struct pci_dev * dev,struct pxa_spi_info * c)108 static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
109 {
110 struct pci_dev *dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
111 struct dw_dma_slave *tx, *rx;
112
113 switch (PCI_FUNC(dev->devfn)) {
114 case 0:
115 c->port_id = 3;
116 c->num_chipselect = 1;
117 c->tx_param = &mrfld3_tx_param;
118 c->rx_param = &mrfld3_rx_param;
119 break;
120 case 1:
121 c->port_id = 5;
122 c->num_chipselect = 4;
123 c->tx_param = &mrfld5_tx_param;
124 c->rx_param = &mrfld5_rx_param;
125 break;
126 case 2:
127 c->port_id = 6;
128 c->num_chipselect = 1;
129 c->tx_param = &mrfld6_tx_param;
130 c->rx_param = &mrfld6_rx_param;
131 break;
132 default:
133 return -ENODEV;
134 }
135
136 tx = c->tx_param;
137 tx->dma_dev = &dma_dev->dev;
138
139 rx = c->rx_param;
140 rx->dma_dev = &dma_dev->dev;
141
142 c->dma_filter = lpss_dma_filter;
143 c->dma_burst_size = 8;
144 return 0;
145 }
146
147 static struct pxa_spi_info spi_info_configs[] = {
148 [PORT_CE4100] = {
149 .type = PXA25x_SSP,
150 .port_id = -1,
151 .num_chipselect = -1,
152 .max_clk_rate = 3686400,
153 },
154 [PORT_BYT] = {
155 .type = LPSS_BYT_SSP,
156 .port_id = 0,
157 .setup = lpss_spi_setup,
158 .tx_param = &byt_tx_param,
159 .rx_param = &byt_rx_param,
160 },
161 [PORT_BSW0] = {
162 .type = LPSS_BSW_SSP,
163 .port_id = 0,
164 .setup = lpss_spi_setup,
165 .tx_param = &bsw0_tx_param,
166 .rx_param = &bsw0_rx_param,
167 },
168 [PORT_BSW1] = {
169 .type = LPSS_BSW_SSP,
170 .port_id = 1,
171 .setup = lpss_spi_setup,
172 .tx_param = &bsw1_tx_param,
173 .rx_param = &bsw1_rx_param,
174 },
175 [PORT_BSW2] = {
176 .type = LPSS_BSW_SSP,
177 .port_id = 2,
178 .setup = lpss_spi_setup,
179 .tx_param = &bsw2_tx_param,
180 .rx_param = &bsw2_rx_param,
181 },
182 [PORT_MRFLD] = {
183 .type = MRFLD_SSP,
184 .max_clk_rate = 25000000,
185 .setup = mrfld_spi_setup,
186 },
187 [PORT_QUARK_X1000] = {
188 .type = QUARK_X1000_SSP,
189 .port_id = -1,
190 .num_chipselect = 1,
191 .max_clk_rate = 50000000,
192 },
193 [PORT_LPT0] = {
194 .type = LPSS_LPT_SSP,
195 .port_id = 0,
196 .setup = lpss_spi_setup,
197 .tx_param = &lpt0_tx_param,
198 .rx_param = &lpt0_rx_param,
199 },
200 [PORT_LPT1] = {
201 .type = LPSS_LPT_SSP,
202 .port_id = 1,
203 .setup = lpss_spi_setup,
204 .tx_param = &lpt1_tx_param,
205 .rx_param = &lpt1_rx_param,
206 },
207 };
208
pxa2xx_spi_pci_probe(struct pci_dev * dev,const struct pci_device_id * ent)209 static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
210 const struct pci_device_id *ent)
211 {
212 struct platform_device_info pi;
213 int ret;
214 struct platform_device *pdev;
215 struct pxa2xx_spi_controller spi_pdata;
216 struct ssp_device *ssp;
217 struct pxa_spi_info *c;
218 char buf[40];
219
220 ret = pcim_enable_device(dev);
221 if (ret)
222 return ret;
223
224 ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
225 if (ret)
226 return ret;
227
228 c = &spi_info_configs[ent->driver_data];
229 if (c->setup) {
230 ret = c->setup(dev, c);
231 if (ret)
232 return ret;
233 }
234
235 memset(&spi_pdata, 0, sizeof(spi_pdata));
236 spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
237 spi_pdata.dma_filter = c->dma_filter;
238 spi_pdata.tx_param = c->tx_param;
239 spi_pdata.rx_param = c->rx_param;
240 spi_pdata.enable_dma = c->rx_param && c->tx_param;
241 spi_pdata.dma_burst_size = c->dma_burst_size ? c->dma_burst_size : 1;
242
243 ssp = &spi_pdata.ssp;
244 ssp->dev = &dev->dev;
245 ssp->phys_base = pci_resource_start(dev, 0);
246 ssp->mmio_base = pcim_iomap_table(dev)[0];
247 ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
248 ssp->type = c->type;
249
250 pci_set_master(dev);
251
252 ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
253 if (ret < 0)
254 return ret;
255 ssp->irq = pci_irq_vector(dev, 0);
256
257 snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
258 ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0,
259 c->max_clk_rate);
260 if (IS_ERR(ssp->clk))
261 return PTR_ERR(ssp->clk);
262
263 memset(&pi, 0, sizeof(pi));
264 pi.fwnode = dev->dev.fwnode;
265 pi.parent = &dev->dev;
266 pi.name = "pxa2xx-spi";
267 pi.id = ssp->port_id;
268 pi.data = &spi_pdata;
269 pi.size_data = sizeof(spi_pdata);
270
271 pdev = platform_device_register_full(&pi);
272 if (IS_ERR(pdev)) {
273 clk_unregister(ssp->clk);
274 return PTR_ERR(pdev);
275 }
276
277 pci_set_drvdata(dev, pdev);
278
279 return 0;
280 }
281
pxa2xx_spi_pci_remove(struct pci_dev * dev)282 static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
283 {
284 struct platform_device *pdev = pci_get_drvdata(dev);
285 struct pxa2xx_spi_controller *spi_pdata;
286
287 spi_pdata = dev_get_platdata(&pdev->dev);
288
289 platform_device_unregister(pdev);
290 clk_unregister(spi_pdata->ssp.clk);
291 }
292
293 static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
294 { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
295 { PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
296 { PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD },
297 { PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
298 { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
299 { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
300 { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
301 { PCI_VDEVICE(INTEL, 0x9c65), PORT_LPT0 },
302 { PCI_VDEVICE(INTEL, 0x9c66), PORT_LPT1 },
303 { PCI_VDEVICE(INTEL, 0x9ce5), PORT_LPT0 },
304 { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT1 },
305 { }
306 };
307 MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
308
309 static struct pci_driver pxa2xx_spi_pci_driver = {
310 .name = "pxa2xx_spi_pci",
311 .id_table = pxa2xx_spi_pci_devices,
312 .probe = pxa2xx_spi_pci_probe,
313 .remove = pxa2xx_spi_pci_remove,
314 };
315
316 module_pci_driver(pxa2xx_spi_pci_driver);
317
318 MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
319 MODULE_LICENSE("GPL v2");
320 MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
321
