1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * linux/arch/arm/mach-omap1/devices.c
4 *
5 * OMAP1 platform device setup/initialization
6 */
7
8 #include <linux/dma-mapping.h>
9 #include <linux/gpio.h>
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/spi/spi.h>
15
16 #include <linux/platform_data/omap-wd-timer.h>
17
18 #include <asm/mach/map.h>
19
20 #include <mach/tc.h>
21 #include <mach/mux.h>
22
23 #include <mach/omap7xx.h>
24 #include <mach/hardware.h>
25
26 #include "common.h"
27 #include "clock.h"
28 #include "mmc.h"
29 #include "sram.h"
30
31 #if IS_ENABLED(CONFIG_RTC_DRV_OMAP)
32
33 #define OMAP_RTC_BASE 0xfffb4800
34
35 static struct resource rtc_resources[] = {
36 {
37 .start = OMAP_RTC_BASE,
38 .end = OMAP_RTC_BASE + 0x5f,
39 .flags = IORESOURCE_MEM,
40 },
41 {
42 .start = INT_RTC_TIMER,
43 .flags = IORESOURCE_IRQ,
44 },
45 {
46 .start = INT_RTC_ALARM,
47 .flags = IORESOURCE_IRQ,
48 },
49 };
50
51 static struct platform_device omap_rtc_device = {
52 .name = "omap_rtc",
53 .id = -1,
54 .num_resources = ARRAY_SIZE(rtc_resources),
55 .resource = rtc_resources,
56 };
57
omap_init_rtc(void)58 static void omap_init_rtc(void)
59 {
60 (void) platform_device_register(&omap_rtc_device);
61 }
62 #else
omap_init_rtc(void)63 static inline void omap_init_rtc(void) {}
64 #endif
65
omap_init_mbox(void)66 static inline void omap_init_mbox(void) { }
67
68 /*-------------------------------------------------------------------------*/
69
70 #if IS_ENABLED(CONFIG_MMC_OMAP)
71
omap1_mmc_mux(struct omap_mmc_platform_data * mmc_controller,int controller_nr)72 static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
73 int controller_nr)
74 {
75 if (controller_nr == 0) {
76 if (cpu_is_omap7xx()) {
77 omap_cfg_reg(MMC_7XX_CMD);
78 omap_cfg_reg(MMC_7XX_CLK);
79 omap_cfg_reg(MMC_7XX_DAT0);
80 } else {
81 omap_cfg_reg(MMC_CMD);
82 omap_cfg_reg(MMC_CLK);
83 omap_cfg_reg(MMC_DAT0);
84 }
85
86 if (cpu_is_omap1710()) {
87 omap_cfg_reg(M15_1710_MMC_CLKI);
88 omap_cfg_reg(P19_1710_MMC_CMDDIR);
89 omap_cfg_reg(P20_1710_MMC_DATDIR0);
90 }
91 if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
92 omap_cfg_reg(MMC_DAT1);
93 /* NOTE: DAT2 can be on W10 (here) or M15 */
94 if (!mmc_controller->slots[0].nomux)
95 omap_cfg_reg(MMC_DAT2);
96 omap_cfg_reg(MMC_DAT3);
97 }
98 }
99
100 /* Block 2 is on newer chips, and has many pinout options */
101 if (cpu_is_omap16xx() && controller_nr == 1) {
102 if (!mmc_controller->slots[1].nomux) {
103 omap_cfg_reg(Y8_1610_MMC2_CMD);
104 omap_cfg_reg(Y10_1610_MMC2_CLK);
105 omap_cfg_reg(R18_1610_MMC2_CLKIN);
106 omap_cfg_reg(W8_1610_MMC2_DAT0);
107 if (mmc_controller->slots[1].wires == 4) {
108 omap_cfg_reg(V8_1610_MMC2_DAT1);
109 omap_cfg_reg(W15_1610_MMC2_DAT2);
110 omap_cfg_reg(R10_1610_MMC2_DAT3);
111 }
112
113 /* These are needed for the level shifter */
114 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
115 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
116 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
117 }
118
119 /* Feedback clock must be set on OMAP-1710 MMC2 */
120 if (cpu_is_omap1710())
121 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
122 MOD_CONF_CTRL_1);
123 }
124 }
125
126 #define OMAP_MMC_NR_RES 4
127
128 /*
129 * Register MMC devices.
130 */
omap_mmc_add(const char * name,int id,unsigned long base,unsigned long size,unsigned int irq,unsigned rx_req,unsigned tx_req,struct omap_mmc_platform_data * data)131 static int __init omap_mmc_add(const char *name, int id, unsigned long base,
132 unsigned long size, unsigned int irq,
133 unsigned rx_req, unsigned tx_req,
134 struct omap_mmc_platform_data *data)
135 {
136 struct platform_device *pdev;
137 struct resource res[OMAP_MMC_NR_RES];
138 int ret;
139
140 pdev = platform_device_alloc(name, id);
141 if (!pdev)
142 return -ENOMEM;
143
144 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
145 res[0].start = base;
146 res[0].end = base + size - 1;
147 res[0].flags = IORESOURCE_MEM;
148 res[1].start = res[1].end = irq;
149 res[1].flags = IORESOURCE_IRQ;
150 res[2].start = rx_req;
151 res[2].name = "rx";
152 res[2].flags = IORESOURCE_DMA;
153 res[3].start = tx_req;
154 res[3].name = "tx";
155 res[3].flags = IORESOURCE_DMA;
156
157 if (cpu_is_omap7xx())
158 data->slots[0].features = MMC_OMAP7XX;
159 if (cpu_is_omap15xx())
160 data->slots[0].features = MMC_OMAP15XX;
161 if (cpu_is_omap16xx())
162 data->slots[0].features = MMC_OMAP16XX;
163
164 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
165 if (ret == 0)
166 ret = platform_device_add_data(pdev, data, sizeof(*data));
167 if (ret)
168 goto fail;
169
170 ret = platform_device_add(pdev);
171 if (ret)
172 goto fail;
173
174 /* return device handle to board setup code */
175 data->dev = &pdev->dev;
176 return 0;
177
178 fail:
179 platform_device_put(pdev);
180 return ret;
181 }
182
omap1_init_mmc(struct omap_mmc_platform_data ** mmc_data,int nr_controllers)183 void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
184 int nr_controllers)
185 {
186 int i;
187
188 for (i = 0; i < nr_controllers; i++) {
189 unsigned long base, size;
190 unsigned rx_req, tx_req;
191 unsigned int irq = 0;
192
193 if (!mmc_data[i])
194 continue;
195
196 omap1_mmc_mux(mmc_data[i], i);
197
198 switch (i) {
199 case 0:
200 base = OMAP1_MMC1_BASE;
201 irq = INT_MMC;
202 rx_req = 22;
203 tx_req = 21;
204 break;
205 case 1:
206 if (!cpu_is_omap16xx())
207 return;
208 base = OMAP1_MMC2_BASE;
209 irq = INT_1610_MMC2;
210 rx_req = 55;
211 tx_req = 54;
212 break;
213 default:
214 continue;
215 }
216 size = OMAP1_MMC_SIZE;
217
218 omap_mmc_add("mmci-omap", i, base, size, irq,
219 rx_req, tx_req, mmc_data[i]);
220 }
221 }
222
223 #endif
224
225 /*-------------------------------------------------------------------------*/
226
227 /* OMAP7xx SPI support */
228 #if IS_ENABLED(CONFIG_SPI_OMAP_100K)
229
230 struct platform_device omap_spi1 = {
231 .name = "omap1_spi100k",
232 .id = 1,
233 };
234
235 struct platform_device omap_spi2 = {
236 .name = "omap1_spi100k",
237 .id = 2,
238 };
239
omap_init_spi100k(void)240 static void omap_init_spi100k(void)
241 {
242 if (!cpu_is_omap7xx())
243 return;
244
245 omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
246 if (omap_spi1.dev.platform_data)
247 platform_device_register(&omap_spi1);
248
249 omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
250 if (omap_spi2.dev.platform_data)
251 platform_device_register(&omap_spi2);
252 }
253
254 #else
omap_init_spi100k(void)255 static inline void omap_init_spi100k(void)
256 {
257 }
258 #endif
259
260 /*-------------------------------------------------------------------------*/
261
omap_init_sti(void)262 static inline void omap_init_sti(void) {}
263
264 /* Numbering for the SPI-capable controllers when used for SPI:
265 * spi = 1
266 * uwire = 2
267 * mmc1..2 = 3..4
268 * mcbsp1..3 = 5..7
269 */
270
271 #if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)
272
273 #define OMAP_UWIRE_BASE 0xfffb3000
274
275 static struct resource uwire_resources[] = {
276 {
277 .start = OMAP_UWIRE_BASE,
278 .end = OMAP_UWIRE_BASE + 0x20,
279 .flags = IORESOURCE_MEM,
280 },
281 };
282
283 static struct platform_device omap_uwire_device = {
284 .name = "omap_uwire",
285 .id = -1,
286 .num_resources = ARRAY_SIZE(uwire_resources),
287 .resource = uwire_resources,
288 };
289
omap_init_uwire(void)290 static void omap_init_uwire(void)
291 {
292 /* FIXME define and use a boot tag; not all boards will be hooking
293 * up devices to the microwire controller, and multi-board configs
294 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
295 */
296
297 /* board-specific code must configure chipselects (only a few
298 * are normally used) and SCLK/SDI/SDO (each has two choices).
299 */
300 (void) platform_device_register(&omap_uwire_device);
301 }
302 #else
omap_init_uwire(void)303 static inline void omap_init_uwire(void) {}
304 #endif
305
306
307 #define OMAP1_RNG_BASE 0xfffe5000
308
309 static struct resource omap1_rng_resources[] = {
310 {
311 .start = OMAP1_RNG_BASE,
312 .end = OMAP1_RNG_BASE + 0x4f,
313 .flags = IORESOURCE_MEM,
314 },
315 };
316
317 static struct platform_device omap1_rng_device = {
318 .name = "omap_rng",
319 .id = -1,
320 .num_resources = ARRAY_SIZE(omap1_rng_resources),
321 .resource = omap1_rng_resources,
322 };
323
omap1_init_rng(void)324 static void omap1_init_rng(void)
325 {
326 if (!cpu_is_omap16xx())
327 return;
328
329 (void) platform_device_register(&omap1_rng_device);
330 }
331
332 /*-------------------------------------------------------------------------*/
333
334 /*
335 * This gets called after board-specific INIT_MACHINE, and initializes most
336 * on-chip peripherals accessible on this board (except for few like USB):
337 *
338 * (a) Does any "standard config" pin muxing needed. Board-specific
339 * code will have muxed GPIO pins and done "nonstandard" setup;
340 * that code could live in the boot loader.
341 * (b) Populating board-specific platform_data with the data drivers
342 * rely on to handle wiring variations.
343 * (c) Creating platform devices as meaningful on this board and
344 * with this kernel configuration.
345 *
346 * Claiming GPIOs, and setting their direction and initial values, is the
347 * responsibility of the device drivers. So is responding to probe().
348 *
349 * Board-specific knowledge like creating devices or pin setup is to be
350 * kept out of drivers as much as possible. In particular, pin setup
351 * may be handled by the boot loader, and drivers should expect it will
352 * normally have been done by the time they're probed.
353 */
omap1_init_devices(void)354 static int __init omap1_init_devices(void)
355 {
356 if (!cpu_class_is_omap1())
357 return -ENODEV;
358
359 omap_sram_init();
360 omap1_clk_late_init();
361
362 /* please keep these calls, and their implementations above,
363 * in alphabetical order so they're easier to sort through.
364 */
365
366 omap_init_mbox();
367 omap_init_rtc();
368 omap_init_spi100k();
369 omap_init_sti();
370 omap_init_uwire();
371 omap1_init_rng();
372
373 return 0;
374 }
375 arch_initcall(omap1_init_devices);
376
377 #if IS_ENABLED(CONFIG_OMAP_WATCHDOG)
378
379 static struct resource wdt_resources[] = {
380 {
381 .start = 0xfffeb000,
382 .end = 0xfffeb07F,
383 .flags = IORESOURCE_MEM,
384 },
385 };
386
387 static struct platform_device omap_wdt_device = {
388 .name = "omap_wdt",
389 .id = -1,
390 .num_resources = ARRAY_SIZE(wdt_resources),
391 .resource = wdt_resources,
392 };
393
omap_init_wdt(void)394 static int __init omap_init_wdt(void)
395 {
396 struct omap_wd_timer_platform_data pdata;
397 int ret;
398
399 if (!cpu_is_omap16xx())
400 return -ENODEV;
401
402 pdata.read_reset_sources = omap1_get_reset_sources;
403
404 ret = platform_device_register(&omap_wdt_device);
405 if (!ret) {
406 ret = platform_device_add_data(&omap_wdt_device, &pdata,
407 sizeof(pdata));
408 if (ret)
409 platform_device_del(&omap_wdt_device);
410 }
411
412 return ret;
413 }
414 subsys_initcall(omap_init_wdt);
415 #endif
416
