1&l4_wkup { /* 0x44c00000 */ 2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus"; 3 power-domains = <&prm_wkup>; 4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>; 5 clock-names = "fck"; 6 reg = <0x44c00000 0x800>, 7 <0x44c00800 0x800>, 8 <0x44c01000 0x400>, 9 <0x44c01400 0x400>; 10 reg-names = "ap", "la", "ia0", "ia1"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */ 14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */ 15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */ 16 17 segment@0 { /* 0x44c00000 */ 18 compatible = "simple-pm-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 21 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 22 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 23 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 24 <0x00001400 0x00001400 0x000400>; /* ap 3 */ 25 }; 26 27 segment@100000 { /* 0x44d00000 */ 28 compatible = "simple-pm-bus"; 29 #address-cells = <1>; 30 #size-cells = <1>; 31 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */ 32 <0x00004000 0x00104000 0x001000>, /* ap 5 */ 33 <0x00080000 0x00180000 0x002000>, /* ap 6 */ 34 <0x00082000 0x00182000 0x001000>; /* ap 7 */ 35 36 target-module@0 { /* 0x44d00000, ap 4 28.0 */ 37 compatible = "ti,sysc-omap4", "ti,sysc"; 38 reg = <0x0 0x4>; 39 reg-names = "rev"; 40 clocks = <&l4_wkup_aon_clkctrl AM3_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>; 41 clock-names = "fck"; 42 #address-cells = <1>; 43 #size-cells = <1>; 44 ranges = <0x00000000 0x00000000 0x4000>, 45 <0x00080000 0x00080000 0x2000>; 46 47 wkup_m3: cpu@0 { 48 compatible = "ti,am3352-wkup-m3"; 49 reg = <0x00000000 0x4000>, 50 <0x00080000 0x2000>; 51 reg-names = "umem", "dmem"; 52 resets = <&prm_wkup 3>; 53 reset-names = "rstctrl"; 54 ti,pm-firmware = "am335x-pm-firmware.elf"; 55 }; 56 }; 57 }; 58 59 segment@200000 { /* 0x44e00000 */ 60 compatible = "simple-pm-bus"; 61 #address-cells = <1>; 62 #size-cells = <1>; 63 ranges = <0x00000000 0x00200000 0x002000>, /* ap 8 */ 64 <0x00002000 0x00202000 0x001000>, /* ap 9 */ 65 <0x00003000 0x00203000 0x001000>, /* ap 10 */ 66 <0x00004000 0x00204000 0x001000>, /* ap 11 */ 67 <0x00005000 0x00205000 0x001000>, /* ap 12 */ 68 <0x00006000 0x00206000 0x001000>, /* ap 13 */ 69 <0x00007000 0x00207000 0x001000>, /* ap 14 */ 70 <0x00008000 0x00208000 0x001000>, /* ap 15 */ 71 <0x00009000 0x00209000 0x001000>, /* ap 16 */ 72 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */ 73 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */ 74 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */ 75 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */ 76 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */ 77 <0x00010000 0x00210000 0x010000>, /* ap 22 */ 78 <0x00020000 0x00220000 0x010000>, /* ap 23 */ 79 <0x00030000 0x00230000 0x001000>, /* ap 24 */ 80 <0x00031000 0x00231000 0x001000>, /* ap 25 */ 81 <0x00032000 0x00232000 0x001000>, /* ap 26 */ 82 <0x00033000 0x00233000 0x001000>, /* ap 27 */ 83 <0x00034000 0x00234000 0x001000>, /* ap 28 */ 84 <0x00035000 0x00235000 0x001000>, /* ap 29 */ 85 <0x00036000 0x00236000 0x001000>, /* ap 30 */ 86 <0x00037000 0x00237000 0x001000>, /* ap 31 */ 87 <0x00038000 0x00238000 0x001000>, /* ap 32 */ 88 <0x00039000 0x00239000 0x001000>, /* ap 33 */ 89 <0x0003a000 0x0023a000 0x001000>, /* ap 34 */ 90 <0x0003e000 0x0023e000 0x001000>, /* ap 35 */ 91 <0x0003f000 0x0023f000 0x001000>, /* ap 36 */ 92 <0x0000e000 0x0020e000 0x001000>, /* ap 37 */ 93 <0x00040000 0x00240000 0x040000>, /* ap 38 */ 94 <0x00080000 0x00280000 0x001000>; /* ap 39 */ 95 96 target-module@0 { /* 0x44e00000, ap 8 58.0 */ 97 compatible = "ti,sysc-omap4", "ti,sysc"; 98 reg = <0 0x4>; 99 reg-names = "rev"; 100 #address-cells = <1>; 101 #size-cells = <1>; 102 ranges = <0x0 0x0 0x2000>; 103 104 prcm: prcm@0 { 105 compatible = "ti,am3-prcm", "simple-bus"; 106 reg = <0 0x2000>; 107 #address-cells = <1>; 108 #size-cells = <1>; 109 ranges = <0 0 0x2000>; 110 111 prcm_clocks: clocks { 112 #address-cells = <1>; 113 #size-cells = <0>; 114 }; 115 116 prcm_clockdomains: clockdomains { 117 }; 118 }; 119 }; 120 121 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */ 122 compatible = "ti,sysc"; 123 status = "disabled"; 124 #address-cells = <1>; 125 #size-cells = <1>; 126 ranges = <0x0 0x3000 0x1000>; 127 }; 128 129 target-module@5000 { /* 0x44e05000, ap 12 30.0 */ 130 compatible = "ti,sysc"; 131 status = "disabled"; 132 #address-cells = <1>; 133 #size-cells = <1>; 134 ranges = <0x0 0x5000 0x1000>; 135 }; 136 137 gpio0_target: target-module@7000 { /* 0x44e07000, ap 14 20.0 */ 138 compatible = "ti,sysc-omap2", "ti,sysc"; 139 reg = <0x7000 0x4>, 140 <0x7010 0x4>, 141 <0x7114 0x4>; 142 reg-names = "rev", "sysc", "syss"; 143 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 144 SYSC_OMAP2_SOFTRESET | 145 SYSC_OMAP2_AUTOIDLE)>; 146 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 147 <SYSC_IDLE_NO>, 148 <SYSC_IDLE_SMART>, 149 <SYSC_IDLE_SMART_WKUP>; 150 ti,syss-mask = <1>; 151 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 152 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 0>, 153 <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 18>; 154 clock-names = "fck", "dbclk"; 155 #address-cells = <1>; 156 #size-cells = <1>; 157 ranges = <0x0 0x7000 0x1000>; 158 159 gpio0: gpio@0 { 160 compatible = "ti,omap4-gpio"; 161 gpio-ranges = <&am33xx_pinmux 0 82 8>, 162 <&am33xx_pinmux 8 52 4>, 163 <&am33xx_pinmux 12 94 4>, 164 <&am33xx_pinmux 16 71 2>, 165 <&am33xx_pinmux 18 135 1>, 166 <&am33xx_pinmux 19 108 2>, 167 <&am33xx_pinmux 21 73 1>, 168 <&am33xx_pinmux 22 8 2>, 169 <&am33xx_pinmux 26 10 2>, 170 <&am33xx_pinmux 28 74 1>, 171 <&am33xx_pinmux 29 81 1>, 172 <&am33xx_pinmux 30 28 2>; 173 gpio-controller; 174 #gpio-cells = <2>; 175 interrupt-controller; 176 #interrupt-cells = <2>; 177 reg = <0x0 0x1000>; 178 interrupts = <96>; 179 }; 180 }; 181 182 target-module@9000 { /* 0x44e09000, ap 16 04.0 */ 183 compatible = "ti,sysc-omap2", "ti,sysc"; 184 reg = <0x9050 0x4>, 185 <0x9054 0x4>, 186 <0x9058 0x4>; 187 reg-names = "rev", "sysc", "syss"; 188 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 189 SYSC_OMAP2_SOFTRESET | 190 SYSC_OMAP2_AUTOIDLE)>; 191 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 192 <SYSC_IDLE_NO>, 193 <SYSC_IDLE_SMART>, 194 <SYSC_IDLE_SMART_WKUP>; 195 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 196 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_UART1_CLKCTRL 0>; 197 clock-names = "fck"; 198 #address-cells = <1>; 199 #size-cells = <1>; 200 ranges = <0x0 0x9000 0x1000>; 201 202 uart0: serial@0 { 203 compatible = "ti,am3352-uart", "ti,omap3-uart"; 204 clock-frequency = <48000000>; 205 reg = <0x0 0x1000>; 206 interrupts = <72>; 207 status = "disabled"; 208 dmas = <&edma 26 0>, <&edma 27 0>; 209 dma-names = "tx", "rx"; 210 }; 211 }; 212 213 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */ 214 compatible = "ti,sysc-omap2", "ti,sysc"; 215 reg = <0xb000 0x8>, 216 <0xb010 0x8>, 217 <0xb090 0x8>; 218 reg-names = "rev", "sysc", "syss"; 219 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 220 SYSC_OMAP2_ENAWAKEUP | 221 SYSC_OMAP2_SOFTRESET | 222 SYSC_OMAP2_AUTOIDLE)>; 223 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 224 <SYSC_IDLE_NO>, 225 <SYSC_IDLE_SMART>, 226 <SYSC_IDLE_SMART_WKUP>; 227 ti,syss-mask = <1>; 228 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 229 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_I2C1_CLKCTRL 0>; 230 clock-names = "fck"; 231 #address-cells = <1>; 232 #size-cells = <1>; 233 ranges = <0x0 0xb000 0x1000>; 234 235 i2c0: i2c@0 { 236 compatible = "ti,omap4-i2c"; 237 #address-cells = <1>; 238 #size-cells = <0>; 239 reg = <0x0 0x1000>; 240 interrupts = <70>; 241 status = "disabled"; 242 }; 243 }; 244 245 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */ 246 compatible = "ti,sysc-omap4", "ti,sysc"; 247 reg = <0xd000 0x4>, 248 <0xd010 0x4>; 249 reg-names = "rev", "sysc"; 250 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 251 <SYSC_IDLE_NO>, 252 <SYSC_IDLE_SMART>, 253 <SYSC_IDLE_SMART_WKUP>; 254 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 255 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_ADC_TSC_CLKCTRL 0>; 256 clock-names = "fck"; 257 #address-cells = <1>; 258 #size-cells = <1>; 259 ranges = <0x00000000 0x0000d000 0x00001000>, 260 <0x00001000 0x0000e000 0x00001000>; 261 262 tscadc: tscadc@0 { 263 compatible = "ti,am3359-tscadc"; 264 reg = <0x0 0x1000>; 265 interrupts = <16>; 266 status = "disabled"; 267 dmas = <&edma 53 0>, <&edma 57 0>; 268 dma-names = "fifo0", "fifo1"; 269 270 tsc { 271 compatible = "ti,am3359-tsc"; 272 }; 273 am335x_adc: adc { 274 #io-channel-cells = <1>; 275 compatible = "ti,am3359-adc"; 276 }; 277 }; 278 }; 279 280 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */ 281 compatible = "ti,sysc-omap4", "ti,sysc"; 282 reg = <0x10000 0x4>; 283 reg-names = "rev"; 284 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_CONTROL_CLKCTRL 0>; 285 clock-names = "fck"; 286 ti,no-idle; 287 #address-cells = <1>; 288 #size-cells = <1>; 289 ranges = <0x00000000 0x00010000 0x00010000>, 290 <0x00010000 0x00020000 0x00010000>; 291 292 scm: scm@0 { 293 compatible = "ti,am3-scm", "simple-bus"; 294 reg = <0x0 0x2000>; 295 #address-cells = <1>; 296 #size-cells = <1>; 297 #pinctrl-cells = <1>; 298 ranges = <0 0 0x2000>; 299 300 am33xx_pinmux: pinmux@800 { 301 compatible = "pinctrl-single"; 302 reg = <0x800 0x238>; 303 #pinctrl-cells = <2>; 304 pinctrl-single,register-width = <32>; 305 pinctrl-single,function-mask = <0x7f>; 306 }; 307 308 scm_conf: scm_conf@0 { 309 compatible = "syscon", "simple-bus"; 310 reg = <0x0 0x800>; 311 #address-cells = <1>; 312 #size-cells = <1>; 313 ranges = <0 0 0x800>; 314 315 phy_gmii_sel: phy-gmii-sel { 316 compatible = "ti,am3352-phy-gmii-sel"; 317 reg = <0x650 0x4>; 318 #phy-cells = <2>; 319 }; 320 321 scm_clocks: clocks { 322 #address-cells = <1>; 323 #size-cells = <0>; 324 }; 325 }; 326 327 usb_ctrl_mod: control@620 { 328 compatible = "ti,am335x-usb-ctrl-module"; 329 reg = <0x620 0x10>, 330 <0x648 0x4>; 331 reg-names = "phy_ctrl", "wakeup"; 332 }; 333 334 wkup_m3_ipc: wkup_m3_ipc@1324 { 335 compatible = "ti,am3352-wkup-m3-ipc"; 336 reg = <0x1324 0x24>; 337 interrupts = <78>; 338 ti,rproc = <&wkup_m3>; 339 mboxes = <&mailbox &mbox_wkupm3>; 340 }; 341 342 edma_xbar: dma-router@f90 { 343 compatible = "ti,am335x-edma-crossbar"; 344 reg = <0xf90 0x40>; 345 #dma-cells = <3>; 346 dma-requests = <32>; 347 dma-masters = <&edma>; 348 }; 349 350 scm_clockdomains: clockdomains { 351 }; 352 }; 353 }; 354 355 timer1_target: target-module@31000 { /* 0x44e31000, ap 25 40.0 */ 356 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 357 reg = <0x31000 0x4>, 358 <0x31010 0x4>, 359 <0x31014 0x4>; 360 reg-names = "rev", "sysc", "syss"; 361 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 362 SYSC_OMAP2_SOFTRESET | 363 SYSC_OMAP2_AUTOIDLE)>; 364 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 365 <SYSC_IDLE_NO>, 366 <SYSC_IDLE_SMART>; 367 ti,syss-mask = <1>; 368 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 369 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>; 370 clock-names = "fck"; 371 #address-cells = <1>; 372 #size-cells = <1>; 373 ranges = <0x0 0x31000 0x1000>; 374 375 timer1: timer@0 { 376 compatible = "ti,am335x-timer-1ms"; 377 reg = <0x0 0x400>; 378 interrupts = <67>; 379 ti,timer-alwon; 380 clocks = <&timer1_fck>; 381 clock-names = "fck"; 382 }; 383 }; 384 385 target-module@33000 { /* 0x44e33000, ap 27 18.0 */ 386 compatible = "ti,sysc"; 387 status = "disabled"; 388 #address-cells = <1>; 389 #size-cells = <1>; 390 ranges = <0x0 0x33000 0x1000>; 391 }; 392 393 target-module@35000 { /* 0x44e35000, ap 29 50.0 */ 394 compatible = "ti,sysc-omap2", "ti,sysc"; 395 reg = <0x35000 0x4>, 396 <0x35010 0x4>, 397 <0x35014 0x4>; 398 reg-names = "rev", "sysc", "syss"; 399 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE | 400 SYSC_OMAP2_SOFTRESET)>; 401 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 402 <SYSC_IDLE_NO>, 403 <SYSC_IDLE_SMART>, 404 <SYSC_IDLE_SMART_WKUP>; 405 ti,syss-mask = <1>; 406 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 407 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_WD_TIMER2_CLKCTRL 0>; 408 clock-names = "fck"; 409 #address-cells = <1>; 410 #size-cells = <1>; 411 ranges = <0x0 0x35000 0x1000>; 412 413 wdt2: wdt@0 { 414 compatible = "ti,omap3-wdt"; 415 reg = <0x0 0x1000>; 416 interrupts = <91>; 417 }; 418 }; 419 420 target-module@37000 { /* 0x44e37000, ap 31 08.0 */ 421 compatible = "ti,sysc"; 422 status = "disabled"; 423 #address-cells = <1>; 424 #size-cells = <1>; 425 ranges = <0x0 0x37000 0x1000>; 426 }; 427 428 target-module@39000 { /* 0x44e39000, ap 33 02.0 */ 429 compatible = "ti,sysc"; 430 status = "disabled"; 431 #address-cells = <1>; 432 #size-cells = <1>; 433 ranges = <0x0 0x39000 0x1000>; 434 }; 435 436 target-module@3e000 { /* 0x44e3e000, ap 35 60.0 */ 437 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 438 reg = <0x3e074 0x4>, 439 <0x3e078 0x4>; 440 reg-names = "rev", "sysc"; 441 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 442 <SYSC_IDLE_NO>, 443 <SYSC_IDLE_SMART>, 444 <SYSC_IDLE_SMART_WKUP>; 445 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */ 446 power-domains = <&prm_rtc>; 447 clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>; 448 clock-names = "fck"; 449 #address-cells = <1>; 450 #size-cells = <1>; 451 ranges = <0x0 0x3e000 0x1000>; 452 453 rtc: rtc@0 { 454 compatible = "ti,am3352-rtc", "ti,da830-rtc"; 455 reg = <0x0 0x1000>; 456 interrupts = <75 457 76>; 458 }; 459 }; 460 461 target-module@40000 { /* 0x44e40000, ap 38 68.0 */ 462 compatible = "ti,sysc"; 463 status = "disabled"; 464 #address-cells = <1>; 465 #size-cells = <1>; 466 ranges = <0x0 0x40000 0x40000>; 467 }; 468 }; 469}; 470 471&l4_fw { /* 0x47c00000 */ 472 compatible = "ti,am33xx-l4-fw", "simple-bus"; 473 reg = <0x47c00000 0x800>, 474 <0x47c00800 0x800>, 475 <0x47c01000 0x400>; 476 reg-names = "ap", "la", "ia0"; 477 #address-cells = <1>; 478 #size-cells = <1>; 479 ranges = <0x00000000 0x47c00000 0x1000000>; /* segment 0 */ 480 481 segment@0 { /* 0x47c00000 */ 482 compatible = "simple-bus"; 483 #address-cells = <1>; 484 #size-cells = <1>; 485 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 486 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 487 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 488 <0x0000c000 0x0000c000 0x001000>, /* ap 3 */ 489 <0x0000d000 0x0000d000 0x001000>, /* ap 4 */ 490 <0x0000e000 0x0000e000 0x001000>, /* ap 5 */ 491 <0x0000f000 0x0000f000 0x001000>, /* ap 6 */ 492 <0x00010000 0x00010000 0x001000>, /* ap 7 */ 493 <0x00011000 0x00011000 0x001000>, /* ap 8 */ 494 <0x0001a000 0x0001a000 0x001000>, /* ap 9 */ 495 <0x0001b000 0x0001b000 0x001000>, /* ap 10 */ 496 <0x00024000 0x00024000 0x001000>, /* ap 11 */ 497 <0x00025000 0x00025000 0x001000>, /* ap 12 */ 498 <0x00026000 0x00026000 0x001000>, /* ap 13 */ 499 <0x00027000 0x00027000 0x001000>, /* ap 14 */ 500 <0x00030000 0x00030000 0x001000>, /* ap 15 */ 501 <0x00031000 0x00031000 0x001000>, /* ap 16 */ 502 <0x00038000 0x00038000 0x001000>, /* ap 17 */ 503 <0x00039000 0x00039000 0x001000>, /* ap 18 */ 504 <0x0003a000 0x0003a000 0x001000>, /* ap 19 */ 505 <0x0003b000 0x0003b000 0x001000>, /* ap 20 */ 506 <0x0003e000 0x0003e000 0x001000>, /* ap 21 */ 507 <0x0003f000 0x0003f000 0x001000>, /* ap 22 */ 508 <0x0003c000 0x0003c000 0x001000>, /* ap 23 */ 509 <0x00040000 0x00040000 0x001000>, /* ap 24 */ 510 <0x00046000 0x00046000 0x001000>, /* ap 25 */ 511 <0x00047000 0x00047000 0x001000>, /* ap 26 */ 512 <0x00044000 0x00044000 0x001000>, /* ap 27 */ 513 <0x00045000 0x00045000 0x001000>, /* ap 28 */ 514 <0x00028000 0x00028000 0x001000>, /* ap 29 */ 515 <0x00029000 0x00029000 0x001000>, /* ap 30 */ 516 <0x00032000 0x00032000 0x001000>, /* ap 31 */ 517 <0x00033000 0x00033000 0x001000>, /* ap 32 */ 518 <0x0003d000 0x0003d000 0x001000>, /* ap 33 */ 519 <0x00041000 0x00041000 0x001000>, /* ap 34 */ 520 <0x00042000 0x00042000 0x001000>, /* ap 35 */ 521 <0x00043000 0x00043000 0x001000>, /* ap 36 */ 522 <0x00014000 0x00014000 0x001000>, /* ap 37 */ 523 <0x00015000 0x00015000 0x001000>; /* ap 38 */ 524 525 target-module@c000 { /* 0x47c0c000, ap 3 04.0 */ 526 compatible = "ti,sysc"; 527 status = "disabled"; 528 #address-cells = <1>; 529 #size-cells = <1>; 530 ranges = <0x0 0xc000 0x1000>; 531 }; 532 533 target-module@e000 { /* 0x47c0e000, ap 5 0c.0 */ 534 compatible = "ti,sysc"; 535 status = "disabled"; 536 #address-cells = <1>; 537 #size-cells = <1>; 538 ranges = <0x0 0xe000 0x1000>; 539 }; 540 541 target-module@10000 { /* 0x47c10000, ap 7 20.0 */ 542 compatible = "ti,sysc"; 543 status = "disabled"; 544 #address-cells = <1>; 545 #size-cells = <1>; 546 ranges = <0x0 0x10000 0x1000>; 547 }; 548 549 target-module@14000 { /* 0x47c14000, ap 37 3c.0 */ 550 compatible = "ti,sysc"; 551 status = "disabled"; 552 #address-cells = <1>; 553 #size-cells = <1>; 554 ranges = <0x0 0x14000 0x1000>; 555 }; 556 557 target-module@1a000 { /* 0x47c1a000, ap 9 08.0 */ 558 compatible = "ti,sysc"; 559 status = "disabled"; 560 #address-cells = <1>; 561 #size-cells = <1>; 562 ranges = <0x0 0x1a000 0x1000>; 563 }; 564 565 target-module@24000 { /* 0x47c24000, ap 11 28.0 */ 566 compatible = "ti,sysc"; 567 status = "disabled"; 568 #address-cells = <1>; 569 #size-cells = <1>; 570 ranges = <0x0 0x24000 0x1000>; 571 }; 572 573 target-module@26000 { /* 0x47c26000, ap 13 30.0 */ 574 compatible = "ti,sysc"; 575 status = "disabled"; 576 #address-cells = <1>; 577 #size-cells = <1>; 578 ranges = <0x0 0x26000 0x1000>; 579 }; 580 581 target-module@28000 { /* 0x47c28000, ap 29 40.0 */ 582 compatible = "ti,sysc"; 583 status = "disabled"; 584 #address-cells = <1>; 585 #size-cells = <1>; 586 ranges = <0x0 0x28000 0x1000>; 587 }; 588 589 target-module@30000 { /* 0x47c30000, ap 15 14.0 */ 590 compatible = "ti,sysc"; 591 status = "disabled"; 592 #address-cells = <1>; 593 #size-cells = <1>; 594 ranges = <0x0 0x30000 0x1000>; 595 }; 596 597 target-module@32000 { /* 0x47c32000, ap 31 06.0 */ 598 compatible = "ti,sysc"; 599 status = "disabled"; 600 #address-cells = <1>; 601 #size-cells = <1>; 602 ranges = <0x0 0x32000 0x1000>; 603 }; 604 605 target-module@38000 { /* 0x47c38000, ap 17 18.0 */ 606 compatible = "ti,sysc"; 607 status = "disabled"; 608 #address-cells = <1>; 609 #size-cells = <1>; 610 ranges = <0x0 0x38000 0x1000>; 611 }; 612 613 target-module@3a000 { /* 0x47c3a000, ap 19 1c.0 */ 614 compatible = "ti,sysc"; 615 status = "disabled"; 616 #address-cells = <1>; 617 #size-cells = <1>; 618 ranges = <0x0 0x3a000 0x1000>; 619 }; 620 621 target-module@3c000 { /* 0x47c3c000, ap 23 38.0 */ 622 compatible = "ti,sysc"; 623 status = "disabled"; 624 #address-cells = <1>; 625 #size-cells = <1>; 626 ranges = <0x0 0x3c000 0x1000>; 627 }; 628 629 target-module@3e000 { /* 0x47c3e000, ap 21 10.0 */ 630 compatible = "ti,sysc"; 631 status = "disabled"; 632 #address-cells = <1>; 633 #size-cells = <1>; 634 ranges = <0x0 0x3e000 0x1000>; 635 }; 636 637 target-module@40000 { /* 0x47c40000, ap 24 02.0 */ 638 compatible = "ti,sysc"; 639 status = "disabled"; 640 #address-cells = <1>; 641 #size-cells = <1>; 642 ranges = <0x0 0x40000 0x1000>; 643 }; 644 645 target-module@42000 { /* 0x47c42000, ap 35 34.0 */ 646 compatible = "ti,sysc"; 647 status = "disabled"; 648 #address-cells = <1>; 649 #size-cells = <1>; 650 ranges = <0x0 0x42000 0x1000>; 651 }; 652 653 target-module@44000 { /* 0x47c44000, ap 27 24.0 */ 654 compatible = "ti,sysc"; 655 status = "disabled"; 656 #address-cells = <1>; 657 #size-cells = <1>; 658 ranges = <0x0 0x44000 0x1000>; 659 }; 660 661 target-module@46000 { /* 0x47c46000, ap 25 2c.0 */ 662 compatible = "ti,sysc"; 663 status = "disabled"; 664 #address-cells = <1>; 665 #size-cells = <1>; 666 ranges = <0x0 0x46000 0x1000>; 667 }; 668 }; 669}; 670 671&l4_fast { /* 0x4a000000 */ 672 compatible = "ti,am33xx-l4-fast", "simple-pm-bus"; 673 power-domains = <&prm_per>; 674 clocks = <&l4hs_clkctrl AM3_L4HS_L4_HS_CLKCTRL 0>; 675 clock-names = "fck"; 676 reg = <0x4a000000 0x800>, 677 <0x4a000800 0x800>, 678 <0x4a001000 0x400>; 679 reg-names = "ap", "la", "ia0"; 680 #address-cells = <1>; 681 #size-cells = <1>; 682 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */ 683 684 segment@0 { /* 0x4a000000 */ 685 compatible = "simple-pm-bus"; 686 #address-cells = <1>; 687 #size-cells = <1>; 688 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 689 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 690 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 691 <0x00100000 0x00100000 0x008000>, /* ap 3 */ 692 <0x00108000 0x00108000 0x001000>, /* ap 4 */ 693 <0x00180000 0x00180000 0x020000>, /* ap 5 */ 694 <0x001a0000 0x001a0000 0x001000>, /* ap 6 */ 695 <0x00200000 0x00200000 0x080000>, /* ap 7 */ 696 <0x00280000 0x00280000 0x001000>, /* ap 8 */ 697 <0x00300000 0x00300000 0x080000>, /* ap 9 */ 698 <0x00380000 0x00380000 0x001000>; /* ap 10 */ 699 700 target-module@100000 { /* 0x4a100000, ap 3 08.0 */ 701 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 702 reg = <0x101200 0x4>, 703 <0x101208 0x4>, 704 <0x101204 0x4>; 705 reg-names = "rev", "sysc", "syss"; 706 ti,sysc-mask = <0>; 707 ti,sysc-midle = <SYSC_IDLE_FORCE>, 708 <SYSC_IDLE_NO>; 709 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 710 <SYSC_IDLE_NO>; 711 ti,syss-mask = <1>; 712 clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 713 clock-names = "fck"; 714 #address-cells = <1>; 715 #size-cells = <1>; 716 ranges = <0x0 0x100000 0x8000>; 717 718 mac: ethernet@0 { 719 compatible = "ti,am335x-cpsw","ti,cpsw"; 720 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 721 clock-names = "fck", "cpts"; 722 cpdma_channels = <8>; 723 ale_entries = <1024>; 724 bd_ram_size = <0x2000>; 725 mac_control = <0x20>; 726 slaves = <2>; 727 active_slave = <0>; 728 cpts_clock_mult = <0x80000000>; 729 cpts_clock_shift = <29>; 730 reg = <0x0 0x800 731 0x1200 0x100>; 732 #address-cells = <1>; 733 #size-cells = <1>; 734 /* 735 * c0_rx_thresh_pend 736 * c0_rx_pend 737 * c0_tx_pend 738 * c0_misc_pend 739 */ 740 interrupts = <40 41 42 43>; 741 ranges = <0 0 0x8000>; 742 syscon = <&scm_conf>; 743 status = "disabled"; 744 745 davinci_mdio: mdio@1000 { 746 compatible = "ti,cpsw-mdio","ti,davinci_mdio"; 747 clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 748 clock-names = "fck"; 749 #address-cells = <1>; 750 #size-cells = <0>; 751 bus_freq = <1000000>; 752 reg = <0x1000 0x100>; 753 status = "disabled"; 754 }; 755 756 cpsw_emac0: slave@200 { 757 /* Filled in by U-Boot */ 758 mac-address = [ 00 00 00 00 00 00 ]; 759 phys = <&phy_gmii_sel 1 1>; 760 }; 761 762 cpsw_emac1: slave@300 { 763 /* Filled in by U-Boot */ 764 mac-address = [ 00 00 00 00 00 00 ]; 765 phys = <&phy_gmii_sel 2 1>; 766 }; 767 }; 768 769 mac_sw: switch@0 { 770 compatible = "ti,am335x-cpsw-switch", "ti,cpsw-switch"; 771 reg = <0x0 0x4000>; 772 ranges = <0 0 0x4000>; 773 clocks = <&cpsw_125mhz_gclk>; 774 clock-names = "fck"; 775 #address-cells = <1>; 776 #size-cells = <1>; 777 syscon = <&scm_conf>; 778 status = "disabled"; 779 780 interrupts = <40 41 42 43>; 781 interrupt-names = "rx_thresh", "rx", "tx", "misc"; 782 783 ethernet-ports { 784 #address-cells = <1>; 785 #size-cells = <0>; 786 787 cpsw_port1: port@1 { 788 reg = <1>; 789 label = "port1"; 790 mac-address = [ 00 00 00 00 00 00 ]; 791 phys = <&phy_gmii_sel 1 1>; 792 }; 793 794 cpsw_port2: port@2 { 795 reg = <2>; 796 label = "port2"; 797 mac-address = [ 00 00 00 00 00 00 ]; 798 phys = <&phy_gmii_sel 2 1>; 799 }; 800 }; 801 802 davinci_mdio_sw: mdio@1000 { 803 compatible = "ti,cpsw-mdio","ti,davinci_mdio"; 804 clocks = <&cpsw_125mhz_gclk>; 805 clock-names = "fck"; 806 #address-cells = <1>; 807 #size-cells = <0>; 808 bus_freq = <1000000>; 809 reg = <0x1000 0x100>; 810 }; 811 812 cpts { 813 clocks = <&cpsw_cpts_rft_clk>; 814 clock-names = "cpts"; 815 }; 816 }; 817 }; 818 819 target-module@180000 { /* 0x4a180000, ap 5 10.0 */ 820 compatible = "ti,sysc"; 821 status = "disabled"; 822 #address-cells = <1>; 823 #size-cells = <1>; 824 ranges = <0x0 0x180000 0x20000>; 825 }; 826 827 target-module@200000 { /* 0x4a200000, ap 7 02.0 */ 828 compatible = "ti,sysc"; 829 status = "disabled"; 830 #address-cells = <1>; 831 #size-cells = <1>; 832 ranges = <0x0 0x200000 0x80000>; 833 }; 834 835 pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */ 836 compatible = "ti,sysc-pruss", "ti,sysc"; 837 reg = <0x326000 0x4>, 838 <0x326004 0x4>; 839 reg-names = "rev", "sysc"; 840 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | 841 SYSC_PRUSS_SUB_MWAIT)>; 842 ti,sysc-midle = <SYSC_IDLE_FORCE>, 843 <SYSC_IDLE_NO>, 844 <SYSC_IDLE_SMART>; 845 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 846 <SYSC_IDLE_NO>, 847 <SYSC_IDLE_SMART>; 848 clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>; 849 clock-names = "fck"; 850 resets = <&prm_per 1>; 851 reset-names = "rstctrl"; 852 #address-cells = <1>; 853 #size-cells = <1>; 854 ranges = <0x0 0x300000 0x80000>; 855 status = "disabled"; 856 857 pruss: pruss@0 { 858 compatible = "ti,am3356-pruss"; 859 reg = <0x0 0x80000>; 860 #address-cells = <1>; 861 #size-cells = <1>; 862 ranges; 863 864 pruss_mem: memories@0 { 865 reg = <0x0 0x2000>, 866 <0x2000 0x2000>, 867 <0x10000 0x3000>; 868 reg-names = "dram0", "dram1", 869 "shrdram2"; 870 }; 871 872 pruss_cfg: cfg@26000 { 873 compatible = "ti,pruss-cfg", "syscon"; 874 reg = <0x26000 0x2000>; 875 #address-cells = <1>; 876 #size-cells = <1>; 877 ranges = <0x0 0x26000 0x2000>; 878 879 clocks { 880 #address-cells = <1>; 881 #size-cells = <0>; 882 883 pruss_iepclk_mux: iepclk-mux@30 { 884 reg = <0x30>; 885 #clock-cells = <0>; 886 clocks = <&l3_gclk>, /* icss_iep_gclk */ 887 <&pruss_ocp_gclk>; /* icss_ocp_gclk */ 888 }; 889 }; 890 }; 891 892 pruss_mii_rt: mii-rt@32000 { 893 compatible = "ti,pruss-mii", "syscon"; 894 reg = <0x32000 0x58>; 895 }; 896 897 pruss_intc: interrupt-controller@20000 { 898 compatible = "ti,pruss-intc"; 899 reg = <0x20000 0x2000>; 900 interrupts = <20 21 22 23 24 25 26 27>; 901 interrupt-names = "host_intr0", "host_intr1", 902 "host_intr2", "host_intr3", 903 "host_intr4", "host_intr5", 904 "host_intr6", "host_intr7"; 905 interrupt-controller; 906 #interrupt-cells = <3>; 907 }; 908 909 pru0: pru@34000 { 910 compatible = "ti,am3356-pru"; 911 reg = <0x34000 0x2000>, 912 <0x22000 0x400>, 913 <0x22400 0x100>; 914 reg-names = "iram", "control", "debug"; 915 firmware-name = "am335x-pru0-fw"; 916 }; 917 918 pru1: pru@38000 { 919 compatible = "ti,am3356-pru"; 920 reg = <0x38000 0x2000>, 921 <0x24000 0x400>, 922 <0x24400 0x100>; 923 reg-names = "iram", "control", "debug"; 924 firmware-name = "am335x-pru1-fw"; 925 }; 926 927 pruss_mdio: mdio@32400 { 928 compatible = "ti,davinci_mdio"; 929 reg = <0x32400 0x90>; 930 clocks = <&dpll_core_m4_ck>; 931 clock-names = "fck"; 932 bus_freq = <1000000>; 933 #address-cells = <1>; 934 #size-cells = <0>; 935 status = "disabled"; 936 }; 937 }; 938 }; 939 }; 940}; 941 942&l4_mpuss { /* 0x4b140000 */ 943 compatible = "ti,am33xx-l4-mpuss", "simple-bus"; 944 reg = <0x4b144400 0x100>, 945 <0x4b144800 0x400>; 946 reg-names = "la", "ap"; 947 #address-cells = <1>; 948 #size-cells = <1>; 949 ranges = <0x00000000 0x4b140000 0x008000>; /* segment 0 */ 950 951 segment@0 { /* 0x4b140000 */ 952 compatible = "simple-bus"; 953 #address-cells = <1>; 954 #size-cells = <1>; 955 ranges = <0x00004800 0x00004800 0x000400>, /* ap 0 */ 956 <0x00001000 0x00001000 0x001000>, /* ap 1 */ 957 <0x00002000 0x00002000 0x001000>, /* ap 2 */ 958 <0x00004000 0x00004000 0x000400>, /* ap 3 */ 959 <0x00005000 0x00005000 0x000400>, /* ap 4 */ 960 <0x00000000 0x00000000 0x001000>, /* ap 5 */ 961 <0x00003000 0x00003000 0x001000>, /* ap 6 */ 962 <0x00000800 0x00000800 0x000800>; /* ap 7 */ 963 964 target-module@0 { /* 0x4b140000, ap 5 02.2 */ 965 compatible = "ti,sysc"; 966 status = "disabled"; 967 #address-cells = <1>; 968 #size-cells = <1>; 969 ranges = <0x00000000 0x00000000 0x00001000>, 970 <0x00001000 0x00001000 0x00001000>, 971 <0x00002000 0x00002000 0x00001000>; 972 }; 973 974 target-module@3000 { /* 0x4b143000, ap 6 04.0 */ 975 compatible = "ti,sysc"; 976 status = "disabled"; 977 #address-cells = <1>; 978 #size-cells = <1>; 979 ranges = <0x0 0x3000 0x1000>; 980 }; 981 }; 982}; 983 984&l4_per { /* 0x48000000 */ 985 compatible = "ti,am33xx-l4-per", "simple-pm-bus"; 986 power-domains = <&prm_per>; 987 clocks = <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>; 988 clock-names = "fck"; 989 reg = <0x48000000 0x800>, 990 <0x48000800 0x800>, 991 <0x48001000 0x400>, 992 <0x48001400 0x400>, 993 <0x48001800 0x400>, 994 <0x48001c00 0x400>; 995 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; 996 #address-cells = <1>; 997 #size-cells = <1>; 998 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */ 999 <0x00100000 0x48100000 0x100000>, /* segment 1 */ 1000 <0x00200000 0x48200000 0x100000>, /* segment 2 */ 1001 <0x00300000 0x48300000 0x100000>, /* segment 3 */ 1002 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 1003 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 1004 1005 segment@0 { /* 0x48000000 */ 1006 compatible = "simple-pm-bus"; 1007 #address-cells = <1>; 1008 #size-cells = <1>; 1009 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 1010 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 1011 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 1012 <0x00001400 0x00001400 0x000400>, /* ap 3 */ 1013 <0x00001800 0x00001800 0x000400>, /* ap 4 */ 1014 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */ 1015 <0x00008000 0x00008000 0x001000>, /* ap 6 */ 1016 <0x00009000 0x00009000 0x001000>, /* ap 7 */ 1017 <0x00016000 0x00016000 0x001000>, /* ap 8 */ 1018 <0x00017000 0x00017000 0x001000>, /* ap 9 */ 1019 <0x00022000 0x00022000 0x001000>, /* ap 10 */ 1020 <0x00023000 0x00023000 0x001000>, /* ap 11 */ 1021 <0x00024000 0x00024000 0x001000>, /* ap 12 */ 1022 <0x00025000 0x00025000 0x001000>, /* ap 13 */ 1023 <0x0002a000 0x0002a000 0x001000>, /* ap 14 */ 1024 <0x0002b000 0x0002b000 0x001000>, /* ap 15 */ 1025 <0x00038000 0x00038000 0x002000>, /* ap 16 */ 1026 <0x0003a000 0x0003a000 0x001000>, /* ap 17 */ 1027 <0x00014000 0x00014000 0x001000>, /* ap 18 */ 1028 <0x00015000 0x00015000 0x001000>, /* ap 19 */ 1029 <0x0003c000 0x0003c000 0x002000>, /* ap 20 */ 1030 <0x0003e000 0x0003e000 0x001000>, /* ap 21 */ 1031 <0x00040000 0x00040000 0x001000>, /* ap 22 */ 1032 <0x00041000 0x00041000 0x001000>, /* ap 23 */ 1033 <0x00042000 0x00042000 0x001000>, /* ap 24 */ 1034 <0x00043000 0x00043000 0x001000>, /* ap 25 */ 1035 <0x00044000 0x00044000 0x001000>, /* ap 26 */ 1036 <0x00045000 0x00045000 0x001000>, /* ap 27 */ 1037 <0x00046000 0x00046000 0x001000>, /* ap 28 */ 1038 <0x00047000 0x00047000 0x001000>, /* ap 29 */ 1039 <0x00048000 0x00048000 0x001000>, /* ap 30 */ 1040 <0x00049000 0x00049000 0x001000>, /* ap 31 */ 1041 <0x0004c000 0x0004c000 0x001000>, /* ap 32 */ 1042 <0x0004d000 0x0004d000 0x001000>, /* ap 33 */ 1043 <0x00050000 0x00050000 0x002000>, /* ap 34 */ 1044 <0x00052000 0x00052000 0x001000>, /* ap 35 */ 1045 <0x00060000 0x00060000 0x001000>, /* ap 36 */ 1046 <0x00061000 0x00061000 0x001000>, /* ap 37 */ 1047 <0x00080000 0x00080000 0x010000>, /* ap 38 */ 1048 <0x00090000 0x00090000 0x001000>, /* ap 39 */ 1049 <0x000a0000 0x000a0000 0x010000>, /* ap 40 */ 1050 <0x000b0000 0x000b0000 0x001000>, /* ap 41 */ 1051 <0x00030000 0x00030000 0x001000>, /* ap 77 */ 1052 <0x00031000 0x00031000 0x001000>, /* ap 78 */ 1053 <0x0004a000 0x0004a000 0x001000>, /* ap 85 */ 1054 <0x0004b000 0x0004b000 0x001000>, /* ap 86 */ 1055 <0x000c8000 0x000c8000 0x001000>, /* ap 87 */ 1056 <0x000c9000 0x000c9000 0x001000>, /* ap 88 */ 1057 <0x000cc000 0x000cc000 0x001000>, /* ap 89 */ 1058 <0x000cd000 0x000cd000 0x001000>, /* ap 90 */ 1059 <0x000ca000 0x000ca000 0x001000>, /* ap 91 */ 1060 <0x000cb000 0x000cb000 0x001000>, /* ap 92 */ 1061 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 1062 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 1063 1064 target-module@8000 { /* 0x48008000, ap 6 10.0 */ 1065 compatible = "ti,sysc"; 1066 status = "disabled"; 1067 #address-cells = <1>; 1068 #size-cells = <1>; 1069 ranges = <0x0 0x8000 0x1000>; 1070 }; 1071 1072 target-module@14000 { /* 0x48014000, ap 18 58.0 */ 1073 compatible = "ti,sysc"; 1074 status = "disabled"; 1075 #address-cells = <1>; 1076 #size-cells = <1>; 1077 ranges = <0x0 0x14000 0x1000>; 1078 }; 1079 1080 target-module@16000 { /* 0x48016000, ap 8 3c.0 */ 1081 compatible = "ti,sysc"; 1082 status = "disabled"; 1083 #address-cells = <1>; 1084 #size-cells = <1>; 1085 ranges = <0x0 0x16000 0x1000>; 1086 }; 1087 1088 target-module@22000 { /* 0x48022000, ap 10 12.0 */ 1089 compatible = "ti,sysc-omap2", "ti,sysc"; 1090 reg = <0x22050 0x4>, 1091 <0x22054 0x4>, 1092 <0x22058 0x4>; 1093 reg-names = "rev", "sysc", "syss"; 1094 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1095 SYSC_OMAP2_SOFTRESET | 1096 SYSC_OMAP2_AUTOIDLE)>; 1097 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1098 <SYSC_IDLE_NO>, 1099 <SYSC_IDLE_SMART>, 1100 <SYSC_IDLE_SMART_WKUP>; 1101 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1102 clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>; 1103 clock-names = "fck"; 1104 #address-cells = <1>; 1105 #size-cells = <1>; 1106 ranges = <0x0 0x22000 0x1000>; 1107 1108 uart1: serial@0 { 1109 compatible = "ti,am3352-uart", "ti,omap3-uart"; 1110 clock-frequency = <48000000>; 1111 reg = <0x0 0x1000>; 1112 interrupts = <73>; 1113 status = "disabled"; 1114 dmas = <&edma 28 0>, <&edma 29 0>; 1115 dma-names = "tx", "rx"; 1116 }; 1117 }; 1118 1119 target-module@24000 { /* 0x48024000, ap 12 14.0 */ 1120 compatible = "ti,sysc-omap2", "ti,sysc"; 1121 reg = <0x24050 0x4>, 1122 <0x24054 0x4>, 1123 <0x24058 0x4>; 1124 reg-names = "rev", "sysc", "syss"; 1125 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1126 SYSC_OMAP2_SOFTRESET | 1127 SYSC_OMAP2_AUTOIDLE)>; 1128 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1129 <SYSC_IDLE_NO>, 1130 <SYSC_IDLE_SMART>, 1131 <SYSC_IDLE_SMART_WKUP>; 1132 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1133 clocks = <&l4ls_clkctrl AM3_L4LS_UART3_CLKCTRL 0>; 1134 clock-names = "fck"; 1135 #address-cells = <1>; 1136 #size-cells = <1>; 1137 ranges = <0x0 0x24000 0x1000>; 1138 1139 uart2: serial@0 { 1140 compatible = "ti,am3352-uart", "ti,omap3-uart"; 1141 clock-frequency = <48000000>; 1142 reg = <0x0 0x1000>; 1143 interrupts = <74>; 1144 status = "disabled"; 1145 dmas = <&edma 30 0>, <&edma 31 0>; 1146 dma-names = "tx", "rx"; 1147 }; 1148 }; 1149 1150 target-module@2a000 { /* 0x4802a000, ap 14 2a.0 */ 1151 compatible = "ti,sysc-omap2", "ti,sysc"; 1152 reg = <0x2a000 0x8>, 1153 <0x2a010 0x8>, 1154 <0x2a090 0x8>; 1155 reg-names = "rev", "sysc", "syss"; 1156 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1157 SYSC_OMAP2_ENAWAKEUP | 1158 SYSC_OMAP2_SOFTRESET | 1159 SYSC_OMAP2_AUTOIDLE)>; 1160 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1161 <SYSC_IDLE_NO>, 1162 <SYSC_IDLE_SMART>, 1163 <SYSC_IDLE_SMART_WKUP>; 1164 ti,syss-mask = <1>; 1165 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1166 clocks = <&l4ls_clkctrl AM3_L4LS_I2C2_CLKCTRL 0>; 1167 clock-names = "fck"; 1168 #address-cells = <1>; 1169 #size-cells = <1>; 1170 ranges = <0x0 0x2a000 0x1000>; 1171 1172 i2c1: i2c@0 { 1173 compatible = "ti,omap4-i2c"; 1174 #address-cells = <1>; 1175 #size-cells = <0>; 1176 reg = <0x0 0x1000>; 1177 interrupts = <71>; 1178 status = "disabled"; 1179 }; 1180 }; 1181 1182 target-module@30000 { /* 0x48030000, ap 77 08.0 */ 1183 compatible = "ti,sysc-omap2", "ti,sysc"; 1184 reg = <0x30000 0x4>, 1185 <0x30110 0x4>, 1186 <0x30114 0x4>; 1187 reg-names = "rev", "sysc", "syss"; 1188 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1189 SYSC_OMAP2_SOFTRESET | 1190 SYSC_OMAP2_AUTOIDLE)>; 1191 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1192 <SYSC_IDLE_NO>, 1193 <SYSC_IDLE_SMART>; 1194 ti,syss-mask = <1>; 1195 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1196 clocks = <&l4ls_clkctrl AM3_L4LS_SPI0_CLKCTRL 0>; 1197 clock-names = "fck"; 1198 #address-cells = <1>; 1199 #size-cells = <1>; 1200 ranges = <0x0 0x30000 0x1000>; 1201 1202 spi0: spi@0 { 1203 compatible = "ti,omap4-mcspi"; 1204 #address-cells = <1>; 1205 #size-cells = <0>; 1206 reg = <0x0 0x400>; 1207 interrupts = <65>; 1208 ti,spi-num-cs = <2>; 1209 dmas = <&edma 16 0 1210 &edma 17 0 1211 &edma 18 0 1212 &edma 19 0>; 1213 dma-names = "tx0", "rx0", "tx1", "rx1"; 1214 status = "disabled"; 1215 }; 1216 }; 1217 1218 target-module@38000 { /* 0x48038000, ap 16 02.0 */ 1219 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 1220 reg = <0x38000 0x4>, 1221 <0x38004 0x4>; 1222 reg-names = "rev", "sysc"; 1223 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1224 <SYSC_IDLE_NO>, 1225 <SYSC_IDLE_SMART>; 1226 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 1227 clocks = <&l3s_clkctrl AM3_L3S_MCASP0_CLKCTRL 0>; 1228 clock-names = "fck"; 1229 #address-cells = <1>; 1230 #size-cells = <1>; 1231 ranges = <0x0 0x38000 0x2000>, 1232 <0x46000000 0x46000000 0x400000>; 1233 1234 mcasp0: mcasp@0 { 1235 compatible = "ti,am33xx-mcasp-audio"; 1236 reg = <0x0 0x2000>, 1237 <0x46000000 0x400000>; 1238 reg-names = "mpu", "dat"; 1239 interrupts = <80>, <81>; 1240 interrupt-names = "tx", "rx"; 1241 status = "disabled"; 1242 dmas = <&edma 8 2>, 1243 <&edma 9 2>; 1244 dma-names = "tx", "rx"; 1245 }; 1246 }; 1247 1248 target-module@3c000 { /* 0x4803c000, ap 20 32.0 */ 1249 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 1250 reg = <0x3c000 0x4>, 1251 <0x3c004 0x4>; 1252 reg-names = "rev", "sysc"; 1253 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1254 <SYSC_IDLE_NO>, 1255 <SYSC_IDLE_SMART>; 1256 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 1257 clocks = <&l3s_clkctrl AM3_L3S_MCASP1_CLKCTRL 0>; 1258 clock-names = "fck"; 1259 #address-cells = <1>; 1260 #size-cells = <1>; 1261 ranges = <0x0 0x3c000 0x2000>, 1262 <0x46400000 0x46400000 0x400000>; 1263 1264 mcasp1: mcasp@0 { 1265 compatible = "ti,am33xx-mcasp-audio"; 1266 reg = <0x0 0x2000>, 1267 <0x46400000 0x400000>; 1268 reg-names = "mpu", "dat"; 1269 interrupts = <82>, <83>; 1270 interrupt-names = "tx", "rx"; 1271 status = "disabled"; 1272 dmas = <&edma 10 2>, 1273 <&edma 11 2>; 1274 dma-names = "tx", "rx"; 1275 }; 1276 }; 1277 1278 timer2_target: target-module@40000 { /* 0x48040000, ap 22 1e.0 */ 1279 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1280 reg = <0x40000 0x4>, 1281 <0x40010 0x4>, 1282 <0x40014 0x4>; 1283 reg-names = "rev", "sysc", "syss"; 1284 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1285 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1286 <SYSC_IDLE_NO>, 1287 <SYSC_IDLE_SMART>, 1288 <SYSC_IDLE_SMART_WKUP>; 1289 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1290 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>; 1291 clock-names = "fck"; 1292 #address-cells = <1>; 1293 #size-cells = <1>; 1294 ranges = <0x0 0x40000 0x1000>; 1295 1296 timer2: timer@0 { 1297 compatible = "ti,am335x-timer"; 1298 reg = <0x0 0x400>; 1299 interrupts = <68>; 1300 clocks = <&timer2_fck>; 1301 clock-names = "fck"; 1302 }; 1303 }; 1304 1305 target-module@42000 { /* 0x48042000, ap 24 1c.0 */ 1306 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1307 reg = <0x42000 0x4>, 1308 <0x42010 0x4>, 1309 <0x42014 0x4>; 1310 reg-names = "rev", "sysc", "syss"; 1311 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1312 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1313 <SYSC_IDLE_NO>, 1314 <SYSC_IDLE_SMART>, 1315 <SYSC_IDLE_SMART_WKUP>; 1316 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1317 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER3_CLKCTRL 0>; 1318 clock-names = "fck"; 1319 #address-cells = <1>; 1320 #size-cells = <1>; 1321 ranges = <0x0 0x42000 0x1000>; 1322 1323 timer3: timer@0 { 1324 compatible = "ti,am335x-timer"; 1325 reg = <0x0 0x400>; 1326 interrupts = <69>; 1327 }; 1328 }; 1329 1330 target-module@44000 { /* 0x48044000, ap 26 26.0 */ 1331 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1332 reg = <0x44000 0x4>, 1333 <0x44010 0x4>, 1334 <0x44014 0x4>; 1335 reg-names = "rev", "sysc", "syss"; 1336 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1337 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1338 <SYSC_IDLE_NO>, 1339 <SYSC_IDLE_SMART>, 1340 <SYSC_IDLE_SMART_WKUP>; 1341 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1342 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER4_CLKCTRL 0>; 1343 clock-names = "fck"; 1344 #address-cells = <1>; 1345 #size-cells = <1>; 1346 ranges = <0x0 0x44000 0x1000>; 1347 1348 timer4: timer@0 { 1349 compatible = "ti,am335x-timer"; 1350 reg = <0x0 0x400>; 1351 interrupts = <92>; 1352 ti,timer-pwm; 1353 }; 1354 }; 1355 1356 target-module@46000 { /* 0x48046000, ap 28 28.0 */ 1357 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1358 reg = <0x46000 0x4>, 1359 <0x46010 0x4>, 1360 <0x46014 0x4>; 1361 reg-names = "rev", "sysc", "syss"; 1362 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1363 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1364 <SYSC_IDLE_NO>, 1365 <SYSC_IDLE_SMART>, 1366 <SYSC_IDLE_SMART_WKUP>; 1367 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1368 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER5_CLKCTRL 0>; 1369 clock-names = "fck"; 1370 #address-cells = <1>; 1371 #size-cells = <1>; 1372 ranges = <0x0 0x46000 0x1000>; 1373 1374 timer5: timer@0 { 1375 compatible = "ti,am335x-timer"; 1376 reg = <0x0 0x400>; 1377 interrupts = <93>; 1378 ti,timer-pwm; 1379 }; 1380 }; 1381 1382 target-module@48000 { /* 0x48048000, ap 30 22.0 */ 1383 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1384 reg = <0x48000 0x4>, 1385 <0x48010 0x4>, 1386 <0x48014 0x4>; 1387 reg-names = "rev", "sysc", "syss"; 1388 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1389 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1390 <SYSC_IDLE_NO>, 1391 <SYSC_IDLE_SMART>, 1392 <SYSC_IDLE_SMART_WKUP>; 1393 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1394 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER6_CLKCTRL 0>; 1395 clock-names = "fck"; 1396 #address-cells = <1>; 1397 #size-cells = <1>; 1398 ranges = <0x0 0x48000 0x1000>; 1399 1400 timer6: timer@0 { 1401 compatible = "ti,am335x-timer"; 1402 reg = <0x0 0x400>; 1403 interrupts = <94>; 1404 ti,timer-pwm; 1405 }; 1406 }; 1407 1408 target-module@4a000 { /* 0x4804a000, ap 85 60.0 */ 1409 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1410 reg = <0x4a000 0x4>, 1411 <0x4a010 0x4>, 1412 <0x4a014 0x4>; 1413 reg-names = "rev", "sysc", "syss"; 1414 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1415 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1416 <SYSC_IDLE_NO>, 1417 <SYSC_IDLE_SMART>, 1418 <SYSC_IDLE_SMART_WKUP>; 1419 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1420 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER7_CLKCTRL 0>; 1421 clock-names = "fck"; 1422 #address-cells = <1>; 1423 #size-cells = <1>; 1424 ranges = <0x0 0x4a000 0x1000>; 1425 1426 timer7: timer@0 { 1427 compatible = "ti,am335x-timer"; 1428 reg = <0x0 0x400>; 1429 interrupts = <95>; 1430 ti,timer-pwm; 1431 }; 1432 }; 1433 1434 target-module@4c000 { /* 0x4804c000, ap 32 36.0 */ 1435 compatible = "ti,sysc-omap2", "ti,sysc"; 1436 reg = <0x4c000 0x4>, 1437 <0x4c010 0x4>, 1438 <0x4c114 0x4>; 1439 reg-names = "rev", "sysc", "syss"; 1440 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1441 SYSC_OMAP2_SOFTRESET | 1442 SYSC_OMAP2_AUTOIDLE)>; 1443 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1444 <SYSC_IDLE_NO>, 1445 <SYSC_IDLE_SMART>, 1446 <SYSC_IDLE_SMART_WKUP>; 1447 ti,syss-mask = <1>; 1448 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1449 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 0>, 1450 <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 18>; 1451 clock-names = "fck", "dbclk"; 1452 #address-cells = <1>; 1453 #size-cells = <1>; 1454 ranges = <0x0 0x4c000 0x1000>; 1455 1456 gpio1: gpio@0 { 1457 compatible = "ti,omap4-gpio"; 1458 gpio-ranges = <&am33xx_pinmux 0 0 8>, 1459 <&am33xx_pinmux 8 90 4>, 1460 <&am33xx_pinmux 12 12 16>, 1461 <&am33xx_pinmux 28 30 4>; 1462 gpio-controller; 1463 #gpio-cells = <2>; 1464 interrupt-controller; 1465 #interrupt-cells = <2>; 1466 reg = <0x0 0x1000>; 1467 interrupts = <98>; 1468 }; 1469 }; 1470 1471 target-module@50000 { /* 0x48050000, ap 34 2c.0 */ 1472 compatible = "ti,sysc"; 1473 status = "disabled"; 1474 #address-cells = <1>; 1475 #size-cells = <1>; 1476 ranges = <0x0 0x50000 0x2000>; 1477 }; 1478 1479 target-module@60000 { /* 0x48060000, ap 36 0c.0 */ 1480 compatible = "ti,sysc-omap2", "ti,sysc"; 1481 reg = <0x602fc 0x4>, 1482 <0x60110 0x4>, 1483 <0x60114 0x4>; 1484 reg-names = "rev", "sysc", "syss"; 1485 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1486 SYSC_OMAP2_ENAWAKEUP | 1487 SYSC_OMAP2_SOFTRESET | 1488 SYSC_OMAP2_AUTOIDLE)>; 1489 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1490 <SYSC_IDLE_NO>, 1491 <SYSC_IDLE_SMART>; 1492 ti,syss-mask = <1>; 1493 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1494 clocks = <&l4ls_clkctrl AM3_L4LS_MMC1_CLKCTRL 0>; 1495 clock-names = "fck"; 1496 #address-cells = <1>; 1497 #size-cells = <1>; 1498 ranges = <0x0 0x60000 0x1000>; 1499 1500 mmc1: mmc@0 { 1501 compatible = "ti,am335-sdhci"; 1502 ti,needs-special-reset; 1503 dmas = <&edma_xbar 24 0 0 1504 &edma_xbar 25 0 0>; 1505 dma-names = "tx", "rx"; 1506 interrupts = <64>; 1507 reg = <0x0 0x1000>; 1508 status = "disabled"; 1509 }; 1510 }; 1511 1512 target-module@80000 { /* 0x48080000, ap 38 18.0 */ 1513 compatible = "ti,sysc-omap2", "ti,sysc"; 1514 reg = <0x80000 0x4>, 1515 <0x80010 0x4>, 1516 <0x80014 0x4>; 1517 reg-names = "rev", "sysc", "syss"; 1518 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1519 SYSC_OMAP2_SOFTRESET | 1520 SYSC_OMAP2_AUTOIDLE)>; 1521 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1522 <SYSC_IDLE_NO>, 1523 <SYSC_IDLE_SMART>; 1524 ti,syss-mask = <1>; 1525 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1526 clocks = <&l4ls_clkctrl AM3_L4LS_ELM_CLKCTRL 0>; 1527 clock-names = "fck"; 1528 #address-cells = <1>; 1529 #size-cells = <1>; 1530 ranges = <0x0 0x80000 0x10000>; 1531 1532 elm: elm@0 { 1533 compatible = "ti,am3352-elm"; 1534 reg = <0x0 0x2000>; 1535 interrupts = <4>; 1536 status = "disabled"; 1537 }; 1538 }; 1539 1540 target-module@a0000 { /* 0x480a0000, ap 40 5e.0 */ 1541 compatible = "ti,sysc"; 1542 status = "disabled"; 1543 #address-cells = <1>; 1544 #size-cells = <1>; 1545 ranges = <0x0 0xa0000 0x10000>; 1546 }; 1547 1548 target-module@c8000 { /* 0x480c8000, ap 87 06.0 */ 1549 compatible = "ti,sysc-omap4", "ti,sysc"; 1550 reg = <0xc8000 0x4>, 1551 <0xc8010 0x4>; 1552 reg-names = "rev", "sysc"; 1553 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1554 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1555 <SYSC_IDLE_NO>, 1556 <SYSC_IDLE_SMART>; 1557 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1558 clocks = <&l4ls_clkctrl AM3_L4LS_MAILBOX_CLKCTRL 0>; 1559 clock-names = "fck"; 1560 #address-cells = <1>; 1561 #size-cells = <1>; 1562 ranges = <0x0 0xc8000 0x1000>; 1563 1564 mailbox: mailbox@0 { 1565 compatible = "ti,omap4-mailbox"; 1566 reg = <0x0 0x200>; 1567 interrupts = <77>; 1568 #mbox-cells = <1>; 1569 ti,mbox-num-users = <4>; 1570 ti,mbox-num-fifos = <8>; 1571 mbox_wkupm3: mbox-wkup-m3 { 1572 ti,mbox-send-noirq; 1573 ti,mbox-tx = <0 0 0>; 1574 ti,mbox-rx = <0 0 3>; 1575 }; 1576 }; 1577 }; 1578 1579 target-module@ca000 { /* 0x480ca000, ap 91 40.0 */ 1580 compatible = "ti,sysc-omap2", "ti,sysc"; 1581 reg = <0xca000 0x4>, 1582 <0xca010 0x4>, 1583 <0xca014 0x4>; 1584 reg-names = "rev", "sysc", "syss"; 1585 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1586 SYSC_OMAP2_ENAWAKEUP | 1587 SYSC_OMAP2_SOFTRESET | 1588 SYSC_OMAP2_AUTOIDLE)>; 1589 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1590 <SYSC_IDLE_NO>, 1591 <SYSC_IDLE_SMART>; 1592 ti,syss-mask = <1>; 1593 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1594 clocks = <&l4ls_clkctrl AM3_L4LS_SPINLOCK_CLKCTRL 0>; 1595 clock-names = "fck"; 1596 #address-cells = <1>; 1597 #size-cells = <1>; 1598 ranges = <0x0 0xca000 0x1000>; 1599 1600 hwspinlock: spinlock@0 { 1601 compatible = "ti,omap4-hwspinlock"; 1602 reg = <0x0 0x1000>; 1603 #hwlock-cells = <1>; 1604 }; 1605 }; 1606 1607 target-module@cc000 { /* 0x480cc000, ap 89 0e.0 */ 1608 compatible = "ti,sysc"; 1609 status = "disabled"; 1610 #address-cells = <1>; 1611 #size-cells = <1>; 1612 ranges = <0x0 0xcc000 0x1000>; 1613 }; 1614 }; 1615 1616 segment@100000 { /* 0x48100000 */ 1617 compatible = "simple-pm-bus"; 1618 #address-cells = <1>; 1619 #size-cells = <1>; 1620 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 42 */ 1621 <0x0008d000 0x0018d000 0x001000>, /* ap 43 */ 1622 <0x0008e000 0x0018e000 0x001000>, /* ap 44 */ 1623 <0x0008f000 0x0018f000 0x001000>, /* ap 45 */ 1624 <0x0009c000 0x0019c000 0x001000>, /* ap 46 */ 1625 <0x0009d000 0x0019d000 0x001000>, /* ap 47 */ 1626 <0x000a6000 0x001a6000 0x001000>, /* ap 48 */ 1627 <0x000a7000 0x001a7000 0x001000>, /* ap 49 */ 1628 <0x000a8000 0x001a8000 0x001000>, /* ap 50 */ 1629 <0x000a9000 0x001a9000 0x001000>, /* ap 51 */ 1630 <0x000aa000 0x001aa000 0x001000>, /* ap 52 */ 1631 <0x000ab000 0x001ab000 0x001000>, /* ap 53 */ 1632 <0x000ac000 0x001ac000 0x001000>, /* ap 54 */ 1633 <0x000ad000 0x001ad000 0x001000>, /* ap 55 */ 1634 <0x000ae000 0x001ae000 0x001000>, /* ap 56 */ 1635 <0x000af000 0x001af000 0x001000>, /* ap 57 */ 1636 <0x000b0000 0x001b0000 0x010000>, /* ap 58 */ 1637 <0x000c0000 0x001c0000 0x001000>, /* ap 59 */ 1638 <0x000cc000 0x001cc000 0x002000>, /* ap 60 */ 1639 <0x000ce000 0x001ce000 0x002000>, /* ap 61 */ 1640 <0x000d0000 0x001d0000 0x002000>, /* ap 62 */ 1641 <0x000d2000 0x001d2000 0x002000>, /* ap 63 */ 1642 <0x000d8000 0x001d8000 0x001000>, /* ap 64 */ 1643 <0x000d9000 0x001d9000 0x001000>, /* ap 65 */ 1644 <0x000a0000 0x001a0000 0x001000>, /* ap 79 */ 1645 <0x000a1000 0x001a1000 0x001000>, /* ap 80 */ 1646 <0x000a2000 0x001a2000 0x001000>, /* ap 81 */ 1647 <0x000a3000 0x001a3000 0x001000>, /* ap 82 */ 1648 <0x000a4000 0x001a4000 0x001000>, /* ap 83 */ 1649 <0x000a5000 0x001a5000 0x001000>; /* ap 84 */ 1650 1651 target-module@8c000 { /* 0x4818c000, ap 42 04.0 */ 1652 compatible = "ti,sysc"; 1653 status = "disabled"; 1654 #address-cells = <1>; 1655 #size-cells = <1>; 1656 ranges = <0x0 0x8c000 0x1000>; 1657 }; 1658 1659 target-module@8e000 { /* 0x4818e000, ap 44 0a.0 */ 1660 compatible = "ti,sysc"; 1661 status = "disabled"; 1662 #address-cells = <1>; 1663 #size-cells = <1>; 1664 ranges = <0x0 0x8e000 0x1000>; 1665 }; 1666 1667 target-module@9c000 { /* 0x4819c000, ap 46 5a.0 */ 1668 compatible = "ti,sysc-omap2", "ti,sysc"; 1669 reg = <0x9c000 0x8>, 1670 <0x9c010 0x8>, 1671 <0x9c090 0x8>; 1672 reg-names = "rev", "sysc", "syss"; 1673 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1674 SYSC_OMAP2_ENAWAKEUP | 1675 SYSC_OMAP2_SOFTRESET | 1676 SYSC_OMAP2_AUTOIDLE)>; 1677 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1678 <SYSC_IDLE_NO>, 1679 <SYSC_IDLE_SMART>, 1680 <SYSC_IDLE_SMART_WKUP>; 1681 ti,syss-mask = <1>; 1682 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1683 clocks = <&l4ls_clkctrl AM3_L4LS_I2C3_CLKCTRL 0>; 1684 clock-names = "fck"; 1685 #address-cells = <1>; 1686 #size-cells = <1>; 1687 ranges = <0x0 0x9c000 0x1000>; 1688 1689 i2c2: i2c@0 { 1690 compatible = "ti,omap4-i2c"; 1691 #address-cells = <1>; 1692 #size-cells = <0>; 1693 reg = <0x0 0x1000>; 1694 interrupts = <30>; 1695 status = "disabled"; 1696 }; 1697 }; 1698 1699 target-module@a0000 { /* 0x481a0000, ap 79 24.0 */ 1700 compatible = "ti,sysc-omap2", "ti,sysc"; 1701 reg = <0xa0000 0x4>, 1702 <0xa0110 0x4>, 1703 <0xa0114 0x4>; 1704 reg-names = "rev", "sysc", "syss"; 1705 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1706 SYSC_OMAP2_SOFTRESET | 1707 SYSC_OMAP2_AUTOIDLE)>; 1708 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1709 <SYSC_IDLE_NO>, 1710 <SYSC_IDLE_SMART>; 1711 ti,syss-mask = <1>; 1712 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1713 clocks = <&l4ls_clkctrl AM3_L4LS_SPI1_CLKCTRL 0>; 1714 clock-names = "fck"; 1715 #address-cells = <1>; 1716 #size-cells = <1>; 1717 ranges = <0x0 0xa0000 0x1000>; 1718 1719 spi1: spi@0 { 1720 compatible = "ti,omap4-mcspi"; 1721 #address-cells = <1>; 1722 #size-cells = <0>; 1723 reg = <0x0 0x400>; 1724 interrupts = <125>; 1725 ti,spi-num-cs = <2>; 1726 dmas = <&edma 42 0 1727 &edma 43 0 1728 &edma 44 0 1729 &edma 45 0>; 1730 dma-names = "tx0", "rx0", "tx1", "rx1"; 1731 status = "disabled"; 1732 }; 1733 }; 1734 1735 target-module@a2000 { /* 0x481a2000, ap 81 2e.0 */ 1736 compatible = "ti,sysc"; 1737 status = "disabled"; 1738 #address-cells = <1>; 1739 #size-cells = <1>; 1740 ranges = <0x0 0xa2000 0x1000>; 1741 }; 1742 1743 target-module@a4000 { /* 0x481a4000, ap 83 30.0 */ 1744 compatible = "ti,sysc"; 1745 status = "disabled"; 1746 #address-cells = <1>; 1747 #size-cells = <1>; 1748 ranges = <0x0 0xa4000 0x1000>; 1749 }; 1750 1751 target-module@a6000 { /* 0x481a6000, ap 48 16.0 */ 1752 compatible = "ti,sysc-omap2", "ti,sysc"; 1753 reg = <0xa6050 0x4>, 1754 <0xa6054 0x4>, 1755 <0xa6058 0x4>; 1756 reg-names = "rev", "sysc", "syss"; 1757 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1758 SYSC_OMAP2_SOFTRESET | 1759 SYSC_OMAP2_AUTOIDLE)>; 1760 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1761 <SYSC_IDLE_NO>, 1762 <SYSC_IDLE_SMART>, 1763 <SYSC_IDLE_SMART_WKUP>; 1764 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1765 clocks = <&l4ls_clkctrl AM3_L4LS_UART4_CLKCTRL 0>; 1766 clock-names = "fck"; 1767 #address-cells = <1>; 1768 #size-cells = <1>; 1769 ranges = <0x0 0xa6000 0x1000>; 1770 1771 uart3: serial@0 { 1772 compatible = "ti,am3352-uart", "ti,omap3-uart"; 1773 clock-frequency = <48000000>; 1774 reg = <0x0 0x1000>; 1775 interrupts = <44>; 1776 status = "disabled"; 1777 }; 1778 }; 1779 1780 target-module@a8000 { /* 0x481a8000, ap 50 20.0 */ 1781 compatible = "ti,sysc-omap2", "ti,sysc"; 1782 reg = <0xa8050 0x4>, 1783 <0xa8054 0x4>, 1784 <0xa8058 0x4>; 1785 reg-names = "rev", "sysc", "syss"; 1786 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1787 SYSC_OMAP2_SOFTRESET | 1788 SYSC_OMAP2_AUTOIDLE)>; 1789 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1790 <SYSC_IDLE_NO>, 1791 <SYSC_IDLE_SMART>, 1792 <SYSC_IDLE_SMART_WKUP>; 1793 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1794 clocks = <&l4ls_clkctrl AM3_L4LS_UART5_CLKCTRL 0>; 1795 clock-names = "fck"; 1796 #address-cells = <1>; 1797 #size-cells = <1>; 1798 ranges = <0x0 0xa8000 0x1000>; 1799 1800 uart4: serial@0 { 1801 compatible = "ti,am3352-uart", "ti,omap3-uart"; 1802 clock-frequency = <48000000>; 1803 reg = <0x0 0x1000>; 1804 interrupts = <45>; 1805 status = "disabled"; 1806 }; 1807 }; 1808 1809 target-module@aa000 { /* 0x481aa000, ap 52 1a.0 */ 1810 compatible = "ti,sysc-omap2", "ti,sysc"; 1811 reg = <0xaa050 0x4>, 1812 <0xaa054 0x4>, 1813 <0xaa058 0x4>; 1814 reg-names = "rev", "sysc", "syss"; 1815 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1816 SYSC_OMAP2_SOFTRESET | 1817 SYSC_OMAP2_AUTOIDLE)>; 1818 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1819 <SYSC_IDLE_NO>, 1820 <SYSC_IDLE_SMART>, 1821 <SYSC_IDLE_SMART_WKUP>; 1822 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1823 clocks = <&l4ls_clkctrl AM3_L4LS_UART6_CLKCTRL 0>; 1824 clock-names = "fck"; 1825 #address-cells = <1>; 1826 #size-cells = <1>; 1827 ranges = <0x0 0xaa000 0x1000>; 1828 1829 uart5: serial@0 { 1830 compatible = "ti,am3352-uart", "ti,omap3-uart"; 1831 clock-frequency = <48000000>; 1832 reg = <0x0 0x1000>; 1833 interrupts = <46>; 1834 status = "disabled"; 1835 }; 1836 }; 1837 1838 target-module@ac000 { /* 0x481ac000, ap 54 38.0 */ 1839 compatible = "ti,sysc-omap2", "ti,sysc"; 1840 reg = <0xac000 0x4>, 1841 <0xac010 0x4>, 1842 <0xac114 0x4>; 1843 reg-names = "rev", "sysc", "syss"; 1844 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1845 SYSC_OMAP2_SOFTRESET | 1846 SYSC_OMAP2_AUTOIDLE)>; 1847 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1848 <SYSC_IDLE_NO>, 1849 <SYSC_IDLE_SMART>, 1850 <SYSC_IDLE_SMART_WKUP>; 1851 ti,syss-mask = <1>; 1852 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1853 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 0>, 1854 <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 18>; 1855 clock-names = "fck", "dbclk"; 1856 #address-cells = <1>; 1857 #size-cells = <1>; 1858 ranges = <0x0 0xac000 0x1000>; 1859 1860 gpio2: gpio@0 { 1861 compatible = "ti,omap4-gpio"; 1862 gpio-ranges = <&am33xx_pinmux 0 34 18>, 1863 <&am33xx_pinmux 18 77 4>, 1864 <&am33xx_pinmux 22 56 10>; 1865 gpio-controller; 1866 #gpio-cells = <2>; 1867 interrupt-controller; 1868 #interrupt-cells = <2>; 1869 reg = <0x0 0x1000>; 1870 interrupts = <32>; 1871 }; 1872 }; 1873 1874 gpio3_target: target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */ 1875 compatible = "ti,sysc-omap2", "ti,sysc"; 1876 reg = <0xae000 0x4>, 1877 <0xae010 0x4>, 1878 <0xae114 0x4>; 1879 reg-names = "rev", "sysc", "syss"; 1880 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1881 SYSC_OMAP2_SOFTRESET | 1882 SYSC_OMAP2_AUTOIDLE)>; 1883 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1884 <SYSC_IDLE_NO>, 1885 <SYSC_IDLE_SMART>, 1886 <SYSC_IDLE_SMART_WKUP>; 1887 ti,syss-mask = <1>; 1888 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1889 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 0>, 1890 <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 18>; 1891 clock-names = "fck", "dbclk"; 1892 #address-cells = <1>; 1893 #size-cells = <1>; 1894 ranges = <0x0 0xae000 0x1000>; 1895 1896 gpio3: gpio@0 { 1897 compatible = "ti,omap4-gpio"; 1898 gpio-ranges = <&am33xx_pinmux 0 66 5>, 1899 <&am33xx_pinmux 5 98 2>, 1900 <&am33xx_pinmux 7 75 2>, 1901 <&am33xx_pinmux 13 141 1>, 1902 <&am33xx_pinmux 14 100 8>; 1903 gpio-controller; 1904 #gpio-cells = <2>; 1905 interrupt-controller; 1906 #interrupt-cells = <2>; 1907 reg = <0x0 0x1000>; 1908 interrupts = <62>; 1909 }; 1910 }; 1911 1912 target-module@b0000 { /* 0x481b0000, ap 58 50.0 */ 1913 compatible = "ti,sysc"; 1914 status = "disabled"; 1915 #address-cells = <1>; 1916 #size-cells = <1>; 1917 ranges = <0x0 0xb0000 0x10000>; 1918 }; 1919 1920 target-module@cc000 { /* 0x481cc000, ap 60 46.0 */ 1921 compatible = "ti,sysc-omap4", "ti,sysc"; 1922 reg = <0xcc020 0x4>; 1923 reg-names = "rev"; 1924 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1925 clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>, 1926 <&dcan0_fck>; 1927 clock-names = "fck", "osc"; 1928 #address-cells = <1>; 1929 #size-cells = <1>; 1930 ranges = <0x0 0xcc000 0x2000>; 1931 1932 dcan0: can@0 { 1933 compatible = "ti,am3352-d_can"; 1934 reg = <0x0 0x2000>; 1935 clocks = <&dcan0_fck>; 1936 clock-names = "fck"; 1937 syscon-raminit = <&scm_conf 0x644 0>; 1938 interrupts = <52>; 1939 status = "disabled"; 1940 }; 1941 }; 1942 1943 target-module@d0000 { /* 0x481d0000, ap 62 42.0 */ 1944 compatible = "ti,sysc-omap4", "ti,sysc"; 1945 reg = <0xd0020 0x4>; 1946 reg-names = "rev"; 1947 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1948 clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>, 1949 <&dcan1_fck>; 1950 clock-names = "fck", "osc"; 1951 #address-cells = <1>; 1952 #size-cells = <1>; 1953 ranges = <0x0 0xd0000 0x2000>; 1954 1955 dcan1: can@0 { 1956 compatible = "ti,am3352-d_can"; 1957 reg = <0x0 0x2000>; 1958 clocks = <&dcan1_fck>; 1959 clock-names = "fck"; 1960 syscon-raminit = <&scm_conf 0x644 1>; 1961 interrupts = <55>; 1962 status = "disabled"; 1963 }; 1964 }; 1965 1966 target-module@d8000 { /* 0x481d8000, ap 64 66.0 */ 1967 compatible = "ti,sysc-omap2", "ti,sysc"; 1968 reg = <0xd82fc 0x4>, 1969 <0xd8110 0x4>, 1970 <0xd8114 0x4>; 1971 reg-names = "rev", "sysc", "syss"; 1972 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1973 SYSC_OMAP2_ENAWAKEUP | 1974 SYSC_OMAP2_SOFTRESET | 1975 SYSC_OMAP2_AUTOIDLE)>; 1976 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1977 <SYSC_IDLE_NO>, 1978 <SYSC_IDLE_SMART>; 1979 ti,syss-mask = <1>; 1980 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1981 clocks = <&l4ls_clkctrl AM3_L4LS_MMC2_CLKCTRL 0>; 1982 clock-names = "fck"; 1983 #address-cells = <1>; 1984 #size-cells = <1>; 1985 ranges = <0x0 0xd8000 0x1000>; 1986 1987 mmc2: mmc@0 { 1988 compatible = "ti,am335-sdhci"; 1989 ti,needs-special-reset; 1990 dmas = <&edma 2 0 1991 &edma 3 0>; 1992 dma-names = "tx", "rx"; 1993 interrupts = <28>; 1994 reg = <0x0 0x1000>; 1995 status = "disabled"; 1996 }; 1997 }; 1998 }; 1999 2000 segment@200000 { /* 0x48200000 */ 2001 compatible = "simple-pm-bus"; 2002 #address-cells = <1>; 2003 #size-cells = <1>; 2004 ranges = <0x00000000 0x00200000 0x010000>; 2005 2006 target-module@0 { 2007 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 2008 power-domains = <&prm_mpu>; 2009 clocks = <&mpu_clkctrl AM3_MPU_MPU_CLKCTRL 0>; 2010 clock-names = "fck"; 2011 ti,no-idle; 2012 #address-cells = <1>; 2013 #size-cells = <1>; 2014 ranges = <0 0 0x10000>; 2015 2016 mpu@0 { 2017 compatible = "ti,omap3-mpu"; 2018 pm-sram = <&pm_sram_code 2019 &pm_sram_data>; 2020 }; 2021 }; 2022 }; 2023 2024 segment@300000 { /* 0x48300000 */ 2025 compatible = "simple-pm-bus"; 2026 #address-cells = <1>; 2027 #size-cells = <1>; 2028 ranges = <0x00000000 0x00300000 0x001000>, /* ap 66 */ 2029 <0x00001000 0x00301000 0x001000>, /* ap 67 */ 2030 <0x00002000 0x00302000 0x001000>, /* ap 68 */ 2031 <0x00003000 0x00303000 0x001000>, /* ap 69 */ 2032 <0x00004000 0x00304000 0x001000>, /* ap 70 */ 2033 <0x00005000 0x00305000 0x001000>, /* ap 71 */ 2034 <0x0000e000 0x0030e000 0x001000>, /* ap 72 */ 2035 <0x0000f000 0x0030f000 0x001000>, /* ap 73 */ 2036 <0x00018000 0x00318000 0x004000>, /* ap 74 */ 2037 <0x0001c000 0x0031c000 0x001000>, /* ap 75 */ 2038 <0x00010000 0x00310000 0x002000>, /* ap 76 */ 2039 <0x00012000 0x00312000 0x001000>, /* ap 93 */ 2040 <0x00015000 0x00315000 0x001000>, /* ap 94 */ 2041 <0x00016000 0x00316000 0x001000>, /* ap 95 */ 2042 <0x00017000 0x00317000 0x001000>, /* ap 96 */ 2043 <0x00013000 0x00313000 0x001000>, /* ap 97 */ 2044 <0x00014000 0x00314000 0x001000>, /* ap 98 */ 2045 <0x00020000 0x00320000 0x001000>, /* ap 99 */ 2046 <0x00021000 0x00321000 0x001000>, /* ap 100 */ 2047 <0x00022000 0x00322000 0x001000>, /* ap 101 */ 2048 <0x00023000 0x00323000 0x001000>, /* ap 102 */ 2049 <0x00024000 0x00324000 0x001000>, /* ap 103 */ 2050 <0x00025000 0x00325000 0x001000>; /* ap 104 */ 2051 2052 target-module@0 { /* 0x48300000, ap 66 48.0 */ 2053 compatible = "ti,sysc-omap4", "ti,sysc"; 2054 reg = <0x0 0x4>, 2055 <0x4 0x4>; 2056 reg-names = "rev", "sysc"; 2057 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2058 <SYSC_IDLE_NO>, 2059 <SYSC_IDLE_SMART>, 2060 <SYSC_IDLE_SMART_WKUP>; 2061 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2062 <SYSC_IDLE_NO>, 2063 <SYSC_IDLE_SMART>, 2064 <SYSC_IDLE_SMART_WKUP>; 2065 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2066 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS0_CLKCTRL 0>; 2067 clock-names = "fck"; 2068 #address-cells = <1>; 2069 #size-cells = <1>; 2070 ranges = <0x0 0x0 0x1000>; 2071 2072 epwmss0: epwmss@0 { 2073 compatible = "ti,am33xx-pwmss"; 2074 reg = <0x0 0x10>; 2075 #address-cells = <1>; 2076 #size-cells = <1>; 2077 status = "disabled"; 2078 ranges = <0 0 0x1000>; 2079 2080 ecap0: pwm@100 { 2081 compatible = "ti,am3352-ecap"; 2082 #pwm-cells = <3>; 2083 reg = <0x100 0x80>; 2084 clocks = <&l4ls_gclk>; 2085 clock-names = "fck"; 2086 status = "disabled"; 2087 }; 2088 2089 eqep0: counter@180 { 2090 compatible = "ti,am3352-eqep"; 2091 reg = <0x180 0x80>; 2092 clocks = <&l4ls_gclk>; 2093 clock-names = "sysclkout"; 2094 interrupts = <79>; 2095 status = "disabled"; 2096 }; 2097 2098 ehrpwm0: pwm@200 { 2099 compatible = "ti,am3352-ehrpwm"; 2100 #pwm-cells = <3>; 2101 reg = <0x200 0x80>; 2102 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; 2103 clock-names = "tbclk", "fck"; 2104 status = "disabled"; 2105 }; 2106 }; 2107 }; 2108 2109 target-module@2000 { /* 0x48302000, ap 68 52.0 */ 2110 compatible = "ti,sysc-omap4", "ti,sysc"; 2111 reg = <0x2000 0x4>, 2112 <0x2004 0x4>; 2113 reg-names = "rev", "sysc"; 2114 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2115 <SYSC_IDLE_NO>, 2116 <SYSC_IDLE_SMART>, 2117 <SYSC_IDLE_SMART_WKUP>; 2118 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2119 <SYSC_IDLE_NO>, 2120 <SYSC_IDLE_SMART>, 2121 <SYSC_IDLE_SMART_WKUP>; 2122 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2123 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS1_CLKCTRL 0>; 2124 clock-names = "fck"; 2125 #address-cells = <1>; 2126 #size-cells = <1>; 2127 ranges = <0x0 0x2000 0x1000>; 2128 2129 epwmss1: epwmss@0 { 2130 compatible = "ti,am33xx-pwmss"; 2131 reg = <0x0 0x10>; 2132 #address-cells = <1>; 2133 #size-cells = <1>; 2134 status = "disabled"; 2135 ranges = <0 0 0x1000>; 2136 2137 ecap1: pwm@100 { 2138 compatible = "ti,am3352-ecap"; 2139 #pwm-cells = <3>; 2140 reg = <0x100 0x80>; 2141 clocks = <&l4ls_gclk>; 2142 clock-names = "fck"; 2143 status = "disabled"; 2144 }; 2145 2146 eqep1: counter@180 { 2147 compatible = "ti,am3352-eqep"; 2148 reg = <0x180 0x80>; 2149 clocks = <&l4ls_gclk>; 2150 clock-names = "sysclkout"; 2151 interrupts = <88>; 2152 status = "disabled"; 2153 }; 2154 2155 ehrpwm1: pwm@200 { 2156 compatible = "ti,am3352-ehrpwm"; 2157 #pwm-cells = <3>; 2158 reg = <0x200 0x80>; 2159 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; 2160 clock-names = "tbclk", "fck"; 2161 status = "disabled"; 2162 }; 2163 }; 2164 }; 2165 2166 target-module@4000 { /* 0x48304000, ap 70 44.0 */ 2167 compatible = "ti,sysc-omap4", "ti,sysc"; 2168 reg = <0x4000 0x4>, 2169 <0x4004 0x4>; 2170 reg-names = "rev", "sysc"; 2171 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2172 <SYSC_IDLE_NO>, 2173 <SYSC_IDLE_SMART>, 2174 <SYSC_IDLE_SMART_WKUP>; 2175 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2176 <SYSC_IDLE_NO>, 2177 <SYSC_IDLE_SMART>, 2178 <SYSC_IDLE_SMART_WKUP>; 2179 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2180 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS2_CLKCTRL 0>; 2181 clock-names = "fck"; 2182 #address-cells = <1>; 2183 #size-cells = <1>; 2184 ranges = <0x0 0x4000 0x1000>; 2185 2186 epwmss2: epwmss@0 { 2187 compatible = "ti,am33xx-pwmss"; 2188 reg = <0x0 0x10>; 2189 #address-cells = <1>; 2190 #size-cells = <1>; 2191 status = "disabled"; 2192 ranges = <0 0 0x1000>; 2193 2194 ecap2: pwm@100 { 2195 compatible = "ti,am3352-ecap"; 2196 #pwm-cells = <3>; 2197 reg = <0x100 0x80>; 2198 clocks = <&l4ls_gclk>; 2199 clock-names = "fck"; 2200 status = "disabled"; 2201 }; 2202 2203 eqep2: counter@180 { 2204 compatible = "ti,am3352-eqep"; 2205 reg = <0x180 0x80>; 2206 clocks = <&l4ls_gclk>; 2207 clock-names = "sysclkout"; 2208 interrupts = <89>; 2209 status = "disabled"; 2210 }; 2211 2212 ehrpwm2: pwm@200 { 2213 compatible = "ti,am3352-ehrpwm"; 2214 #pwm-cells = <3>; 2215 reg = <0x200 0x80>; 2216 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; 2217 clock-names = "tbclk", "fck"; 2218 status = "disabled"; 2219 }; 2220 }; 2221 }; 2222 2223 target-module@e000 { /* 0x4830e000, ap 72 4a.0 */ 2224 compatible = "ti,sysc-omap4", "ti,sysc"; 2225 reg = <0xe000 0x4>, 2226 <0xe054 0x4>; 2227 reg-names = "rev", "sysc"; 2228 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2229 <SYSC_IDLE_NO>, 2230 <SYSC_IDLE_SMART>; 2231 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2232 <SYSC_IDLE_NO>, 2233 <SYSC_IDLE_SMART>; 2234 /* Domains (P, C): per_pwrdm, lcdc_clkdm */ 2235 clocks = <&lcdc_clkctrl AM3_LCDC_LCDC_CLKCTRL 0>; 2236 clock-names = "fck"; 2237 #address-cells = <1>; 2238 #size-cells = <1>; 2239 ranges = <0x0 0xe000 0x1000>; 2240 2241 lcdc: lcdc@0 { 2242 compatible = "ti,am33xx-tilcdc"; 2243 reg = <0x0 0x1000>; 2244 interrupts = <36>; 2245 status = "disabled"; 2246 }; 2247 }; 2248 2249 target-module@10000 { /* 0x48310000, ap 76 4e.1 */ 2250 compatible = "ti,sysc-omap2", "ti,sysc"; 2251 reg = <0x11fe0 0x4>, 2252 <0x11fe4 0x4>; 2253 reg-names = "rev", "sysc"; 2254 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>; 2255 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2256 <SYSC_IDLE_NO>; 2257 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2258 clocks = <&l4ls_clkctrl AM3_L4LS_RNG_CLKCTRL 0>; 2259 clock-names = "fck"; 2260 #address-cells = <1>; 2261 #size-cells = <1>; 2262 ranges = <0x0 0x10000 0x2000>; 2263 2264 rng: rng@0 { 2265 compatible = "ti,omap4-rng"; 2266 reg = <0x0 0x2000>; 2267 interrupts = <111>; 2268 }; 2269 }; 2270 2271 target-module@13000 { /* 0x48313000, ap 97 62.0 */ 2272 compatible = "ti,sysc"; 2273 status = "disabled"; 2274 #address-cells = <1>; 2275 #size-cells = <1>; 2276 ranges = <0x0 0x13000 0x1000>; 2277 }; 2278 2279 target-module@15000 { /* 0x48315000, ap 94 56.0 */ 2280 compatible = "ti,sysc"; 2281 status = "disabled"; 2282 #address-cells = <1>; 2283 #size-cells = <1>; 2284 ranges = <0x00000000 0x00015000 0x00001000>, 2285 <0x00001000 0x00016000 0x00001000>; 2286 }; 2287 2288 target-module@18000 { /* 0x48318000, ap 74 4c.0 */ 2289 compatible = "ti,sysc"; 2290 status = "disabled"; 2291 #address-cells = <1>; 2292 #size-cells = <1>; 2293 ranges = <0x0 0x18000 0x4000>; 2294 }; 2295 2296 target-module@20000 { /* 0x48320000, ap 99 34.0 */ 2297 compatible = "ti,sysc"; 2298 status = "disabled"; 2299 #address-cells = <1>; 2300 #size-cells = <1>; 2301 ranges = <0x0 0x20000 0x1000>; 2302 }; 2303 2304 target-module@22000 { /* 0x48322000, ap 101 3e.0 */ 2305 compatible = "ti,sysc"; 2306 status = "disabled"; 2307 #address-cells = <1>; 2308 #size-cells = <1>; 2309 ranges = <0x0 0x22000 0x1000>; 2310 }; 2311 2312 target-module@24000 { /* 0x48324000, ap 103 68.0 */ 2313 compatible = "ti,sysc"; 2314 status = "disabled"; 2315 #address-cells = <1>; 2316 #size-cells = <1>; 2317 ranges = <0x0 0x24000 0x1000>; 2318 }; 2319 }; 2320}; 2321 2322
