1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2016-2017 Google, Inc
4 *
5 * Fairchild FUSB302 Type-C Chip Driver
6 */
7
8 #include <linux/debugfs.h>
9 #include <linux/delay.h>
10 #include <linux/errno.h>
11 #include <linux/extcon.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/of_device.h>
19 #include <linux/pinctrl/consumer.h>
20 #include <linux/proc_fs.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/sched/clock.h>
23 #include <linux/seq_file.h>
24 #include <linux/slab.h>
25 #include <linux/spinlock.h>
26 #include <linux/string.h>
27 #include <linux/types.h>
28 #include <linux/usb.h>
29 #include <linux/usb/typec.h>
30 #include <linux/usb/tcpm.h>
31 #include <linux/usb/pd.h>
32 #include <linux/workqueue.h>
33
34 #include "fusb302_reg.h"
35
36 /*
37 * When the device is SNK, BC_LVL interrupt is used to monitor cc pins
38 * for the current capability offered by the SRC. As FUSB302 chip fires
39 * the BC_LVL interrupt on PD signalings, cc lvl should be handled after
40 * a delay to avoid measuring on PD activities. The delay is slightly
41 * longer than PD_T_PD_DEBPUNCE (10-20ms).
42 */
43 #define T_BC_LVL_DEBOUNCE_DELAY_MS 30
44
45 enum toggling_mode {
46 TOGGLING_MODE_OFF,
47 TOGGLING_MODE_DRP,
48 TOGGLING_MODE_SNK,
49 TOGGLING_MODE_SRC,
50 };
51
52 enum src_current_status {
53 SRC_CURRENT_DEFAULT,
54 SRC_CURRENT_MEDIUM,
55 SRC_CURRENT_HIGH,
56 };
57
58 static const u8 ra_mda_value[] = {
59 [SRC_CURRENT_DEFAULT] = 4, /* 210mV */
60 [SRC_CURRENT_MEDIUM] = 9, /* 420mV */
61 [SRC_CURRENT_HIGH] = 18, /* 798mV */
62 };
63
64 static const u8 rd_mda_value[] = {
65 [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */
66 [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */
67 [SRC_CURRENT_HIGH] = 61, /* 2604mV */
68 };
69
70 #define LOG_BUFFER_ENTRIES 1024
71 #define LOG_BUFFER_ENTRY_SIZE 128
72
73 struct fusb302_chip {
74 struct device *dev;
75 struct i2c_client *i2c_client;
76 struct tcpm_port *tcpm_port;
77 struct tcpc_dev tcpc_dev;
78
79 struct regulator *vbus;
80
81 spinlock_t irq_lock;
82 struct work_struct irq_work;
83 bool irq_suspended;
84 bool irq_while_suspended;
85 struct gpio_desc *gpio_int_n;
86 int gpio_int_n_irq;
87 struct extcon_dev *extcon;
88
89 struct workqueue_struct *wq;
90 struct delayed_work bc_lvl_handler;
91
92 /* lock for sharing chip states */
93 struct mutex lock;
94
95 /* chip status */
96 enum toggling_mode toggling_mode;
97 enum src_current_status src_current_status;
98 bool intr_togdone;
99 bool intr_bc_lvl;
100 bool intr_comp_chng;
101
102 /* port status */
103 bool vconn_on;
104 bool vbus_on;
105 bool charge_on;
106 bool vbus_present;
107 enum typec_cc_polarity cc_polarity;
108 enum typec_cc_status cc1;
109 enum typec_cc_status cc2;
110 u32 snk_pdo[PDO_MAX_OBJECTS];
111
112 #ifdef CONFIG_DEBUG_FS
113 struct dentry *dentry;
114 /* lock for log buffer access */
115 struct mutex logbuffer_lock;
116 int logbuffer_head;
117 int logbuffer_tail;
118 u8 *logbuffer[LOG_BUFFER_ENTRIES];
119 #endif
120 };
121
122 /*
123 * Logging
124 */
125
126 #ifdef CONFIG_DEBUG_FS
fusb302_log_full(struct fusb302_chip * chip)127 static bool fusb302_log_full(struct fusb302_chip *chip)
128 {
129 return chip->logbuffer_tail ==
130 (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES;
131 }
132
133 __printf(2, 0)
_fusb302_log(struct fusb302_chip * chip,const char * fmt,va_list args)134 static void _fusb302_log(struct fusb302_chip *chip, const char *fmt,
135 va_list args)
136 {
137 char tmpbuffer[LOG_BUFFER_ENTRY_SIZE];
138 u64 ts_nsec = local_clock();
139 unsigned long rem_nsec;
140
141 if (!chip->logbuffer[chip->logbuffer_head]) {
142 chip->logbuffer[chip->logbuffer_head] =
143 kzalloc(LOG_BUFFER_ENTRY_SIZE, GFP_KERNEL);
144 if (!chip->logbuffer[chip->logbuffer_head])
145 return;
146 }
147
148 vsnprintf(tmpbuffer, sizeof(tmpbuffer), fmt, args);
149
150 mutex_lock(&chip->logbuffer_lock);
151
152 if (fusb302_log_full(chip)) {
153 chip->logbuffer_head = max(chip->logbuffer_head - 1, 0);
154 strlcpy(tmpbuffer, "overflow", sizeof(tmpbuffer));
155 }
156
157 if (chip->logbuffer_head < 0 ||
158 chip->logbuffer_head >= LOG_BUFFER_ENTRIES) {
159 dev_warn(chip->dev,
160 "Bad log buffer index %d\n", chip->logbuffer_head);
161 goto abort;
162 }
163
164 if (!chip->logbuffer[chip->logbuffer_head]) {
165 dev_warn(chip->dev,
166 "Log buffer index %d is NULL\n", chip->logbuffer_head);
167 goto abort;
168 }
169
170 rem_nsec = do_div(ts_nsec, 1000000000);
171 scnprintf(chip->logbuffer[chip->logbuffer_head],
172 LOG_BUFFER_ENTRY_SIZE, "[%5lu.%06lu] %s",
173 (unsigned long)ts_nsec, rem_nsec / 1000,
174 tmpbuffer);
175 chip->logbuffer_head = (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES;
176
177 abort:
178 mutex_unlock(&chip->logbuffer_lock);
179 }
180
181 __printf(2, 3)
fusb302_log(struct fusb302_chip * chip,const char * fmt,...)182 static void fusb302_log(struct fusb302_chip *chip, const char *fmt, ...)
183 {
184 va_list args;
185
186 va_start(args, fmt);
187 _fusb302_log(chip, fmt, args);
188 va_end(args);
189 }
190
fusb302_debug_show(struct seq_file * s,void * v)191 static int fusb302_debug_show(struct seq_file *s, void *v)
192 {
193 struct fusb302_chip *chip = (struct fusb302_chip *)s->private;
194 int tail;
195
196 mutex_lock(&chip->logbuffer_lock);
197 tail = chip->logbuffer_tail;
198 while (tail != chip->logbuffer_head) {
199 seq_printf(s, "%s\n", chip->logbuffer[tail]);
200 tail = (tail + 1) % LOG_BUFFER_ENTRIES;
201 }
202 if (!seq_has_overflowed(s))
203 chip->logbuffer_tail = tail;
204 mutex_unlock(&chip->logbuffer_lock);
205
206 return 0;
207 }
208 DEFINE_SHOW_ATTRIBUTE(fusb302_debug);
209
fusb302_debugfs_init(struct fusb302_chip * chip)210 static void fusb302_debugfs_init(struct fusb302_chip *chip)
211 {
212 char name[NAME_MAX];
213
214 mutex_init(&chip->logbuffer_lock);
215 snprintf(name, NAME_MAX, "fusb302-%s", dev_name(chip->dev));
216 chip->dentry = debugfs_create_file(name, S_IFREG | 0444, usb_debug_root,
217 chip, &fusb302_debug_fops);
218 }
219
fusb302_debugfs_exit(struct fusb302_chip * chip)220 static void fusb302_debugfs_exit(struct fusb302_chip *chip)
221 {
222 debugfs_remove(chip->dentry);
223 }
224
225 #else
226
fusb302_log(const struct fusb302_chip * chip,const char * fmt,...)227 static void fusb302_log(const struct fusb302_chip *chip,
228 const char *fmt, ...) { }
fusb302_debugfs_init(const struct fusb302_chip * chip)229 static void fusb302_debugfs_init(const struct fusb302_chip *chip) { }
fusb302_debugfs_exit(const struct fusb302_chip * chip)230 static void fusb302_debugfs_exit(const struct fusb302_chip *chip) { }
231
232 #endif
233
fusb302_i2c_write(struct fusb302_chip * chip,u8 address,u8 data)234 static int fusb302_i2c_write(struct fusb302_chip *chip,
235 u8 address, u8 data)
236 {
237 int ret = 0;
238
239 ret = i2c_smbus_write_byte_data(chip->i2c_client, address, data);
240 if (ret < 0)
241 fusb302_log(chip, "cannot write 0x%02x to 0x%02x, ret=%d",
242 data, address, ret);
243
244 return ret;
245 }
246
fusb302_i2c_block_write(struct fusb302_chip * chip,u8 address,u8 length,const u8 * data)247 static int fusb302_i2c_block_write(struct fusb302_chip *chip, u8 address,
248 u8 length, const u8 *data)
249 {
250 int ret = 0;
251
252 if (length <= 0)
253 return ret;
254
255 ret = i2c_smbus_write_i2c_block_data(chip->i2c_client, address,
256 length, data);
257 if (ret < 0)
258 fusb302_log(chip, "cannot block write 0x%02x, len=%d, ret=%d",
259 address, length, ret);
260
261 return ret;
262 }
263
fusb302_i2c_read(struct fusb302_chip * chip,u8 address,u8 * data)264 static int fusb302_i2c_read(struct fusb302_chip *chip,
265 u8 address, u8 *data)
266 {
267 int ret = 0;
268
269 ret = i2c_smbus_read_byte_data(chip->i2c_client, address);
270 *data = (u8)ret;
271 if (ret < 0)
272 fusb302_log(chip, "cannot read %02x, ret=%d", address, ret);
273
274 return ret;
275 }
276
fusb302_i2c_block_read(struct fusb302_chip * chip,u8 address,u8 length,u8 * data)277 static int fusb302_i2c_block_read(struct fusb302_chip *chip, u8 address,
278 u8 length, u8 *data)
279 {
280 int ret = 0;
281
282 if (length <= 0)
283 return ret;
284
285 ret = i2c_smbus_read_i2c_block_data(chip->i2c_client, address,
286 length, data);
287 if (ret < 0) {
288 fusb302_log(chip, "cannot block read 0x%02x, len=%d, ret=%d",
289 address, length, ret);
290 goto done;
291 }
292 if (ret != length) {
293 fusb302_log(chip, "only read %d/%d bytes from 0x%02x",
294 ret, length, address);
295 ret = -EIO;
296 }
297
298 done:
299 return ret;
300 }
301
fusb302_i2c_mask_write(struct fusb302_chip * chip,u8 address,u8 mask,u8 value)302 static int fusb302_i2c_mask_write(struct fusb302_chip *chip, u8 address,
303 u8 mask, u8 value)
304 {
305 int ret = 0;
306 u8 data;
307
308 ret = fusb302_i2c_read(chip, address, &data);
309 if (ret < 0)
310 return ret;
311 data &= ~mask;
312 data |= value;
313 ret = fusb302_i2c_write(chip, address, data);
314 if (ret < 0)
315 return ret;
316
317 return ret;
318 }
319
fusb302_i2c_set_bits(struct fusb302_chip * chip,u8 address,u8 set_bits)320 static int fusb302_i2c_set_bits(struct fusb302_chip *chip, u8 address,
321 u8 set_bits)
322 {
323 return fusb302_i2c_mask_write(chip, address, 0x00, set_bits);
324 }
325
fusb302_i2c_clear_bits(struct fusb302_chip * chip,u8 address,u8 clear_bits)326 static int fusb302_i2c_clear_bits(struct fusb302_chip *chip, u8 address,
327 u8 clear_bits)
328 {
329 return fusb302_i2c_mask_write(chip, address, clear_bits, 0x00);
330 }
331
fusb302_sw_reset(struct fusb302_chip * chip)332 static int fusb302_sw_reset(struct fusb302_chip *chip)
333 {
334 int ret = 0;
335
336 ret = fusb302_i2c_write(chip, FUSB_REG_RESET,
337 FUSB_REG_RESET_SW_RESET);
338 if (ret < 0)
339 fusb302_log(chip, "cannot sw reset the chip, ret=%d", ret);
340 else
341 fusb302_log(chip, "sw reset");
342
343 return ret;
344 }
345
fusb302_enable_tx_auto_retries(struct fusb302_chip * chip)346 static int fusb302_enable_tx_auto_retries(struct fusb302_chip *chip)
347 {
348 int ret = 0;
349
350 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
351 FUSB_REG_CONTROL3_N_RETRIES_3 |
352 FUSB_REG_CONTROL3_AUTO_RETRY);
353
354 return ret;
355 }
356
357 /*
358 * initialize interrupt on the chip
359 * - unmasked interrupt: VBUS_OK
360 */
fusb302_init_interrupt(struct fusb302_chip * chip)361 static int fusb302_init_interrupt(struct fusb302_chip *chip)
362 {
363 int ret = 0;
364
365 ret = fusb302_i2c_write(chip, FUSB_REG_MASK,
366 0xFF & ~FUSB_REG_MASK_VBUSOK);
367 if (ret < 0)
368 return ret;
369 ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF);
370 if (ret < 0)
371 return ret;
372 ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF);
373 if (ret < 0)
374 return ret;
375 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL0,
376 FUSB_REG_CONTROL0_INT_MASK);
377 if (ret < 0)
378 return ret;
379
380 return ret;
381 }
382
fusb302_set_power_mode(struct fusb302_chip * chip,u8 power_mode)383 static int fusb302_set_power_mode(struct fusb302_chip *chip, u8 power_mode)
384 {
385 int ret = 0;
386
387 ret = fusb302_i2c_write(chip, FUSB_REG_POWER, power_mode);
388
389 return ret;
390 }
391
tcpm_init(struct tcpc_dev * dev)392 static int tcpm_init(struct tcpc_dev *dev)
393 {
394 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
395 tcpc_dev);
396 int ret = 0;
397 u8 data;
398
399 ret = fusb302_sw_reset(chip);
400 if (ret < 0)
401 return ret;
402 ret = fusb302_enable_tx_auto_retries(chip);
403 if (ret < 0)
404 return ret;
405 ret = fusb302_init_interrupt(chip);
406 if (ret < 0)
407 return ret;
408 ret = fusb302_set_power_mode(chip, FUSB_REG_POWER_PWR_ALL);
409 if (ret < 0)
410 return ret;
411 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &data);
412 if (ret < 0)
413 return ret;
414 chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK);
415 ret = fusb302_i2c_read(chip, FUSB_REG_DEVICE_ID, &data);
416 if (ret < 0)
417 return ret;
418 fusb302_log(chip, "fusb302 device ID: 0x%02x", data);
419
420 return ret;
421 }
422
tcpm_get_vbus(struct tcpc_dev * dev)423 static int tcpm_get_vbus(struct tcpc_dev *dev)
424 {
425 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
426 tcpc_dev);
427 int ret = 0;
428
429 mutex_lock(&chip->lock);
430 ret = chip->vbus_present ? 1 : 0;
431 mutex_unlock(&chip->lock);
432
433 return ret;
434 }
435
tcpm_get_current_limit(struct tcpc_dev * dev)436 static int tcpm_get_current_limit(struct tcpc_dev *dev)
437 {
438 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
439 tcpc_dev);
440 int current_limit = 0;
441 unsigned long timeout;
442
443 if (!chip->extcon)
444 return 0;
445
446 /*
447 * USB2 Charger detection may still be in progress when we get here,
448 * this can take upto 600ms, wait 800ms max.
449 */
450 timeout = jiffies + msecs_to_jiffies(800);
451 do {
452 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_SDP) == 1)
453 current_limit = 500;
454
455 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_CDP) == 1 ||
456 extcon_get_state(chip->extcon, EXTCON_CHG_USB_ACA) == 1)
457 current_limit = 1500;
458
459 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_DCP) == 1)
460 current_limit = 2000;
461
462 msleep(50);
463 } while (current_limit == 0 && time_before(jiffies, timeout));
464
465 return current_limit;
466 }
467
fusb302_set_src_current(struct fusb302_chip * chip,enum src_current_status status)468 static int fusb302_set_src_current(struct fusb302_chip *chip,
469 enum src_current_status status)
470 {
471 int ret = 0;
472
473 chip->src_current_status = status;
474 switch (status) {
475 case SRC_CURRENT_DEFAULT:
476 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
477 FUSB_REG_CONTROL0_HOST_CUR_MASK,
478 FUSB_REG_CONTROL0_HOST_CUR_DEF);
479 break;
480 case SRC_CURRENT_MEDIUM:
481 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
482 FUSB_REG_CONTROL0_HOST_CUR_MASK,
483 FUSB_REG_CONTROL0_HOST_CUR_MED);
484 break;
485 case SRC_CURRENT_HIGH:
486 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
487 FUSB_REG_CONTROL0_HOST_CUR_MASK,
488 FUSB_REG_CONTROL0_HOST_CUR_HIGH);
489 break;
490 default:
491 break;
492 }
493
494 return ret;
495 }
496
fusb302_set_toggling(struct fusb302_chip * chip,enum toggling_mode mode)497 static int fusb302_set_toggling(struct fusb302_chip *chip,
498 enum toggling_mode mode)
499 {
500 int ret = 0;
501
502 /* first disable toggling */
503 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL2,
504 FUSB_REG_CONTROL2_TOGGLE);
505 if (ret < 0)
506 return ret;
507 /* mask interrupts for SRC or SNK */
508 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASK,
509 FUSB_REG_MASK_BC_LVL |
510 FUSB_REG_MASK_COMP_CHNG);
511 if (ret < 0)
512 return ret;
513 chip->intr_bc_lvl = false;
514 chip->intr_comp_chng = false;
515 /* configure toggling mode: none/snk/src/drp */
516 switch (mode) {
517 case TOGGLING_MODE_OFF:
518 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
519 FUSB_REG_CONTROL2_MODE_MASK,
520 FUSB_REG_CONTROL2_MODE_NONE);
521 if (ret < 0)
522 return ret;
523 break;
524 case TOGGLING_MODE_SNK:
525 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
526 FUSB_REG_CONTROL2_MODE_MASK,
527 FUSB_REG_CONTROL2_MODE_UFP);
528 if (ret < 0)
529 return ret;
530 break;
531 case TOGGLING_MODE_SRC:
532 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
533 FUSB_REG_CONTROL2_MODE_MASK,
534 FUSB_REG_CONTROL2_MODE_DFP);
535 if (ret < 0)
536 return ret;
537 break;
538 case TOGGLING_MODE_DRP:
539 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
540 FUSB_REG_CONTROL2_MODE_MASK,
541 FUSB_REG_CONTROL2_MODE_DRP);
542 if (ret < 0)
543 return ret;
544 break;
545 default:
546 break;
547 }
548
549 if (mode == TOGGLING_MODE_OFF) {
550 /* mask TOGDONE interrupt */
551 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASKA,
552 FUSB_REG_MASKA_TOGDONE);
553 if (ret < 0)
554 return ret;
555 chip->intr_togdone = false;
556 } else {
557 /* Datasheet says vconn MUST be off when toggling */
558 WARN(chip->vconn_on, "Vconn is on during toggle start");
559 /* unmask TOGDONE interrupt */
560 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA,
561 FUSB_REG_MASKA_TOGDONE);
562 if (ret < 0)
563 return ret;
564 chip->intr_togdone = true;
565 /* start toggling */
566 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL2,
567 FUSB_REG_CONTROL2_TOGGLE);
568 if (ret < 0)
569 return ret;
570 /* during toggling, consider cc as Open */
571 chip->cc1 = TYPEC_CC_OPEN;
572 chip->cc2 = TYPEC_CC_OPEN;
573 }
574 chip->toggling_mode = mode;
575
576 return ret;
577 }
578
579 static const char * const typec_cc_status_name[] = {
580 [TYPEC_CC_OPEN] = "Open",
581 [TYPEC_CC_RA] = "Ra",
582 [TYPEC_CC_RD] = "Rd",
583 [TYPEC_CC_RP_DEF] = "Rp-def",
584 [TYPEC_CC_RP_1_5] = "Rp-1.5",
585 [TYPEC_CC_RP_3_0] = "Rp-3.0",
586 };
587
588 static const enum src_current_status cc_src_current[] = {
589 [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT,
590 [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT,
591 [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT,
592 [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT,
593 [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM,
594 [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH,
595 };
596
tcpm_set_cc(struct tcpc_dev * dev,enum typec_cc_status cc)597 static int tcpm_set_cc(struct tcpc_dev *dev, enum typec_cc_status cc)
598 {
599 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
600 tcpc_dev);
601 u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
602 FUSB_REG_SWITCHES0_CC2_PU_EN |
603 FUSB_REG_SWITCHES0_CC1_PD_EN |
604 FUSB_REG_SWITCHES0_CC2_PD_EN;
605 u8 rd_mda, switches0_data = 0x00;
606 int ret = 0;
607
608 mutex_lock(&chip->lock);
609 switch (cc) {
610 case TYPEC_CC_OPEN:
611 break;
612 case TYPEC_CC_RD:
613 switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
614 FUSB_REG_SWITCHES0_CC2_PD_EN;
615 break;
616 case TYPEC_CC_RP_DEF:
617 case TYPEC_CC_RP_1_5:
618 case TYPEC_CC_RP_3_0:
619 switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
620 FUSB_REG_SWITCHES0_CC1_PU_EN :
621 FUSB_REG_SWITCHES0_CC2_PU_EN;
622 break;
623 default:
624 fusb302_log(chip, "unsupported cc value %s",
625 typec_cc_status_name[cc]);
626 ret = -EINVAL;
627 goto done;
628 }
629
630 fusb302_log(chip, "cc := %s", typec_cc_status_name[cc]);
631
632 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
633 if (ret < 0) {
634 fusb302_log(chip, "cannot set toggling mode, ret=%d", ret);
635 goto done;
636 }
637
638 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
639 switches0_mask, switches0_data);
640 if (ret < 0) {
641 fusb302_log(chip, "cannot set pull-up/-down, ret = %d", ret);
642 goto done;
643 }
644 /* reset the cc status */
645 chip->cc1 = TYPEC_CC_OPEN;
646 chip->cc2 = TYPEC_CC_OPEN;
647
648 /* adjust current for SRC */
649 ret = fusb302_set_src_current(chip, cc_src_current[cc]);
650 if (ret < 0) {
651 fusb302_log(chip, "cannot set src current %s, ret=%d",
652 typec_cc_status_name[cc], ret);
653 goto done;
654 }
655
656 /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */
657 switch (cc) {
658 case TYPEC_CC_RP_DEF:
659 case TYPEC_CC_RP_1_5:
660 case TYPEC_CC_RP_3_0:
661 rd_mda = rd_mda_value[cc_src_current[cc]];
662 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
663 if (ret < 0) {
664 fusb302_log(chip,
665 "cannot set SRC measure value, ret=%d",
666 ret);
667 goto done;
668 }
669 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
670 FUSB_REG_MASK_BC_LVL |
671 FUSB_REG_MASK_COMP_CHNG,
672 FUSB_REG_MASK_COMP_CHNG);
673 if (ret < 0) {
674 fusb302_log(chip, "cannot set SRC interrupt, ret=%d",
675 ret);
676 goto done;
677 }
678 chip->intr_comp_chng = true;
679 break;
680 case TYPEC_CC_RD:
681 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
682 FUSB_REG_MASK_BC_LVL |
683 FUSB_REG_MASK_COMP_CHNG,
684 FUSB_REG_MASK_BC_LVL);
685 if (ret < 0) {
686 fusb302_log(chip, "cannot set SRC interrupt, ret=%d",
687 ret);
688 goto done;
689 }
690 chip->intr_bc_lvl = true;
691 break;
692 default:
693 break;
694 }
695 done:
696 mutex_unlock(&chip->lock);
697
698 return ret;
699 }
700
tcpm_get_cc(struct tcpc_dev * dev,enum typec_cc_status * cc1,enum typec_cc_status * cc2)701 static int tcpm_get_cc(struct tcpc_dev *dev, enum typec_cc_status *cc1,
702 enum typec_cc_status *cc2)
703 {
704 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
705 tcpc_dev);
706
707 mutex_lock(&chip->lock);
708 *cc1 = chip->cc1;
709 *cc2 = chip->cc2;
710 fusb302_log(chip, "cc1=%s, cc2=%s", typec_cc_status_name[*cc1],
711 typec_cc_status_name[*cc2]);
712 mutex_unlock(&chip->lock);
713
714 return 0;
715 }
716
tcpm_set_polarity(struct tcpc_dev * dev,enum typec_cc_polarity polarity)717 static int tcpm_set_polarity(struct tcpc_dev *dev,
718 enum typec_cc_polarity polarity)
719 {
720 return 0;
721 }
722
tcpm_set_vconn(struct tcpc_dev * dev,bool on)723 static int tcpm_set_vconn(struct tcpc_dev *dev, bool on)
724 {
725 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
726 tcpc_dev);
727 int ret = 0;
728 u8 switches0_data = 0x00;
729 u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 |
730 FUSB_REG_SWITCHES0_VCONN_CC2;
731
732 mutex_lock(&chip->lock);
733 if (chip->vconn_on == on) {
734 fusb302_log(chip, "vconn is already %s", on ? "On" : "Off");
735 goto done;
736 }
737 if (on) {
738 switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
739 FUSB_REG_SWITCHES0_VCONN_CC2 :
740 FUSB_REG_SWITCHES0_VCONN_CC1;
741 }
742 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
743 switches0_mask, switches0_data);
744 if (ret < 0)
745 goto done;
746 chip->vconn_on = on;
747 fusb302_log(chip, "vconn := %s", on ? "On" : "Off");
748 done:
749 mutex_unlock(&chip->lock);
750
751 return ret;
752 }
753
tcpm_set_vbus(struct tcpc_dev * dev,bool on,bool charge)754 static int tcpm_set_vbus(struct tcpc_dev *dev, bool on, bool charge)
755 {
756 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
757 tcpc_dev);
758 int ret = 0;
759
760 mutex_lock(&chip->lock);
761 if (chip->vbus_on == on) {
762 fusb302_log(chip, "vbus is already %s", on ? "On" : "Off");
763 } else {
764 if (on)
765 ret = regulator_enable(chip->vbus);
766 else
767 ret = regulator_disable(chip->vbus);
768 if (ret < 0) {
769 fusb302_log(chip, "cannot %s vbus regulator, ret=%d",
770 on ? "enable" : "disable", ret);
771 goto done;
772 }
773 chip->vbus_on = on;
774 fusb302_log(chip, "vbus := %s", on ? "On" : "Off");
775 }
776 if (chip->charge_on == charge)
777 fusb302_log(chip, "charge is already %s",
778 charge ? "On" : "Off");
779 else
780 chip->charge_on = charge;
781
782 done:
783 mutex_unlock(&chip->lock);
784
785 return ret;
786 }
787
fusb302_pd_tx_flush(struct fusb302_chip * chip)788 static int fusb302_pd_tx_flush(struct fusb302_chip *chip)
789 {
790 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0,
791 FUSB_REG_CONTROL0_TX_FLUSH);
792 }
793
fusb302_pd_rx_flush(struct fusb302_chip * chip)794 static int fusb302_pd_rx_flush(struct fusb302_chip *chip)
795 {
796 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL1,
797 FUSB_REG_CONTROL1_RX_FLUSH);
798 }
799
fusb302_pd_set_auto_goodcrc(struct fusb302_chip * chip,bool on)800 static int fusb302_pd_set_auto_goodcrc(struct fusb302_chip *chip, bool on)
801 {
802 if (on)
803 return fusb302_i2c_set_bits(chip, FUSB_REG_SWITCHES1,
804 FUSB_REG_SWITCHES1_AUTO_GCRC);
805 return fusb302_i2c_clear_bits(chip, FUSB_REG_SWITCHES1,
806 FUSB_REG_SWITCHES1_AUTO_GCRC);
807 }
808
fusb302_pd_set_interrupts(struct fusb302_chip * chip,bool on)809 static int fusb302_pd_set_interrupts(struct fusb302_chip *chip, bool on)
810 {
811 int ret = 0;
812 u8 mask_interrupts = FUSB_REG_MASK_COLLISION;
813 u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL |
814 FUSB_REG_MASKA_HARDSENT |
815 FUSB_REG_MASKA_TX_SUCCESS |
816 FUSB_REG_MASKA_HARDRESET;
817 u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT;
818
819 ret = on ?
820 fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, mask_interrupts) :
821 fusb302_i2c_set_bits(chip, FUSB_REG_MASK, mask_interrupts);
822 if (ret < 0)
823 return ret;
824 ret = on ?
825 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, maska_interrupts) :
826 fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, maska_interrupts);
827 if (ret < 0)
828 return ret;
829 ret = on ?
830 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKB, maskb_interrupts) :
831 fusb302_i2c_set_bits(chip, FUSB_REG_MASKB, maskb_interrupts);
832 return ret;
833 }
834
tcpm_set_pd_rx(struct tcpc_dev * dev,bool on)835 static int tcpm_set_pd_rx(struct tcpc_dev *dev, bool on)
836 {
837 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
838 tcpc_dev);
839 int ret = 0;
840
841 mutex_lock(&chip->lock);
842 ret = fusb302_pd_rx_flush(chip);
843 if (ret < 0) {
844 fusb302_log(chip, "cannot flush pd rx buffer, ret=%d", ret);
845 goto done;
846 }
847 ret = fusb302_pd_tx_flush(chip);
848 if (ret < 0) {
849 fusb302_log(chip, "cannot flush pd tx buffer, ret=%d", ret);
850 goto done;
851 }
852 ret = fusb302_pd_set_auto_goodcrc(chip, on);
853 if (ret < 0) {
854 fusb302_log(chip, "cannot turn %s auto GCRC, ret=%d",
855 on ? "on" : "off", ret);
856 goto done;
857 }
858 ret = fusb302_pd_set_interrupts(chip, on);
859 if (ret < 0) {
860 fusb302_log(chip, "cannot turn %s pd interrupts, ret=%d",
861 on ? "on" : "off", ret);
862 goto done;
863 }
864 fusb302_log(chip, "pd := %s", on ? "on" : "off");
865 done:
866 mutex_unlock(&chip->lock);
867
868 return ret;
869 }
870
871 static const char * const typec_role_name[] = {
872 [TYPEC_SINK] = "Sink",
873 [TYPEC_SOURCE] = "Source",
874 };
875
876 static const char * const typec_data_role_name[] = {
877 [TYPEC_DEVICE] = "Device",
878 [TYPEC_HOST] = "Host",
879 };
880
tcpm_set_roles(struct tcpc_dev * dev,bool attached,enum typec_role pwr,enum typec_data_role data)881 static int tcpm_set_roles(struct tcpc_dev *dev, bool attached,
882 enum typec_role pwr, enum typec_data_role data)
883 {
884 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
885 tcpc_dev);
886 int ret = 0;
887 u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE |
888 FUSB_REG_SWITCHES1_DATAROLE;
889 u8 switches1_data = 0x00;
890
891 mutex_lock(&chip->lock);
892 if (pwr == TYPEC_SOURCE)
893 switches1_data |= FUSB_REG_SWITCHES1_POWERROLE;
894 if (data == TYPEC_HOST)
895 switches1_data |= FUSB_REG_SWITCHES1_DATAROLE;
896 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
897 switches1_mask, switches1_data);
898 if (ret < 0) {
899 fusb302_log(chip, "unable to set pd header %s, %s, ret=%d",
900 typec_role_name[pwr], typec_data_role_name[data],
901 ret);
902 goto done;
903 }
904 fusb302_log(chip, "pd header := %s, %s", typec_role_name[pwr],
905 typec_data_role_name[data]);
906 done:
907 mutex_unlock(&chip->lock);
908
909 return ret;
910 }
911
tcpm_start_toggling(struct tcpc_dev * dev,enum typec_port_type port_type,enum typec_cc_status cc)912 static int tcpm_start_toggling(struct tcpc_dev *dev,
913 enum typec_port_type port_type,
914 enum typec_cc_status cc)
915 {
916 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
917 tcpc_dev);
918 enum toggling_mode mode = TOGGLING_MODE_OFF;
919 int ret = 0;
920
921 switch (port_type) {
922 case TYPEC_PORT_SRC:
923 mode = TOGGLING_MODE_SRC;
924 break;
925 case TYPEC_PORT_SNK:
926 mode = TOGGLING_MODE_SNK;
927 break;
928 case TYPEC_PORT_DRP:
929 mode = TOGGLING_MODE_DRP;
930 break;
931 }
932
933 mutex_lock(&chip->lock);
934 ret = fusb302_set_src_current(chip, cc_src_current[cc]);
935 if (ret < 0) {
936 fusb302_log(chip, "unable to set src current %s, ret=%d",
937 typec_cc_status_name[cc], ret);
938 goto done;
939 }
940 ret = fusb302_set_toggling(chip, mode);
941 if (ret < 0) {
942 fusb302_log(chip,
943 "unable to start drp toggling, ret=%d", ret);
944 goto done;
945 }
946 fusb302_log(chip, "start drp toggling");
947 done:
948 mutex_unlock(&chip->lock);
949
950 return ret;
951 }
952
fusb302_pd_send_message(struct fusb302_chip * chip,const struct pd_message * msg)953 static int fusb302_pd_send_message(struct fusb302_chip *chip,
954 const struct pd_message *msg)
955 {
956 int ret = 0;
957 u8 buf[40];
958 u8 pos = 0;
959 int len;
960
961 /* SOP tokens */
962 buf[pos++] = FUSB302_TKN_SYNC1;
963 buf[pos++] = FUSB302_TKN_SYNC1;
964 buf[pos++] = FUSB302_TKN_SYNC1;
965 buf[pos++] = FUSB302_TKN_SYNC2;
966
967 len = pd_header_cnt_le(msg->header) * 4;
968 /* plug 2 for header */
969 len += 2;
970 if (len > 0x1F) {
971 fusb302_log(chip,
972 "PD message too long %d (incl. header)", len);
973 return -EINVAL;
974 }
975 /* packsym tells the FUSB302 chip that the next X bytes are payload */
976 buf[pos++] = FUSB302_TKN_PACKSYM | (len & 0x1F);
977 memcpy(&buf[pos], &msg->header, sizeof(msg->header));
978 pos += sizeof(msg->header);
979
980 len -= 2;
981 memcpy(&buf[pos], msg->payload, len);
982 pos += len;
983
984 /* CRC */
985 buf[pos++] = FUSB302_TKN_JAMCRC;
986 /* EOP */
987 buf[pos++] = FUSB302_TKN_EOP;
988 /* turn tx off after sending message */
989 buf[pos++] = FUSB302_TKN_TXOFF;
990 /* start transmission */
991 buf[pos++] = FUSB302_TKN_TXON;
992
993 ret = fusb302_i2c_block_write(chip, FUSB_REG_FIFOS, pos, buf);
994 if (ret < 0)
995 return ret;
996 fusb302_log(chip, "sending PD message header: %x", msg->header);
997 fusb302_log(chip, "sending PD message len: %d", len);
998
999 return ret;
1000 }
1001
fusb302_pd_send_hardreset(struct fusb302_chip * chip)1002 static int fusb302_pd_send_hardreset(struct fusb302_chip *chip)
1003 {
1004 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
1005 FUSB_REG_CONTROL3_SEND_HARDRESET);
1006 }
1007
1008 static const char * const transmit_type_name[] = {
1009 [TCPC_TX_SOP] = "SOP",
1010 [TCPC_TX_SOP_PRIME] = "SOP'",
1011 [TCPC_TX_SOP_PRIME_PRIME] = "SOP''",
1012 [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'",
1013 [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''",
1014 [TCPC_TX_HARD_RESET] = "HARD_RESET",
1015 [TCPC_TX_CABLE_RESET] = "CABLE_RESET",
1016 [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2",
1017 };
1018
tcpm_pd_transmit(struct tcpc_dev * dev,enum tcpm_transmit_type type,const struct pd_message * msg)1019 static int tcpm_pd_transmit(struct tcpc_dev *dev, enum tcpm_transmit_type type,
1020 const struct pd_message *msg)
1021 {
1022 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
1023 tcpc_dev);
1024 int ret = 0;
1025
1026 mutex_lock(&chip->lock);
1027 switch (type) {
1028 case TCPC_TX_SOP:
1029 ret = fusb302_pd_send_message(chip, msg);
1030 if (ret < 0)
1031 fusb302_log(chip,
1032 "cannot send PD message, ret=%d", ret);
1033 break;
1034 case TCPC_TX_HARD_RESET:
1035 ret = fusb302_pd_send_hardreset(chip);
1036 if (ret < 0)
1037 fusb302_log(chip,
1038 "cannot send hardreset, ret=%d", ret);
1039 break;
1040 default:
1041 fusb302_log(chip, "type %s not supported",
1042 transmit_type_name[type]);
1043 ret = -EINVAL;
1044 }
1045 mutex_unlock(&chip->lock);
1046
1047 return ret;
1048 }
1049
fusb302_bc_lvl_to_cc(u8 bc_lvl)1050 static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl)
1051 {
1052 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX)
1053 return TYPEC_CC_RP_3_0;
1054 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230)
1055 return TYPEC_CC_RP_1_5;
1056 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600)
1057 return TYPEC_CC_RP_DEF;
1058 return TYPEC_CC_OPEN;
1059 }
1060
fusb302_bc_lvl_handler_work(struct work_struct * work)1061 static void fusb302_bc_lvl_handler_work(struct work_struct *work)
1062 {
1063 struct fusb302_chip *chip = container_of(work, struct fusb302_chip,
1064 bc_lvl_handler.work);
1065 int ret = 0;
1066 u8 status0;
1067 u8 bc_lvl;
1068 enum typec_cc_status cc_status;
1069
1070 mutex_lock(&chip->lock);
1071 if (!chip->intr_bc_lvl) {
1072 fusb302_log(chip, "BC_LVL interrupt is turned off, abort");
1073 goto done;
1074 }
1075 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1076 if (ret < 0)
1077 goto done;
1078 fusb302_log(chip, "BC_LVL handler, status0=0x%02x", status0);
1079 if (status0 & FUSB_REG_STATUS0_ACTIVITY) {
1080 fusb302_log(chip, "CC activities detected, delay handling");
1081 mod_delayed_work(chip->wq, &chip->bc_lvl_handler,
1082 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS));
1083 goto done;
1084 }
1085 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1086 cc_status = fusb302_bc_lvl_to_cc(bc_lvl);
1087 if (chip->cc_polarity == TYPEC_POLARITY_CC1) {
1088 if (chip->cc1 != cc_status) {
1089 fusb302_log(chip, "cc1: %s -> %s",
1090 typec_cc_status_name[chip->cc1],
1091 typec_cc_status_name[cc_status]);
1092 chip->cc1 = cc_status;
1093 tcpm_cc_change(chip->tcpm_port);
1094 }
1095 } else {
1096 if (chip->cc2 != cc_status) {
1097 fusb302_log(chip, "cc2: %s -> %s",
1098 typec_cc_status_name[chip->cc2],
1099 typec_cc_status_name[cc_status]);
1100 chip->cc2 = cc_status;
1101 tcpm_cc_change(chip->tcpm_port);
1102 }
1103 }
1104
1105 done:
1106 mutex_unlock(&chip->lock);
1107 }
1108
init_tcpc_dev(struct tcpc_dev * fusb302_tcpc_dev)1109 static void init_tcpc_dev(struct tcpc_dev *fusb302_tcpc_dev)
1110 {
1111 fusb302_tcpc_dev->init = tcpm_init;
1112 fusb302_tcpc_dev->get_vbus = tcpm_get_vbus;
1113 fusb302_tcpc_dev->get_current_limit = tcpm_get_current_limit;
1114 fusb302_tcpc_dev->set_cc = tcpm_set_cc;
1115 fusb302_tcpc_dev->get_cc = tcpm_get_cc;
1116 fusb302_tcpc_dev->set_polarity = tcpm_set_polarity;
1117 fusb302_tcpc_dev->set_vconn = tcpm_set_vconn;
1118 fusb302_tcpc_dev->set_vbus = tcpm_set_vbus;
1119 fusb302_tcpc_dev->set_pd_rx = tcpm_set_pd_rx;
1120 fusb302_tcpc_dev->set_roles = tcpm_set_roles;
1121 fusb302_tcpc_dev->start_toggling = tcpm_start_toggling;
1122 fusb302_tcpc_dev->pd_transmit = tcpm_pd_transmit;
1123 }
1124
1125 static const char * const cc_polarity_name[] = {
1126 [TYPEC_POLARITY_CC1] = "Polarity_CC1",
1127 [TYPEC_POLARITY_CC2] = "Polarity_CC2",
1128 };
1129
fusb302_set_cc_polarity_and_pull(struct fusb302_chip * chip,enum typec_cc_polarity cc_polarity,bool pull_up,bool pull_down)1130 static int fusb302_set_cc_polarity_and_pull(struct fusb302_chip *chip,
1131 enum typec_cc_polarity cc_polarity,
1132 bool pull_up, bool pull_down)
1133 {
1134 int ret = 0;
1135 u8 switches0_data = 0x00;
1136 u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN |
1137 FUSB_REG_SWITCHES1_TXCC2_EN;
1138 u8 switches1_data = 0x00;
1139
1140 if (pull_down)
1141 switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
1142 FUSB_REG_SWITCHES0_CC2_PD_EN;
1143
1144 if (cc_polarity == TYPEC_POLARITY_CC1) {
1145 switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1;
1146 if (chip->vconn_on)
1147 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2;
1148 if (pull_up)
1149 switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN;
1150 switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN;
1151 } else {
1152 switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2;
1153 if (chip->vconn_on)
1154 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1;
1155 if (pull_up)
1156 switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN;
1157 switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN;
1158 }
1159 ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data);
1160 if (ret < 0)
1161 return ret;
1162 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
1163 switches1_mask, switches1_data);
1164 if (ret < 0)
1165 return ret;
1166 chip->cc_polarity = cc_polarity;
1167
1168 return ret;
1169 }
1170
fusb302_handle_togdone_snk(struct fusb302_chip * chip,u8 togdone_result)1171 static int fusb302_handle_togdone_snk(struct fusb302_chip *chip,
1172 u8 togdone_result)
1173 {
1174 int ret = 0;
1175 u8 status0;
1176 u8 bc_lvl;
1177 enum typec_cc_polarity cc_polarity;
1178 enum typec_cc_status cc_status_active, cc1, cc2;
1179
1180 /* set polarity and pull_up, pull_down */
1181 cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
1182 TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
1183 ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, false, true);
1184 if (ret < 0) {
1185 fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
1186 cc_polarity_name[cc_polarity], ret);
1187 return ret;
1188 }
1189 /* fusb302_set_cc_polarity() has set the correct measure block */
1190 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1191 if (ret < 0)
1192 return ret;
1193 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1194 cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl);
1195 /* restart toggling if the cc status on the active line is OPEN */
1196 if (cc_status_active == TYPEC_CC_OPEN) {
1197 fusb302_log(chip, "restart toggling as CC_OPEN detected");
1198 ret = fusb302_set_toggling(chip, chip->toggling_mode);
1199 return ret;
1200 }
1201 /* update tcpm with the new cc value */
1202 cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
1203 cc_status_active : TYPEC_CC_OPEN;
1204 cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
1205 cc_status_active : TYPEC_CC_OPEN;
1206 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1207 chip->cc1 = cc1;
1208 chip->cc2 = cc2;
1209 tcpm_cc_change(chip->tcpm_port);
1210 }
1211 /* turn off toggling */
1212 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
1213 if (ret < 0) {
1214 fusb302_log(chip,
1215 "cannot set toggling mode off, ret=%d", ret);
1216 return ret;
1217 }
1218 /* unmask bc_lvl interrupt */
1219 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL);
1220 if (ret < 0) {
1221 fusb302_log(chip,
1222 "cannot unmask bc_lcl interrupt, ret=%d", ret);
1223 return ret;
1224 }
1225 chip->intr_bc_lvl = true;
1226 fusb302_log(chip, "detected cc1=%s, cc2=%s",
1227 typec_cc_status_name[cc1],
1228 typec_cc_status_name[cc2]);
1229
1230 return ret;
1231 }
1232
1233 /* On error returns < 0, otherwise a typec_cc_status value */
fusb302_get_src_cc_status(struct fusb302_chip * chip,enum typec_cc_polarity cc_polarity,enum typec_cc_status * cc)1234 static int fusb302_get_src_cc_status(struct fusb302_chip *chip,
1235 enum typec_cc_polarity cc_polarity,
1236 enum typec_cc_status *cc)
1237 {
1238 u8 ra_mda = ra_mda_value[chip->src_current_status];
1239 u8 rd_mda = rd_mda_value[chip->src_current_status];
1240 u8 switches0_data, status0;
1241 int ret;
1242
1243 /* Step 1: Set switches so that we measure the right CC pin */
1244 switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ?
1245 FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 :
1246 FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2;
1247 ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data);
1248 if (ret < 0)
1249 return ret;
1250
1251 fusb302_i2c_read(chip, FUSB_REG_SWITCHES0, &status0);
1252 fusb302_log(chip, "get_src_cc_status switches: 0x%0x", status0);
1253
1254 /* Step 2: Set compararator volt to differentiate between Open and Rd */
1255 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1256 if (ret < 0)
1257 return ret;
1258
1259 usleep_range(50, 100);
1260 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1261 if (ret < 0)
1262 return ret;
1263
1264 fusb302_log(chip, "get_src_cc_status rd_mda status0: 0x%0x", status0);
1265 if (status0 & FUSB_REG_STATUS0_COMP) {
1266 *cc = TYPEC_CC_OPEN;
1267 return 0;
1268 }
1269
1270 /* Step 3: Set compararator input to differentiate between Rd and Ra. */
1271 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, ra_mda);
1272 if (ret < 0)
1273 return ret;
1274
1275 usleep_range(50, 100);
1276 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1277 if (ret < 0)
1278 return ret;
1279
1280 fusb302_log(chip, "get_src_cc_status ra_mda status0: 0x%0x", status0);
1281 if (status0 & FUSB_REG_STATUS0_COMP)
1282 *cc = TYPEC_CC_RD;
1283 else
1284 *cc = TYPEC_CC_RA;
1285
1286 return 0;
1287 }
1288
fusb302_handle_togdone_src(struct fusb302_chip * chip,u8 togdone_result)1289 static int fusb302_handle_togdone_src(struct fusb302_chip *chip,
1290 u8 togdone_result)
1291 {
1292 /*
1293 * - set polarity (measure cc, vconn, tx)
1294 * - set pull_up, pull_down
1295 * - set cc1, cc2, and update to tcpm_port
1296 * - set I_COMP interrupt on
1297 */
1298 int ret = 0;
1299 u8 rd_mda = rd_mda_value[chip->src_current_status];
1300 enum toggling_mode toggling_mode = chip->toggling_mode;
1301 enum typec_cc_polarity cc_polarity;
1302 enum typec_cc_status cc1, cc2;
1303
1304 /*
1305 * The toggle-engine will stop in a src state if it sees either Ra or
1306 * Rd. Determine the status for both CC pins, starting with the one
1307 * where toggling stopped, as that is where the switches point now.
1308 */
1309 if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
1310 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1);
1311 else
1312 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2);
1313 if (ret < 0)
1314 return ret;
1315 /* we must turn off toggling before we can measure the other pin */
1316 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
1317 if (ret < 0) {
1318 fusb302_log(chip, "cannot set toggling mode off, ret=%d", ret);
1319 return ret;
1320 }
1321 /* get the status of the other pin */
1322 if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
1323 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2);
1324 else
1325 ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1);
1326 if (ret < 0)
1327 return ret;
1328
1329 /* determine polarity based on the status of both pins */
1330 if (cc1 == TYPEC_CC_RD &&
1331 (cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) {
1332 cc_polarity = TYPEC_POLARITY_CC1;
1333 } else if (cc2 == TYPEC_CC_RD &&
1334 (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) {
1335 cc_polarity = TYPEC_POLARITY_CC2;
1336 } else {
1337 fusb302_log(chip, "unexpected CC status cc1=%s, cc2=%s, restarting toggling",
1338 typec_cc_status_name[cc1],
1339 typec_cc_status_name[cc2]);
1340 return fusb302_set_toggling(chip, toggling_mode);
1341 }
1342 /* set polarity and pull_up, pull_down */
1343 ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, true, false);
1344 if (ret < 0) {
1345 fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
1346 cc_polarity_name[cc_polarity], ret);
1347 return ret;
1348 }
1349 /* update tcpm with the new cc value */
1350 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1351 chip->cc1 = cc1;
1352 chip->cc2 = cc2;
1353 tcpm_cc_change(chip->tcpm_port);
1354 }
1355 /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */
1356 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1357 if (ret < 0)
1358 return ret;
1359 /* unmask comp_chng interrupt */
1360 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK,
1361 FUSB_REG_MASK_COMP_CHNG);
1362 if (ret < 0) {
1363 fusb302_log(chip,
1364 "cannot unmask comp_chng interrupt, ret=%d", ret);
1365 return ret;
1366 }
1367 chip->intr_comp_chng = true;
1368 fusb302_log(chip, "detected cc1=%s, cc2=%s",
1369 typec_cc_status_name[cc1],
1370 typec_cc_status_name[cc2]);
1371
1372 return ret;
1373 }
1374
fusb302_handle_togdone(struct fusb302_chip * chip)1375 static int fusb302_handle_togdone(struct fusb302_chip *chip)
1376 {
1377 int ret = 0;
1378 u8 status1a;
1379 u8 togdone_result;
1380
1381 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS1A, &status1a);
1382 if (ret < 0)
1383 return ret;
1384 togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) &
1385 FUSB_REG_STATUS1A_TOGSS_MASK;
1386 switch (togdone_result) {
1387 case FUSB_REG_STATUS1A_TOGSS_SNK1:
1388 case FUSB_REG_STATUS1A_TOGSS_SNK2:
1389 return fusb302_handle_togdone_snk(chip, togdone_result);
1390 case FUSB_REG_STATUS1A_TOGSS_SRC1:
1391 case FUSB_REG_STATUS1A_TOGSS_SRC2:
1392 return fusb302_handle_togdone_src(chip, togdone_result);
1393 case FUSB_REG_STATUS1A_TOGSS_AA:
1394 /* doesn't support */
1395 fusb302_log(chip, "AudioAccessory not supported");
1396 fusb302_set_toggling(chip, chip->toggling_mode);
1397 break;
1398 default:
1399 fusb302_log(chip, "TOGDONE with an invalid state: %d",
1400 togdone_result);
1401 fusb302_set_toggling(chip, chip->toggling_mode);
1402 break;
1403 }
1404 return ret;
1405 }
1406
fusb302_pd_reset(struct fusb302_chip * chip)1407 static int fusb302_pd_reset(struct fusb302_chip *chip)
1408 {
1409 return fusb302_i2c_set_bits(chip, FUSB_REG_RESET,
1410 FUSB_REG_RESET_PD_RESET);
1411 }
1412
fusb302_pd_read_message(struct fusb302_chip * chip,struct pd_message * msg)1413 static int fusb302_pd_read_message(struct fusb302_chip *chip,
1414 struct pd_message *msg)
1415 {
1416 int ret = 0;
1417 u8 token;
1418 u8 crc[4];
1419 int len;
1420
1421 /* first SOP token */
1422 ret = fusb302_i2c_read(chip, FUSB_REG_FIFOS, &token);
1423 if (ret < 0)
1424 return ret;
1425 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 2,
1426 (u8 *)&msg->header);
1427 if (ret < 0)
1428 return ret;
1429 len = pd_header_cnt_le(msg->header) * 4;
1430 /* add 4 to length to include the CRC */
1431 if (len > PD_MAX_PAYLOAD * 4) {
1432 fusb302_log(chip, "PD message too long %d", len);
1433 return -EINVAL;
1434 }
1435 if (len > 0) {
1436 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, len,
1437 (u8 *)msg->payload);
1438 if (ret < 0)
1439 return ret;
1440 }
1441 /* another 4 bytes to read CRC out */
1442 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 4, crc);
1443 if (ret < 0)
1444 return ret;
1445 fusb302_log(chip, "PD message header: %x", msg->header);
1446 fusb302_log(chip, "PD message len: %d", len);
1447
1448 /*
1449 * Check if we've read off a GoodCRC message. If so then indicate to
1450 * TCPM that the previous transmission has completed. Otherwise we pass
1451 * the received message over to TCPM for processing.
1452 *
1453 * We make this check here instead of basing the reporting decision on
1454 * the IRQ event type, as it's possible for the chip to report the
1455 * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need
1456 * to check the message type to ensure correct reporting to TCPM.
1457 */
1458 if ((!len) && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC))
1459 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1460 else
1461 tcpm_pd_receive(chip->tcpm_port, msg);
1462
1463 return ret;
1464 }
1465
fusb302_irq_intn(int irq,void * dev_id)1466 static irqreturn_t fusb302_irq_intn(int irq, void *dev_id)
1467 {
1468 struct fusb302_chip *chip = dev_id;
1469 unsigned long flags;
1470
1471 /* Disable our level triggered IRQ until our irq_work has cleared it */
1472 disable_irq_nosync(chip->gpio_int_n_irq);
1473
1474 spin_lock_irqsave(&chip->irq_lock, flags);
1475 if (chip->irq_suspended)
1476 chip->irq_while_suspended = true;
1477 else
1478 schedule_work(&chip->irq_work);
1479 spin_unlock_irqrestore(&chip->irq_lock, flags);
1480
1481 return IRQ_HANDLED;
1482 }
1483
fusb302_irq_work(struct work_struct * work)1484 static void fusb302_irq_work(struct work_struct *work)
1485 {
1486 struct fusb302_chip *chip = container_of(work, struct fusb302_chip,
1487 irq_work);
1488 int ret = 0;
1489 u8 interrupt;
1490 u8 interrupta;
1491 u8 interruptb;
1492 u8 status0;
1493 bool vbus_present;
1494 bool comp_result;
1495 bool intr_togdone;
1496 bool intr_bc_lvl;
1497 bool intr_comp_chng;
1498 struct pd_message pd_msg;
1499
1500 mutex_lock(&chip->lock);
1501 /* grab a snapshot of intr flags */
1502 intr_togdone = chip->intr_togdone;
1503 intr_bc_lvl = chip->intr_bc_lvl;
1504 intr_comp_chng = chip->intr_comp_chng;
1505
1506 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPT, &interrupt);
1507 if (ret < 0)
1508 goto done;
1509 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTA, &interrupta);
1510 if (ret < 0)
1511 goto done;
1512 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTB, &interruptb);
1513 if (ret < 0)
1514 goto done;
1515 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1516 if (ret < 0)
1517 goto done;
1518 fusb302_log(chip,
1519 "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x",
1520 interrupt, interrupta, interruptb, status0);
1521
1522 if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) {
1523 vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK);
1524 fusb302_log(chip, "IRQ: VBUS_OK, vbus=%s",
1525 vbus_present ? "On" : "Off");
1526 if (vbus_present != chip->vbus_present) {
1527 chip->vbus_present = vbus_present;
1528 tcpm_vbus_change(chip->tcpm_port);
1529 }
1530 }
1531
1532 if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) {
1533 fusb302_log(chip, "IRQ: TOGDONE");
1534 ret = fusb302_handle_togdone(chip);
1535 if (ret < 0) {
1536 fusb302_log(chip,
1537 "handle togdone error, ret=%d", ret);
1538 goto done;
1539 }
1540 }
1541
1542 if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) {
1543 fusb302_log(chip, "IRQ: BC_LVL, handler pending");
1544 /*
1545 * as BC_LVL interrupt can be affected by PD activity,
1546 * apply delay to for the handler to wait for the PD
1547 * signaling to finish.
1548 */
1549 mod_delayed_work(chip->wq, &chip->bc_lvl_handler,
1550 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS));
1551 }
1552
1553 if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) {
1554 comp_result = !!(status0 & FUSB_REG_STATUS0_COMP);
1555 fusb302_log(chip, "IRQ: COMP_CHNG, comp=%s",
1556 comp_result ? "true" : "false");
1557 if (comp_result) {
1558 /* cc level > Rd_threshold, detach */
1559 chip->cc1 = TYPEC_CC_OPEN;
1560 chip->cc2 = TYPEC_CC_OPEN;
1561 tcpm_cc_change(chip->tcpm_port);
1562 }
1563 }
1564
1565 if (interrupt & FUSB_REG_INTERRUPT_COLLISION) {
1566 fusb302_log(chip, "IRQ: PD collision");
1567 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1568 }
1569
1570 if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) {
1571 fusb302_log(chip, "IRQ: PD retry failed");
1572 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1573 }
1574
1575 if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) {
1576 fusb302_log(chip, "IRQ: PD hardreset sent");
1577 ret = fusb302_pd_reset(chip);
1578 if (ret < 0) {
1579 fusb302_log(chip, "cannot PD reset, ret=%d", ret);
1580 goto done;
1581 }
1582 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1583 }
1584
1585 if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) {
1586 fusb302_log(chip, "IRQ: PD tx success");
1587 ret = fusb302_pd_read_message(chip, &pd_msg);
1588 if (ret < 0) {
1589 fusb302_log(chip,
1590 "cannot read in PD message, ret=%d", ret);
1591 goto done;
1592 }
1593 }
1594
1595 if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) {
1596 fusb302_log(chip, "IRQ: PD received hardreset");
1597 ret = fusb302_pd_reset(chip);
1598 if (ret < 0) {
1599 fusb302_log(chip, "cannot PD reset, ret=%d", ret);
1600 goto done;
1601 }
1602 tcpm_pd_hard_reset(chip->tcpm_port);
1603 }
1604
1605 if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) {
1606 fusb302_log(chip, "IRQ: PD sent good CRC");
1607 ret = fusb302_pd_read_message(chip, &pd_msg);
1608 if (ret < 0) {
1609 fusb302_log(chip,
1610 "cannot read in PD message, ret=%d", ret);
1611 goto done;
1612 }
1613 }
1614 done:
1615 mutex_unlock(&chip->lock);
1616 enable_irq(chip->gpio_int_n_irq);
1617 }
1618
init_gpio(struct fusb302_chip * chip)1619 static int init_gpio(struct fusb302_chip *chip)
1620 {
1621 struct device *dev = chip->dev;
1622 int ret = 0;
1623
1624 chip->gpio_int_n = devm_gpiod_get(dev, "fcs,int_n", GPIOD_IN);
1625 if (IS_ERR(chip->gpio_int_n)) {
1626 dev_err(dev, "failed to request gpio_int_n\n");
1627 return PTR_ERR(chip->gpio_int_n);
1628 }
1629 ret = gpiod_to_irq(chip->gpio_int_n);
1630 if (ret < 0) {
1631 dev_err(dev,
1632 "cannot request IRQ for GPIO Int_N, ret=%d", ret);
1633 return ret;
1634 }
1635 chip->gpio_int_n_irq = ret;
1636 return 0;
1637 }
1638
1639 #define PDO_FIXED_FLAGS \
1640 (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)
1641
1642 static const u32 src_pdo[] = {
1643 PDO_FIXED(5000, 400, PDO_FIXED_FLAGS)
1644 };
1645
1646 static const u32 snk_pdo[] = {
1647 PDO_FIXED(5000, 400, PDO_FIXED_FLAGS)
1648 };
1649
1650 static const struct property_entry port_props[] = {
1651 PROPERTY_ENTRY_STRING("data-role", "dual"),
1652 PROPERTY_ENTRY_STRING("power-role", "dual"),
1653 PROPERTY_ENTRY_STRING("try-power-role", "sink"),
1654 PROPERTY_ENTRY_U32_ARRAY("source-pdos", src_pdo),
1655 PROPERTY_ENTRY_U32_ARRAY("sink-pdos", snk_pdo),
1656 PROPERTY_ENTRY_U32("op-sink-microwatt", 2500000),
1657 { }
1658 };
1659
fusb302_fwnode_get(struct device * dev)1660 static struct fwnode_handle *fusb302_fwnode_get(struct device *dev)
1661 {
1662 struct fwnode_handle *fwnode;
1663
1664 fwnode = device_get_named_child_node(dev, "connector");
1665 if (!fwnode)
1666 fwnode = fwnode_create_software_node(port_props, NULL);
1667
1668 return fwnode;
1669 }
1670
fusb302_probe(struct i2c_client * client,const struct i2c_device_id * id)1671 static int fusb302_probe(struct i2c_client *client,
1672 const struct i2c_device_id *id)
1673 {
1674 struct fusb302_chip *chip;
1675 struct i2c_adapter *adapter = client->adapter;
1676 struct device *dev = &client->dev;
1677 const char *name;
1678 int ret = 0;
1679
1680 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1681 dev_err(&client->dev,
1682 "I2C/SMBus block functionality not supported!\n");
1683 return -ENODEV;
1684 }
1685 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
1686 if (!chip)
1687 return -ENOMEM;
1688
1689 chip->i2c_client = client;
1690 chip->dev = &client->dev;
1691 mutex_init(&chip->lock);
1692
1693 /*
1694 * Devicetree platforms should get extcon via phandle (not yet
1695 * supported). On ACPI platforms, we get the name from a device prop.
1696 * This device prop is for kernel internal use only and is expected
1697 * to be set by the platform code which also registers the i2c client
1698 * for the fusb302.
1699 */
1700 if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) {
1701 chip->extcon = extcon_get_extcon_dev(name);
1702 if (!chip->extcon)
1703 return -EPROBE_DEFER;
1704 }
1705
1706 chip->vbus = devm_regulator_get(chip->dev, "vbus");
1707 if (IS_ERR(chip->vbus))
1708 return PTR_ERR(chip->vbus);
1709
1710 chip->wq = create_singlethread_workqueue(dev_name(chip->dev));
1711 if (!chip->wq)
1712 return -ENOMEM;
1713
1714 spin_lock_init(&chip->irq_lock);
1715 INIT_WORK(&chip->irq_work, fusb302_irq_work);
1716 INIT_DELAYED_WORK(&chip->bc_lvl_handler, fusb302_bc_lvl_handler_work);
1717 init_tcpc_dev(&chip->tcpc_dev);
1718 fusb302_debugfs_init(chip);
1719
1720 if (client->irq) {
1721 chip->gpio_int_n_irq = client->irq;
1722 } else {
1723 ret = init_gpio(chip);
1724 if (ret < 0)
1725 goto destroy_workqueue;
1726 }
1727
1728 chip->tcpc_dev.fwnode = fusb302_fwnode_get(dev);
1729 if (IS_ERR(chip->tcpc_dev.fwnode)) {
1730 ret = PTR_ERR(chip->tcpc_dev.fwnode);
1731 goto destroy_workqueue;
1732 }
1733
1734 chip->tcpm_port = tcpm_register_port(&client->dev, &chip->tcpc_dev);
1735 if (IS_ERR(chip->tcpm_port)) {
1736 fwnode_handle_put(chip->tcpc_dev.fwnode);
1737 ret = PTR_ERR(chip->tcpm_port);
1738 if (ret != -EPROBE_DEFER)
1739 dev_err(dev, "cannot register tcpm port, ret=%d", ret);
1740 goto destroy_workqueue;
1741 }
1742
1743 ret = request_irq(chip->gpio_int_n_irq, fusb302_irq_intn,
1744 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
1745 "fsc_interrupt_int_n", chip);
1746 if (ret < 0) {
1747 dev_err(dev, "cannot request IRQ for GPIO Int_N, ret=%d", ret);
1748 goto tcpm_unregister_port;
1749 }
1750 enable_irq_wake(chip->gpio_int_n_irq);
1751 i2c_set_clientdata(client, chip);
1752
1753 return ret;
1754
1755 tcpm_unregister_port:
1756 tcpm_unregister_port(chip->tcpm_port);
1757 fwnode_handle_put(chip->tcpc_dev.fwnode);
1758 destroy_workqueue:
1759 fusb302_debugfs_exit(chip);
1760 destroy_workqueue(chip->wq);
1761
1762 return ret;
1763 }
1764
fusb302_remove(struct i2c_client * client)1765 static int fusb302_remove(struct i2c_client *client)
1766 {
1767 struct fusb302_chip *chip = i2c_get_clientdata(client);
1768
1769 disable_irq_wake(chip->gpio_int_n_irq);
1770 free_irq(chip->gpio_int_n_irq, chip);
1771 cancel_work_sync(&chip->irq_work);
1772 cancel_delayed_work_sync(&chip->bc_lvl_handler);
1773 tcpm_unregister_port(chip->tcpm_port);
1774 fwnode_handle_put(chip->tcpc_dev.fwnode);
1775 destroy_workqueue(chip->wq);
1776 fusb302_debugfs_exit(chip);
1777
1778 return 0;
1779 }
1780
fusb302_pm_suspend(struct device * dev)1781 static int fusb302_pm_suspend(struct device *dev)
1782 {
1783 struct fusb302_chip *chip = dev->driver_data;
1784 unsigned long flags;
1785
1786 spin_lock_irqsave(&chip->irq_lock, flags);
1787 chip->irq_suspended = true;
1788 spin_unlock_irqrestore(&chip->irq_lock, flags);
1789
1790 /* Make sure any pending irq_work is finished before the bus suspends */
1791 flush_work(&chip->irq_work);
1792 return 0;
1793 }
1794
fusb302_pm_resume(struct device * dev)1795 static int fusb302_pm_resume(struct device *dev)
1796 {
1797 struct fusb302_chip *chip = dev->driver_data;
1798 unsigned long flags;
1799
1800 spin_lock_irqsave(&chip->irq_lock, flags);
1801 if (chip->irq_while_suspended) {
1802 schedule_work(&chip->irq_work);
1803 chip->irq_while_suspended = false;
1804 }
1805 chip->irq_suspended = false;
1806 spin_unlock_irqrestore(&chip->irq_lock, flags);
1807
1808 return 0;
1809 }
1810
1811 static const struct of_device_id fusb302_dt_match[] = {
1812 {.compatible = "fcs,fusb302"},
1813 {},
1814 };
1815 MODULE_DEVICE_TABLE(of, fusb302_dt_match);
1816
1817 static const struct i2c_device_id fusb302_i2c_device_id[] = {
1818 {"typec_fusb302", 0},
1819 {},
1820 };
1821 MODULE_DEVICE_TABLE(i2c, fusb302_i2c_device_id);
1822
1823 static const struct dev_pm_ops fusb302_pm_ops = {
1824 .suspend = fusb302_pm_suspend,
1825 .resume = fusb302_pm_resume,
1826 };
1827
1828 static struct i2c_driver fusb302_driver = {
1829 .driver = {
1830 .name = "typec_fusb302",
1831 .pm = &fusb302_pm_ops,
1832 .of_match_table = of_match_ptr(fusb302_dt_match),
1833 },
1834 .probe = fusb302_probe,
1835 .remove = fusb302_remove,
1836 .id_table = fusb302_i2c_device_id,
1837 };
1838 module_i2c_driver(fusb302_driver);
1839
1840 MODULE_AUTHOR("Yueyao Zhu <yueyao.zhu@gmail.com>");
1841 MODULE_DESCRIPTION("Fairchild FUSB302 Type-C Chip Driver");
1842 MODULE_LICENSE("GPL");
1843