1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * MAX3420 Device Controller driver for USB.
4 *
5 * Author: Jaswinder Singh Brar <jaswinder.singh@linaro.org>
6 * (C) Copyright 2019-2020 Linaro Ltd
7 *
8 * Based on:
9 * o MAX3420E datasheet
10 * https://datasheets.maximintegrated.com/en/ds/MAX3420E.pdf
11 * o MAX342{0,1}E Programming Guides
12 * https://pdfserv.maximintegrated.com/en/an/AN3598.pdf
13 * https://pdfserv.maximintegrated.com/en/an/AN3785.pdf
14 */
15
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/module.h>
21 #include <linux/bitfield.h>
22 #include <linux/of_address.h>
23 #include <linux/of_device.h>
24 #include <linux/of_platform.h>
25 #include <linux/of_irq.h>
26 #include <linux/prefetch.h>
27 #include <linux/usb/ch9.h>
28 #include <linux/usb/gadget.h>
29 #include <linux/spi/spi.h>
30 #include <linux/gpio/consumer.h>
31
32 #define MAX3420_MAX_EPS 4
33 #define MAX3420_EP_MAX_PACKET 64 /* Same for all Endpoints */
34 #define MAX3420_EPNAME_SIZE 16 /* Buffer size for endpoint name */
35
36 #define MAX3420_ACKSTAT BIT(0)
37
38 #define MAX3420_SPI_DIR_RD 0 /* read register from MAX3420 */
39 #define MAX3420_SPI_DIR_WR 1 /* write register to MAX3420 */
40
41 /* SPI commands: */
42 #define MAX3420_SPI_DIR_SHIFT 1
43 #define MAX3420_SPI_REG_SHIFT 3
44
45 #define MAX3420_REG_EP0FIFO 0
46 #define MAX3420_REG_EP1FIFO 1
47 #define MAX3420_REG_EP2FIFO 2
48 #define MAX3420_REG_EP3FIFO 3
49 #define MAX3420_REG_SUDFIFO 4
50 #define MAX3420_REG_EP0BC 5
51 #define MAX3420_REG_EP1BC 6
52 #define MAX3420_REG_EP2BC 7
53 #define MAX3420_REG_EP3BC 8
54
55 #define MAX3420_REG_EPSTALLS 9
56 #define ACKSTAT BIT(6)
57 #define STLSTAT BIT(5)
58 #define STLEP3IN BIT(4)
59 #define STLEP2IN BIT(3)
60 #define STLEP1OUT BIT(2)
61 #define STLEP0OUT BIT(1)
62 #define STLEP0IN BIT(0)
63
64 #define MAX3420_REG_CLRTOGS 10
65 #define EP3DISAB BIT(7)
66 #define EP2DISAB BIT(6)
67 #define EP1DISAB BIT(5)
68 #define CTGEP3IN BIT(4)
69 #define CTGEP2IN BIT(3)
70 #define CTGEP1OUT BIT(2)
71
72 #define MAX3420_REG_EPIRQ 11
73 #define MAX3420_REG_EPIEN 12
74 #define SUDAVIRQ BIT(5)
75 #define IN3BAVIRQ BIT(4)
76 #define IN2BAVIRQ BIT(3)
77 #define OUT1DAVIRQ BIT(2)
78 #define OUT0DAVIRQ BIT(1)
79 #define IN0BAVIRQ BIT(0)
80
81 #define MAX3420_REG_USBIRQ 13
82 #define MAX3420_REG_USBIEN 14
83 #define OSCOKIRQ BIT(0)
84 #define RWUDNIRQ BIT(1)
85 #define BUSACTIRQ BIT(2)
86 #define URESIRQ BIT(3)
87 #define SUSPIRQ BIT(4)
88 #define NOVBUSIRQ BIT(5)
89 #define VBUSIRQ BIT(6)
90 #define URESDNIRQ BIT(7)
91
92 #define MAX3420_REG_USBCTL 15
93 #define HOSCSTEN BIT(7)
94 #define VBGATE BIT(6)
95 #define CHIPRES BIT(5)
96 #define PWRDOWN BIT(4)
97 #define CONNECT BIT(3)
98 #define SIGRWU BIT(2)
99
100 #define MAX3420_REG_CPUCTL 16
101 #define IE BIT(0)
102
103 #define MAX3420_REG_PINCTL 17
104 #define EP3INAK BIT(7)
105 #define EP2INAK BIT(6)
106 #define EP0INAK BIT(5)
107 #define FDUPSPI BIT(4)
108 #define INTLEVEL BIT(3)
109 #define POSINT BIT(2)
110 #define GPXB BIT(1)
111 #define GPXA BIT(0)
112
113 #define MAX3420_REG_REVISION 18
114
115 #define MAX3420_REG_FNADDR 19
116 #define FNADDR_MASK 0x7f
117
118 #define MAX3420_REG_IOPINS 20
119 #define MAX3420_REG_IOPINS2 21
120 #define MAX3420_REG_GPINIRQ 22
121 #define MAX3420_REG_GPINIEN 23
122 #define MAX3420_REG_GPINPOL 24
123 #define MAX3420_REG_HIRQ 25
124 #define MAX3420_REG_HIEN 26
125 #define MAX3420_REG_MODE 27
126 #define MAX3420_REG_PERADDR 28
127 #define MAX3420_REG_HCTL 29
128 #define MAX3420_REG_HXFR 30
129 #define MAX3420_REG_HRSL 31
130
131 #define ENABLE_IRQ BIT(0)
132 #define IOPIN_UPDATE BIT(1)
133 #define REMOTE_WAKEUP BIT(2)
134 #define CONNECT_HOST GENMASK(4, 3)
135 #define HCONNECT (1 << 3)
136 #define HDISCONNECT (3 << 3)
137 #define UDC_START GENMASK(6, 5)
138 #define START (1 << 5)
139 #define STOP (3 << 5)
140 #define ENABLE_EP GENMASK(8, 7)
141 #define ENABLE (1 << 7)
142 #define DISABLE (3 << 7)
143 #define STALL_EP GENMASK(10, 9)
144 #define STALL (1 << 9)
145 #define UNSTALL (3 << 9)
146
147 #define MAX3420_CMD(c) FIELD_PREP(GENMASK(7, 3), c)
148 #define MAX3420_SPI_CMD_RD(c) (MAX3420_CMD(c) | (0 << 1))
149 #define MAX3420_SPI_CMD_WR(c) (MAX3420_CMD(c) | (1 << 1))
150
151 struct max3420_req {
152 struct usb_request usb_req;
153 struct list_head queue;
154 struct max3420_ep *ep;
155 };
156
157 struct max3420_ep {
158 struct usb_ep ep_usb;
159 struct max3420_udc *udc;
160 struct list_head queue;
161 char name[MAX3420_EPNAME_SIZE];
162 unsigned int maxpacket;
163 spinlock_t lock;
164 int halted;
165 u32 todo;
166 int id;
167 };
168
169 struct max3420_udc {
170 struct usb_gadget gadget;
171 struct max3420_ep ep[MAX3420_MAX_EPS];
172 struct usb_gadget_driver *driver;
173 struct task_struct *thread_task;
174 int remote_wkp, is_selfpowered;
175 bool vbus_active, softconnect;
176 struct usb_ctrlrequest setup;
177 struct mutex spi_bus_mutex;
178 struct max3420_req ep0req;
179 struct spi_device *spi;
180 struct device *dev;
181 spinlock_t lock;
182 bool suspended;
183 u8 ep0buf[64];
184 u32 todo;
185 };
186
187 #define to_max3420_req(r) container_of((r), struct max3420_req, usb_req)
188 #define to_max3420_ep(e) container_of((e), struct max3420_ep, ep_usb)
189 #define to_udc(g) container_of((g), struct max3420_udc, gadget)
190
191 #define DRIVER_DESC "MAX3420 USB Device-Mode Driver"
192 static const char driver_name[] = "max3420-udc";
193
194 /* Control endpoint configuration.*/
195 static const struct usb_endpoint_descriptor ep0_desc = {
196 .bEndpointAddress = USB_DIR_OUT,
197 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
198 .wMaxPacketSize = cpu_to_le16(MAX3420_EP_MAX_PACKET),
199 };
200
spi_ack_ctrl(struct max3420_udc * udc)201 static void spi_ack_ctrl(struct max3420_udc *udc)
202 {
203 struct spi_device *spi = udc->spi;
204 struct spi_transfer transfer;
205 struct spi_message msg;
206 u8 txdata[1];
207
208 memset(&transfer, 0, sizeof(transfer));
209
210 spi_message_init(&msg);
211
212 txdata[0] = MAX3420_ACKSTAT;
213 transfer.tx_buf = txdata;
214 transfer.len = 1;
215
216 spi_message_add_tail(&transfer, &msg);
217 spi_sync(spi, &msg);
218 }
219
spi_rd8_ack(struct max3420_udc * udc,u8 reg,int actstat)220 static u8 spi_rd8_ack(struct max3420_udc *udc, u8 reg, int actstat)
221 {
222 struct spi_device *spi = udc->spi;
223 struct spi_transfer transfer;
224 struct spi_message msg;
225 u8 txdata[2], rxdata[2];
226
227 memset(&transfer, 0, sizeof(transfer));
228
229 spi_message_init(&msg);
230
231 txdata[0] = MAX3420_SPI_CMD_RD(reg) | (actstat ? MAX3420_ACKSTAT : 0);
232 transfer.tx_buf = txdata;
233 transfer.rx_buf = rxdata;
234 transfer.len = 2;
235
236 spi_message_add_tail(&transfer, &msg);
237 spi_sync(spi, &msg);
238
239 return rxdata[1];
240 }
241
spi_rd8(struct max3420_udc * udc,u8 reg)242 static u8 spi_rd8(struct max3420_udc *udc, u8 reg)
243 {
244 return spi_rd8_ack(udc, reg, 0);
245 }
246
spi_wr8_ack(struct max3420_udc * udc,u8 reg,u8 val,int actstat)247 static void spi_wr8_ack(struct max3420_udc *udc, u8 reg, u8 val, int actstat)
248 {
249 struct spi_device *spi = udc->spi;
250 struct spi_transfer transfer;
251 struct spi_message msg;
252 u8 txdata[2];
253
254 memset(&transfer, 0, sizeof(transfer));
255
256 spi_message_init(&msg);
257
258 txdata[0] = MAX3420_SPI_CMD_WR(reg) | (actstat ? MAX3420_ACKSTAT : 0);
259 txdata[1] = val;
260
261 transfer.tx_buf = txdata;
262 transfer.len = 2;
263
264 spi_message_add_tail(&transfer, &msg);
265 spi_sync(spi, &msg);
266 }
267
spi_wr8(struct max3420_udc * udc,u8 reg,u8 val)268 static void spi_wr8(struct max3420_udc *udc, u8 reg, u8 val)
269 {
270 spi_wr8_ack(udc, reg, val, 0);
271 }
272
spi_rd_buf(struct max3420_udc * udc,u8 reg,void * buf,u8 len)273 static void spi_rd_buf(struct max3420_udc *udc, u8 reg, void *buf, u8 len)
274 {
275 struct spi_device *spi = udc->spi;
276 struct spi_transfer transfer;
277 struct spi_message msg;
278 u8 local_buf[MAX3420_EP_MAX_PACKET + 1] = {};
279
280 memset(&transfer, 0, sizeof(transfer));
281
282 spi_message_init(&msg);
283
284 local_buf[0] = MAX3420_SPI_CMD_RD(reg);
285 transfer.tx_buf = &local_buf[0];
286 transfer.rx_buf = &local_buf[0];
287 transfer.len = len + 1;
288
289 spi_message_add_tail(&transfer, &msg);
290 spi_sync(spi, &msg);
291
292 memcpy(buf, &local_buf[1], len);
293 }
294
spi_wr_buf(struct max3420_udc * udc,u8 reg,void * buf,u8 len)295 static void spi_wr_buf(struct max3420_udc *udc, u8 reg, void *buf, u8 len)
296 {
297 struct spi_device *spi = udc->spi;
298 struct spi_transfer transfer;
299 struct spi_message msg;
300 u8 local_buf[MAX3420_EP_MAX_PACKET + 1] = {};
301
302 memset(&transfer, 0, sizeof(transfer));
303
304 spi_message_init(&msg);
305
306 local_buf[0] = MAX3420_SPI_CMD_WR(reg);
307 memcpy(&local_buf[1], buf, len);
308
309 transfer.tx_buf = local_buf;
310 transfer.len = len + 1;
311
312 spi_message_add_tail(&transfer, &msg);
313 spi_sync(spi, &msg);
314 }
315
spi_max3420_enable(struct max3420_ep * ep)316 static int spi_max3420_enable(struct max3420_ep *ep)
317 {
318 struct max3420_udc *udc = ep->udc;
319 unsigned long flags;
320 u8 epdis, epien;
321 int todo;
322
323 spin_lock_irqsave(&ep->lock, flags);
324 todo = ep->todo & ENABLE_EP;
325 ep->todo &= ~ENABLE_EP;
326 spin_unlock_irqrestore(&ep->lock, flags);
327
328 if (!todo || ep->id == 0)
329 return false;
330
331 epien = spi_rd8(udc, MAX3420_REG_EPIEN);
332 epdis = spi_rd8(udc, MAX3420_REG_CLRTOGS);
333
334 if (todo == ENABLE) {
335 epdis &= ~BIT(ep->id + 4);
336 epien |= BIT(ep->id + 1);
337 } else {
338 epdis |= BIT(ep->id + 4);
339 epien &= ~BIT(ep->id + 1);
340 }
341
342 spi_wr8(udc, MAX3420_REG_CLRTOGS, epdis);
343 spi_wr8(udc, MAX3420_REG_EPIEN, epien);
344
345 return true;
346 }
347
spi_max3420_stall(struct max3420_ep * ep)348 static int spi_max3420_stall(struct max3420_ep *ep)
349 {
350 struct max3420_udc *udc = ep->udc;
351 unsigned long flags;
352 u8 epstalls;
353 int todo;
354
355 spin_lock_irqsave(&ep->lock, flags);
356 todo = ep->todo & STALL_EP;
357 ep->todo &= ~STALL_EP;
358 spin_unlock_irqrestore(&ep->lock, flags);
359
360 if (!todo || ep->id == 0)
361 return false;
362
363 epstalls = spi_rd8(udc, MAX3420_REG_EPSTALLS);
364 if (todo == STALL) {
365 ep->halted = 1;
366 epstalls |= BIT(ep->id + 1);
367 } else {
368 u8 clrtogs;
369
370 ep->halted = 0;
371 epstalls &= ~BIT(ep->id + 1);
372 clrtogs = spi_rd8(udc, MAX3420_REG_CLRTOGS);
373 clrtogs |= BIT(ep->id + 1);
374 spi_wr8(udc, MAX3420_REG_CLRTOGS, clrtogs);
375 }
376 spi_wr8(udc, MAX3420_REG_EPSTALLS, epstalls | ACKSTAT);
377
378 return true;
379 }
380
spi_max3420_rwkup(struct max3420_udc * udc)381 static int spi_max3420_rwkup(struct max3420_udc *udc)
382 {
383 unsigned long flags;
384 int wake_remote;
385 u8 usbctl;
386
387 spin_lock_irqsave(&udc->lock, flags);
388 wake_remote = udc->todo & REMOTE_WAKEUP;
389 udc->todo &= ~REMOTE_WAKEUP;
390 spin_unlock_irqrestore(&udc->lock, flags);
391
392 if (!wake_remote || !udc->suspended)
393 return false;
394
395 /* Set Remote-WkUp Signal*/
396 usbctl = spi_rd8(udc, MAX3420_REG_USBCTL);
397 usbctl |= SIGRWU;
398 spi_wr8(udc, MAX3420_REG_USBCTL, usbctl);
399
400 msleep_interruptible(5);
401
402 /* Clear Remote-WkUp Signal*/
403 usbctl = spi_rd8(udc, MAX3420_REG_USBCTL);
404 usbctl &= ~SIGRWU;
405 spi_wr8(udc, MAX3420_REG_USBCTL, usbctl);
406
407 udc->suspended = false;
408
409 return true;
410 }
411
412 static void max3420_nuke(struct max3420_ep *ep, int status);
__max3420_stop(struct max3420_udc * udc)413 static void __max3420_stop(struct max3420_udc *udc)
414 {
415 u8 val;
416 int i;
417
418 /* clear all pending requests */
419 for (i = 1; i < MAX3420_MAX_EPS; i++)
420 max3420_nuke(&udc->ep[i], -ECONNRESET);
421
422 /* Disable IRQ to CPU */
423 spi_wr8(udc, MAX3420_REG_CPUCTL, 0);
424
425 val = spi_rd8(udc, MAX3420_REG_USBCTL);
426 val |= PWRDOWN;
427 if (udc->is_selfpowered)
428 val &= ~HOSCSTEN;
429 else
430 val |= HOSCSTEN;
431 spi_wr8(udc, MAX3420_REG_USBCTL, val);
432 }
433
__max3420_start(struct max3420_udc * udc)434 static void __max3420_start(struct max3420_udc *udc)
435 {
436 u8 val;
437
438 /* Need this delay if bus-powered,
439 * but even for self-powered it helps stability
440 */
441 msleep_interruptible(250);
442
443 /* configure SPI */
444 spi_wr8(udc, MAX3420_REG_PINCTL, FDUPSPI);
445
446 /* Chip Reset */
447 spi_wr8(udc, MAX3420_REG_USBCTL, CHIPRES);
448 msleep_interruptible(5);
449 spi_wr8(udc, MAX3420_REG_USBCTL, 0);
450
451 /* Poll for OSC to stabilize */
452 while (1) {
453 val = spi_rd8(udc, MAX3420_REG_USBIRQ);
454 if (val & OSCOKIRQ)
455 break;
456 cond_resched();
457 }
458
459 /* Enable PULL-UP only when Vbus detected */
460 val = spi_rd8(udc, MAX3420_REG_USBCTL);
461 val |= VBGATE | CONNECT;
462 spi_wr8(udc, MAX3420_REG_USBCTL, val);
463
464 val = URESDNIRQ | URESIRQ;
465 if (udc->is_selfpowered)
466 val |= NOVBUSIRQ;
467 spi_wr8(udc, MAX3420_REG_USBIEN, val);
468
469 /* Enable only EP0 interrupts */
470 val = IN0BAVIRQ | OUT0DAVIRQ | SUDAVIRQ;
471 spi_wr8(udc, MAX3420_REG_EPIEN, val);
472
473 /* Enable IRQ to CPU */
474 spi_wr8(udc, MAX3420_REG_CPUCTL, IE);
475 }
476
max3420_start(struct max3420_udc * udc)477 static int max3420_start(struct max3420_udc *udc)
478 {
479 unsigned long flags;
480 int todo;
481
482 spin_lock_irqsave(&udc->lock, flags);
483 todo = udc->todo & UDC_START;
484 udc->todo &= ~UDC_START;
485 spin_unlock_irqrestore(&udc->lock, flags);
486
487 if (!todo)
488 return false;
489
490 if (udc->vbus_active && udc->softconnect)
491 __max3420_start(udc);
492 else
493 __max3420_stop(udc);
494
495 return true;
496 }
497
max3420_vbus_handler(int irq,void * dev_id)498 static irqreturn_t max3420_vbus_handler(int irq, void *dev_id)
499 {
500 struct max3420_udc *udc = dev_id;
501 unsigned long flags;
502
503 spin_lock_irqsave(&udc->lock, flags);
504 /* its a vbus change interrupt */
505 udc->vbus_active = !udc->vbus_active;
506 udc->todo |= UDC_START;
507 usb_udc_vbus_handler(&udc->gadget, udc->vbus_active);
508 usb_gadget_set_state(&udc->gadget, udc->vbus_active
509 ? USB_STATE_POWERED : USB_STATE_NOTATTACHED);
510 spin_unlock_irqrestore(&udc->lock, flags);
511
512 if (udc->thread_task &&
513 udc->thread_task->state != TASK_RUNNING)
514 wake_up_process(udc->thread_task);
515
516 return IRQ_HANDLED;
517 }
518
max3420_irq_handler(int irq,void * dev_id)519 static irqreturn_t max3420_irq_handler(int irq, void *dev_id)
520 {
521 struct max3420_udc *udc = dev_id;
522 struct spi_device *spi = udc->spi;
523 unsigned long flags;
524
525 spin_lock_irqsave(&udc->lock, flags);
526 if ((udc->todo & ENABLE_IRQ) == 0) {
527 disable_irq_nosync(spi->irq);
528 udc->todo |= ENABLE_IRQ;
529 }
530 spin_unlock_irqrestore(&udc->lock, flags);
531
532 if (udc->thread_task &&
533 udc->thread_task->state != TASK_RUNNING)
534 wake_up_process(udc->thread_task);
535
536 return IRQ_HANDLED;
537 }
538
max3420_getstatus(struct max3420_udc * udc)539 static void max3420_getstatus(struct max3420_udc *udc)
540 {
541 struct max3420_ep *ep;
542 u16 status = 0;
543
544 switch (udc->setup.bRequestType & USB_RECIP_MASK) {
545 case USB_RECIP_DEVICE:
546 /* Get device status */
547 status = udc->gadget.is_selfpowered << USB_DEVICE_SELF_POWERED;
548 status |= (udc->remote_wkp << USB_DEVICE_REMOTE_WAKEUP);
549 break;
550 case USB_RECIP_INTERFACE:
551 if (udc->driver->setup(&udc->gadget, &udc->setup) < 0)
552 goto stall;
553 break;
554 case USB_RECIP_ENDPOINT:
555 ep = &udc->ep[udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK];
556 if (udc->setup.wIndex & USB_DIR_IN) {
557 if (!ep->ep_usb.caps.dir_in)
558 goto stall;
559 } else {
560 if (!ep->ep_usb.caps.dir_out)
561 goto stall;
562 }
563 if (ep->halted)
564 status = 1 << USB_ENDPOINT_HALT;
565 break;
566 default:
567 goto stall;
568 }
569
570 status = cpu_to_le16(status);
571 spi_wr_buf(udc, MAX3420_REG_EP0FIFO, &status, 2);
572 spi_wr8_ack(udc, MAX3420_REG_EP0BC, 2, 1);
573 return;
574 stall:
575 dev_err(udc->dev, "Can't respond to getstatus request\n");
576 spi_wr8(udc, MAX3420_REG_EPSTALLS, STLEP0IN | STLEP0OUT | STLSTAT);
577 }
578
max3420_set_clear_feature(struct max3420_udc * udc)579 static void max3420_set_clear_feature(struct max3420_udc *udc)
580 {
581 struct max3420_ep *ep;
582 int set = udc->setup.bRequest == USB_REQ_SET_FEATURE;
583 unsigned long flags;
584 int id;
585
586 switch (udc->setup.bRequestType) {
587 case USB_RECIP_DEVICE:
588 if (udc->setup.wValue != USB_DEVICE_REMOTE_WAKEUP)
589 break;
590
591 if (udc->setup.bRequest == USB_REQ_SET_FEATURE)
592 udc->remote_wkp = 1;
593 else
594 udc->remote_wkp = 0;
595
596 return spi_ack_ctrl(udc);
597
598 case USB_RECIP_ENDPOINT:
599 if (udc->setup.wValue != USB_ENDPOINT_HALT)
600 break;
601
602 id = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
603 ep = &udc->ep[id];
604
605 spin_lock_irqsave(&ep->lock, flags);
606 ep->todo &= ~STALL_EP;
607 if (set)
608 ep->todo |= STALL;
609 else
610 ep->todo |= UNSTALL;
611 spin_unlock_irqrestore(&ep->lock, flags);
612
613 spi_max3420_stall(ep);
614 return;
615 default:
616 break;
617 }
618
619 dev_err(udc->dev, "Can't respond to SET/CLEAR FEATURE\n");
620 spi_wr8(udc, MAX3420_REG_EPSTALLS, STLEP0IN | STLEP0OUT | STLSTAT);
621 }
622
max3420_handle_setup(struct max3420_udc * udc)623 static void max3420_handle_setup(struct max3420_udc *udc)
624 {
625 struct usb_ctrlrequest setup;
626
627 spi_rd_buf(udc, MAX3420_REG_SUDFIFO, (void *)&setup, 8);
628
629 udc->setup = setup;
630 udc->setup.wValue = cpu_to_le16(setup.wValue);
631 udc->setup.wIndex = cpu_to_le16(setup.wIndex);
632 udc->setup.wLength = cpu_to_le16(setup.wLength);
633
634 switch (udc->setup.bRequest) {
635 case USB_REQ_GET_STATUS:
636 /* Data+Status phase form udc */
637 if ((udc->setup.bRequestType &
638 (USB_DIR_IN | USB_TYPE_MASK)) !=
639 (USB_DIR_IN | USB_TYPE_STANDARD)) {
640 break;
641 }
642 return max3420_getstatus(udc);
643 case USB_REQ_SET_ADDRESS:
644 /* Status phase from udc */
645 if (udc->setup.bRequestType != (USB_DIR_OUT |
646 USB_TYPE_STANDARD | USB_RECIP_DEVICE)) {
647 break;
648 }
649 spi_rd8_ack(udc, MAX3420_REG_FNADDR, 1);
650 dev_dbg(udc->dev, "Assigned Address=%d\n", udc->setup.wValue);
651 return;
652 case USB_REQ_CLEAR_FEATURE:
653 case USB_REQ_SET_FEATURE:
654 /* Requests with no data phase, status phase from udc */
655 if ((udc->setup.bRequestType & USB_TYPE_MASK)
656 != USB_TYPE_STANDARD)
657 break;
658 return max3420_set_clear_feature(udc);
659 default:
660 break;
661 }
662
663 if (udc->driver->setup(&udc->gadget, &setup) < 0) {
664 /* Stall EP0 */
665 spi_wr8(udc, MAX3420_REG_EPSTALLS,
666 STLEP0IN | STLEP0OUT | STLSTAT);
667 }
668 }
669
max3420_req_done(struct max3420_req * req,int status)670 static void max3420_req_done(struct max3420_req *req, int status)
671 {
672 struct max3420_ep *ep = req->ep;
673 struct max3420_udc *udc = ep->udc;
674
675 if (req->usb_req.status == -EINPROGRESS)
676 req->usb_req.status = status;
677 else
678 status = req->usb_req.status;
679
680 if (status && status != -ESHUTDOWN)
681 dev_err(udc->dev, "%s done %p, status %d\n",
682 ep->ep_usb.name, req, status);
683
684 if (req->usb_req.complete)
685 req->usb_req.complete(&ep->ep_usb, &req->usb_req);
686 }
687
max3420_do_data(struct max3420_udc * udc,int ep_id,int in)688 static int max3420_do_data(struct max3420_udc *udc, int ep_id, int in)
689 {
690 struct max3420_ep *ep = &udc->ep[ep_id];
691 struct max3420_req *req;
692 int done, length, psz;
693 void *buf;
694
695 if (list_empty(&ep->queue))
696 return false;
697
698 req = list_first_entry(&ep->queue, struct max3420_req, queue);
699 buf = req->usb_req.buf + req->usb_req.actual;
700
701 psz = ep->ep_usb.maxpacket;
702 length = req->usb_req.length - req->usb_req.actual;
703 length = min(length, psz);
704
705 if (length == 0) {
706 done = 1;
707 goto xfer_done;
708 }
709
710 done = 0;
711 if (in) {
712 prefetch(buf);
713 spi_wr_buf(udc, MAX3420_REG_EP0FIFO + ep_id, buf, length);
714 spi_wr8(udc, MAX3420_REG_EP0BC + ep_id, length);
715 if (length < psz)
716 done = 1;
717 } else {
718 psz = spi_rd8(udc, MAX3420_REG_EP0BC + ep_id);
719 length = min(length, psz);
720 prefetchw(buf);
721 spi_rd_buf(udc, MAX3420_REG_EP0FIFO + ep_id, buf, length);
722 if (length < ep->ep_usb.maxpacket)
723 done = 1;
724 }
725
726 req->usb_req.actual += length;
727
728 if (req->usb_req.actual == req->usb_req.length)
729 done = 1;
730
731 xfer_done:
732 if (done) {
733 unsigned long flags;
734
735 spin_lock_irqsave(&ep->lock, flags);
736 list_del_init(&req->queue);
737 spin_unlock_irqrestore(&ep->lock, flags);
738
739 if (ep_id == 0)
740 spi_ack_ctrl(udc);
741
742 max3420_req_done(req, 0);
743 }
744
745 return true;
746 }
747
max3420_handle_irqs(struct max3420_udc * udc)748 static int max3420_handle_irqs(struct max3420_udc *udc)
749 {
750 u8 epien, epirq, usbirq, usbien, reg[4];
751 bool ret = false;
752
753 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 4);
754 epirq = reg[0];
755 epien = reg[1];
756 usbirq = reg[2];
757 usbien = reg[3];
758
759 usbirq &= usbien;
760 epirq &= epien;
761
762 if (epirq & SUDAVIRQ) {
763 spi_wr8(udc, MAX3420_REG_EPIRQ, SUDAVIRQ);
764 max3420_handle_setup(udc);
765 return true;
766 }
767
768 if (usbirq & VBUSIRQ) {
769 spi_wr8(udc, MAX3420_REG_USBIRQ, VBUSIRQ);
770 dev_dbg(udc->dev, "Cable plugged in\n");
771 return true;
772 }
773
774 if (usbirq & NOVBUSIRQ) {
775 spi_wr8(udc, MAX3420_REG_USBIRQ, NOVBUSIRQ);
776 dev_dbg(udc->dev, "Cable pulled out\n");
777 return true;
778 }
779
780 if (usbirq & URESIRQ) {
781 spi_wr8(udc, MAX3420_REG_USBIRQ, URESIRQ);
782 dev_dbg(udc->dev, "USB Reset - Start\n");
783 return true;
784 }
785
786 if (usbirq & URESDNIRQ) {
787 spi_wr8(udc, MAX3420_REG_USBIRQ, URESDNIRQ);
788 dev_dbg(udc->dev, "USB Reset - END\n");
789 spi_wr8(udc, MAX3420_REG_USBIEN, URESDNIRQ | URESIRQ);
790 spi_wr8(udc, MAX3420_REG_EPIEN, SUDAVIRQ | IN0BAVIRQ
791 | OUT0DAVIRQ);
792 return true;
793 }
794
795 if (usbirq & SUSPIRQ) {
796 spi_wr8(udc, MAX3420_REG_USBIRQ, SUSPIRQ);
797 dev_dbg(udc->dev, "USB Suspend - Enter\n");
798 udc->suspended = true;
799 return true;
800 }
801
802 if (usbirq & BUSACTIRQ) {
803 spi_wr8(udc, MAX3420_REG_USBIRQ, BUSACTIRQ);
804 dev_dbg(udc->dev, "USB Suspend - Exit\n");
805 udc->suspended = false;
806 return true;
807 }
808
809 if (usbirq & RWUDNIRQ) {
810 spi_wr8(udc, MAX3420_REG_USBIRQ, RWUDNIRQ);
811 dev_dbg(udc->dev, "Asked Host to wakeup\n");
812 return true;
813 }
814
815 if (usbirq & OSCOKIRQ) {
816 spi_wr8(udc, MAX3420_REG_USBIRQ, OSCOKIRQ);
817 dev_dbg(udc->dev, "Osc stabilized, start work\n");
818 return true;
819 }
820
821 if (epirq & OUT0DAVIRQ && max3420_do_data(udc, 0, 0)) {
822 spi_wr8_ack(udc, MAX3420_REG_EPIRQ, OUT0DAVIRQ, 1);
823 ret = true;
824 }
825
826 if (epirq & IN0BAVIRQ && max3420_do_data(udc, 0, 1))
827 ret = true;
828
829 if (epirq & OUT1DAVIRQ && max3420_do_data(udc, 1, 0)) {
830 spi_wr8_ack(udc, MAX3420_REG_EPIRQ, OUT1DAVIRQ, 1);
831 ret = true;
832 }
833
834 if (epirq & IN2BAVIRQ && max3420_do_data(udc, 2, 1))
835 ret = true;
836
837 if (epirq & IN3BAVIRQ && max3420_do_data(udc, 3, 1))
838 ret = true;
839
840 return ret;
841 }
842
max3420_thread(void * dev_id)843 static int max3420_thread(void *dev_id)
844 {
845 struct max3420_udc *udc = dev_id;
846 struct spi_device *spi = udc->spi;
847 int i, loop_again = 1;
848 unsigned long flags;
849
850 while (!kthread_should_stop()) {
851 if (!loop_again) {
852 ktime_t kt = ns_to_ktime(1000 * 1000 * 250); /* 250ms */
853
854 set_current_state(TASK_INTERRUPTIBLE);
855
856 spin_lock_irqsave(&udc->lock, flags);
857 if (udc->todo & ENABLE_IRQ) {
858 enable_irq(spi->irq);
859 udc->todo &= ~ENABLE_IRQ;
860 }
861 spin_unlock_irqrestore(&udc->lock, flags);
862
863 schedule_hrtimeout(&kt, HRTIMER_MODE_REL);
864 }
865 loop_again = 0;
866
867 mutex_lock(&udc->spi_bus_mutex);
868
869 /* If bus-vbus_active and disconnected */
870 if (!udc->vbus_active || !udc->softconnect)
871 goto loop;
872
873 if (max3420_start(udc)) {
874 loop_again = 1;
875 goto loop;
876 }
877
878 if (max3420_handle_irqs(udc)) {
879 loop_again = 1;
880 goto loop;
881 }
882
883 if (spi_max3420_rwkup(udc)) {
884 loop_again = 1;
885 goto loop;
886 }
887
888 max3420_do_data(udc, 0, 1); /* get done with the EP0 ZLP */
889
890 for (i = 1; i < MAX3420_MAX_EPS; i++) {
891 struct max3420_ep *ep = &udc->ep[i];
892
893 if (spi_max3420_enable(ep))
894 loop_again = 1;
895 if (spi_max3420_stall(ep))
896 loop_again = 1;
897 }
898 loop:
899 mutex_unlock(&udc->spi_bus_mutex);
900 }
901
902 set_current_state(TASK_RUNNING);
903 dev_info(udc->dev, "SPI thread exiting\n");
904 return 0;
905 }
906
max3420_ep_set_halt(struct usb_ep * _ep,int stall)907 static int max3420_ep_set_halt(struct usb_ep *_ep, int stall)
908 {
909 struct max3420_ep *ep = to_max3420_ep(_ep);
910 struct max3420_udc *udc = ep->udc;
911 unsigned long flags;
912
913 spin_lock_irqsave(&ep->lock, flags);
914
915 ep->todo &= ~STALL_EP;
916 if (stall)
917 ep->todo |= STALL;
918 else
919 ep->todo |= UNSTALL;
920
921 spin_unlock_irqrestore(&ep->lock, flags);
922
923 wake_up_process(udc->thread_task);
924
925 dev_dbg(udc->dev, "%sStall %s\n", stall ? "" : "Un", ep->name);
926 return 0;
927 }
928
__max3420_ep_enable(struct max3420_ep * ep,const struct usb_endpoint_descriptor * desc)929 static int __max3420_ep_enable(struct max3420_ep *ep,
930 const struct usb_endpoint_descriptor *desc)
931 {
932 unsigned int maxp = usb_endpoint_maxp(desc);
933 unsigned long flags;
934
935 spin_lock_irqsave(&ep->lock, flags);
936 ep->ep_usb.desc = desc;
937 ep->ep_usb.maxpacket = maxp;
938
939 ep->todo &= ~ENABLE_EP;
940 ep->todo |= ENABLE;
941 spin_unlock_irqrestore(&ep->lock, flags);
942
943 return 0;
944 }
945
max3420_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)946 static int max3420_ep_enable(struct usb_ep *_ep,
947 const struct usb_endpoint_descriptor *desc)
948 {
949 struct max3420_ep *ep = to_max3420_ep(_ep);
950 struct max3420_udc *udc = ep->udc;
951
952 __max3420_ep_enable(ep, desc);
953
954 wake_up_process(udc->thread_task);
955
956 return 0;
957 }
958
max3420_nuke(struct max3420_ep * ep,int status)959 static void max3420_nuke(struct max3420_ep *ep, int status)
960 {
961 struct max3420_req *req, *r;
962 unsigned long flags;
963
964 spin_lock_irqsave(&ep->lock, flags);
965
966 list_for_each_entry_safe(req, r, &ep->queue, queue) {
967 list_del_init(&req->queue);
968
969 spin_unlock_irqrestore(&ep->lock, flags);
970 max3420_req_done(req, status);
971 spin_lock_irqsave(&ep->lock, flags);
972 }
973
974 spin_unlock_irqrestore(&ep->lock, flags);
975 }
976
__max3420_ep_disable(struct max3420_ep * ep)977 static void __max3420_ep_disable(struct max3420_ep *ep)
978 {
979 struct max3420_udc *udc = ep->udc;
980 unsigned long flags;
981
982 spin_lock_irqsave(&ep->lock, flags);
983
984 ep->ep_usb.desc = NULL;
985
986 ep->todo &= ~ENABLE_EP;
987 ep->todo |= DISABLE;
988
989 spin_unlock_irqrestore(&ep->lock, flags);
990
991 dev_dbg(udc->dev, "Disabled %s\n", ep->name);
992 }
993
max3420_ep_disable(struct usb_ep * _ep)994 static int max3420_ep_disable(struct usb_ep *_ep)
995 {
996 struct max3420_ep *ep = to_max3420_ep(_ep);
997 struct max3420_udc *udc = ep->udc;
998
999 max3420_nuke(ep, -ESHUTDOWN);
1000
1001 __max3420_ep_disable(ep);
1002
1003 wake_up_process(udc->thread_task);
1004
1005 return 0;
1006 }
1007
max3420_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)1008 static struct usb_request *max3420_alloc_request(struct usb_ep *_ep,
1009 gfp_t gfp_flags)
1010 {
1011 struct max3420_ep *ep = to_max3420_ep(_ep);
1012 struct max3420_req *req;
1013
1014 req = kzalloc(sizeof(*req), gfp_flags);
1015 if (!req)
1016 return NULL;
1017
1018 req->ep = ep;
1019
1020 return &req->usb_req;
1021 }
1022
max3420_free_request(struct usb_ep * _ep,struct usb_request * _req)1023 static void max3420_free_request(struct usb_ep *_ep, struct usb_request *_req)
1024 {
1025 kfree(to_max3420_req(_req));
1026 }
1027
max3420_ep_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t ignored)1028 static int max3420_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1029 gfp_t ignored)
1030 {
1031 struct max3420_req *req = to_max3420_req(_req);
1032 struct max3420_ep *ep = to_max3420_ep(_ep);
1033 struct max3420_udc *udc = ep->udc;
1034 unsigned long flags;
1035
1036 _req->status = -EINPROGRESS;
1037 _req->actual = 0;
1038
1039 spin_lock_irqsave(&ep->lock, flags);
1040 list_add_tail(&req->queue, &ep->queue);
1041 spin_unlock_irqrestore(&ep->lock, flags);
1042
1043 wake_up_process(udc->thread_task);
1044 return 0;
1045 }
1046
max3420_ep_dequeue(struct usb_ep * _ep,struct usb_request * _req)1047 static int max3420_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1048 {
1049 struct max3420_req *t, *req = to_max3420_req(_req);
1050 struct max3420_ep *ep = to_max3420_ep(_ep);
1051 unsigned long flags;
1052
1053 spin_lock_irqsave(&ep->lock, flags);
1054
1055 /* Pluck the descriptor from queue */
1056 list_for_each_entry(t, &ep->queue, queue)
1057 if (t == req) {
1058 list_del_init(&req->queue);
1059 break;
1060 }
1061
1062 spin_unlock_irqrestore(&ep->lock, flags);
1063
1064 if (t == req)
1065 max3420_req_done(req, -ECONNRESET);
1066
1067 return 0;
1068 }
1069
1070 static const struct usb_ep_ops max3420_ep_ops = {
1071 .enable = max3420_ep_enable,
1072 .disable = max3420_ep_disable,
1073 .alloc_request = max3420_alloc_request,
1074 .free_request = max3420_free_request,
1075 .queue = max3420_ep_queue,
1076 .dequeue = max3420_ep_dequeue,
1077 .set_halt = max3420_ep_set_halt,
1078 };
1079
max3420_wakeup(struct usb_gadget * gadget)1080 static int max3420_wakeup(struct usb_gadget *gadget)
1081 {
1082 struct max3420_udc *udc = to_udc(gadget);
1083 unsigned long flags;
1084 int ret = -EINVAL;
1085
1086 spin_lock_irqsave(&udc->lock, flags);
1087
1088 /* Only if wakeup allowed by host */
1089 if (udc->remote_wkp) {
1090 udc->todo |= REMOTE_WAKEUP;
1091 ret = 0;
1092 }
1093
1094 spin_unlock_irqrestore(&udc->lock, flags);
1095
1096 if (udc->thread_task &&
1097 udc->thread_task->state != TASK_RUNNING)
1098 wake_up_process(udc->thread_task);
1099 return ret;
1100 }
1101
max3420_udc_start(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1102 static int max3420_udc_start(struct usb_gadget *gadget,
1103 struct usb_gadget_driver *driver)
1104 {
1105 struct max3420_udc *udc = to_udc(gadget);
1106 unsigned long flags;
1107
1108 spin_lock_irqsave(&udc->lock, flags);
1109 /* hook up the driver */
1110 driver->driver.bus = NULL;
1111 udc->driver = driver;
1112 udc->gadget.speed = USB_SPEED_FULL;
1113
1114 udc->gadget.is_selfpowered = udc->is_selfpowered;
1115 udc->remote_wkp = 0;
1116 udc->softconnect = true;
1117 udc->todo |= UDC_START;
1118 spin_unlock_irqrestore(&udc->lock, flags);
1119
1120 if (udc->thread_task &&
1121 udc->thread_task->state != TASK_RUNNING)
1122 wake_up_process(udc->thread_task);
1123
1124 return 0;
1125 }
1126
max3420_udc_stop(struct usb_gadget * gadget)1127 static int max3420_udc_stop(struct usb_gadget *gadget)
1128 {
1129 struct max3420_udc *udc = to_udc(gadget);
1130 unsigned long flags;
1131
1132 spin_lock_irqsave(&udc->lock, flags);
1133 udc->is_selfpowered = udc->gadget.is_selfpowered;
1134 udc->gadget.speed = USB_SPEED_UNKNOWN;
1135 udc->driver = NULL;
1136 udc->softconnect = false;
1137 udc->todo |= UDC_START;
1138 spin_unlock_irqrestore(&udc->lock, flags);
1139
1140 if (udc->thread_task &&
1141 udc->thread_task->state != TASK_RUNNING)
1142 wake_up_process(udc->thread_task);
1143
1144 return 0;
1145 }
1146
1147 static const struct usb_gadget_ops max3420_udc_ops = {
1148 .udc_start = max3420_udc_start,
1149 .udc_stop = max3420_udc_stop,
1150 .wakeup = max3420_wakeup,
1151 };
1152
max3420_eps_init(struct max3420_udc * udc)1153 static void max3420_eps_init(struct max3420_udc *udc)
1154 {
1155 int idx;
1156
1157 INIT_LIST_HEAD(&udc->gadget.ep_list);
1158
1159 for (idx = 0; idx < MAX3420_MAX_EPS; idx++) {
1160 struct max3420_ep *ep = &udc->ep[idx];
1161
1162 spin_lock_init(&ep->lock);
1163 INIT_LIST_HEAD(&ep->queue);
1164
1165 ep->udc = udc;
1166 ep->id = idx;
1167 ep->halted = 0;
1168 ep->maxpacket = 0;
1169 ep->ep_usb.name = ep->name;
1170 ep->ep_usb.ops = &max3420_ep_ops;
1171 usb_ep_set_maxpacket_limit(&ep->ep_usb, MAX3420_EP_MAX_PACKET);
1172
1173 if (idx == 0) { /* For EP0 */
1174 ep->ep_usb.desc = &ep0_desc;
1175 ep->ep_usb.maxpacket = usb_endpoint_maxp(&ep0_desc);
1176 ep->ep_usb.caps.type_control = true;
1177 ep->ep_usb.caps.dir_in = true;
1178 ep->ep_usb.caps.dir_out = true;
1179 snprintf(ep->name, MAX3420_EPNAME_SIZE, "ep0");
1180 continue;
1181 }
1182
1183 if (idx == 1) { /* EP1 is OUT */
1184 ep->ep_usb.caps.dir_in = false;
1185 ep->ep_usb.caps.dir_out = true;
1186 snprintf(ep->name, MAX3420_EPNAME_SIZE, "ep1-bulk-out");
1187 } else { /* EP2 & EP3 are IN */
1188 ep->ep_usb.caps.dir_in = true;
1189 ep->ep_usb.caps.dir_out = false;
1190 snprintf(ep->name, MAX3420_EPNAME_SIZE,
1191 "ep%d-bulk-in", idx);
1192 }
1193 ep->ep_usb.caps.type_iso = false;
1194 ep->ep_usb.caps.type_int = false;
1195 ep->ep_usb.caps.type_bulk = true;
1196
1197 list_add_tail(&ep->ep_usb.ep_list,
1198 &udc->gadget.ep_list);
1199 }
1200 }
1201
max3420_probe(struct spi_device * spi)1202 static int max3420_probe(struct spi_device *spi)
1203 {
1204 struct max3420_udc *udc;
1205 int err, irq;
1206 u8 reg[8];
1207
1208 if (spi->master->flags & SPI_MASTER_HALF_DUPLEX) {
1209 dev_err(&spi->dev, "UDC needs full duplex to work\n");
1210 return -EINVAL;
1211 }
1212
1213 spi->mode = SPI_MODE_3;
1214 spi->bits_per_word = 8;
1215
1216 err = spi_setup(spi);
1217 if (err) {
1218 dev_err(&spi->dev, "Unable to setup SPI bus\n");
1219 return -EFAULT;
1220 }
1221
1222 udc = devm_kzalloc(&spi->dev, sizeof(*udc), GFP_KERNEL);
1223 if (!udc)
1224 return -ENOMEM;
1225
1226 udc->spi = spi;
1227
1228 udc->remote_wkp = 0;
1229
1230 /* Setup gadget structure */
1231 udc->gadget.ops = &max3420_udc_ops;
1232 udc->gadget.max_speed = USB_SPEED_FULL;
1233 udc->gadget.speed = USB_SPEED_UNKNOWN;
1234 udc->gadget.ep0 = &udc->ep[0].ep_usb;
1235 udc->gadget.name = driver_name;
1236
1237 spin_lock_init(&udc->lock);
1238 mutex_init(&udc->spi_bus_mutex);
1239
1240 udc->ep0req.ep = &udc->ep[0];
1241 udc->ep0req.usb_req.buf = udc->ep0buf;
1242 INIT_LIST_HEAD(&udc->ep0req.queue);
1243
1244 /* setup Endpoints */
1245 max3420_eps_init(udc);
1246
1247 /* configure SPI */
1248 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 8);
1249 spi_wr8(udc, MAX3420_REG_PINCTL, FDUPSPI);
1250
1251 err = usb_add_gadget_udc(&spi->dev, &udc->gadget);
1252 if (err)
1253 return err;
1254
1255 udc->dev = &udc->gadget.dev;
1256
1257 spi_set_drvdata(spi, udc);
1258
1259 irq = of_irq_get_byname(spi->dev.of_node, "udc");
1260 err = devm_request_irq(&spi->dev, irq, max3420_irq_handler, 0,
1261 "max3420", udc);
1262 if (err < 0)
1263 return err;
1264
1265 udc->thread_task = kthread_create(max3420_thread, udc,
1266 "max3420-thread");
1267 if (IS_ERR(udc->thread_task))
1268 return PTR_ERR(udc->thread_task);
1269
1270 irq = of_irq_get_byname(spi->dev.of_node, "vbus");
1271 if (irq <= 0) { /* no vbus irq implies self-powered design */
1272 udc->is_selfpowered = 1;
1273 udc->vbus_active = true;
1274 udc->todo |= UDC_START;
1275 usb_udc_vbus_handler(&udc->gadget, udc->vbus_active);
1276 usb_gadget_set_state(&udc->gadget, USB_STATE_POWERED);
1277 max3420_start(udc);
1278 } else {
1279 udc->is_selfpowered = 0;
1280 /* Detect current vbus status */
1281 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 8);
1282 if (reg[7] != 0xff)
1283 udc->vbus_active = true;
1284
1285 err = devm_request_irq(&spi->dev, irq,
1286 max3420_vbus_handler, 0, "vbus", udc);
1287 if (err < 0)
1288 return err;
1289 }
1290
1291 return 0;
1292 }
1293
max3420_remove(struct spi_device * spi)1294 static int max3420_remove(struct spi_device *spi)
1295 {
1296 struct max3420_udc *udc = spi_get_drvdata(spi);
1297 unsigned long flags;
1298
1299 usb_del_gadget_udc(&udc->gadget);
1300
1301 spin_lock_irqsave(&udc->lock, flags);
1302
1303 kthread_stop(udc->thread_task);
1304
1305 spin_unlock_irqrestore(&udc->lock, flags);
1306
1307 return 0;
1308 }
1309
1310 static const struct of_device_id max3420_udc_of_match[] = {
1311 { .compatible = "maxim,max3420-udc"},
1312 { .compatible = "maxim,max3421-udc"},
1313 {},
1314 };
1315 MODULE_DEVICE_TABLE(of, max3420_udc_of_match);
1316
1317 static struct spi_driver max3420_driver = {
1318 .driver = {
1319 .name = "max3420-udc",
1320 .of_match_table = of_match_ptr(max3420_udc_of_match),
1321 },
1322 .probe = max3420_probe,
1323 .remove = max3420_remove,
1324 };
1325
1326 module_spi_driver(max3420_driver);
1327
1328 MODULE_DESCRIPTION(DRIVER_DESC);
1329 MODULE_AUTHOR("Jassi Brar <jaswinder.singh@linaro.org>");
1330 MODULE_LICENSE("GPL");
1331
