1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) ST-Ericsson SA 2010
4  *
5  * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson.
6  */
7 /*
8  * AB8500 register access
9  * ======================
10  *
11  * read:
12  * # echo BANK  >  <debugfs>/ab8500/register-bank
13  * # echo ADDR  >  <debugfs>/ab8500/register-address
14  * # cat <debugfs>/ab8500/register-value
15  *
16  * write:
17  * # echo BANK  >  <debugfs>/ab8500/register-bank
18  * # echo ADDR  >  <debugfs>/ab8500/register-address
19  * # echo VALUE >  <debugfs>/ab8500/register-value
20  *
21  * read all registers from a bank:
22  * # echo BANK  >  <debugfs>/ab8500/register-bank
23  * # cat <debugfs>/ab8500/all-bank-register
24  *
25  * BANK   target AB8500 register bank
26  * ADDR   target AB8500 register address
27  * VALUE  decimal or 0x-prefixed hexadecimal
28  *
29  *
30  * User Space notification on AB8500 IRQ
31  * =====================================
32  *
33  * Allows user space entity to be notified when target AB8500 IRQ occurs.
34  * When subscribed, a sysfs entry is created in ab8500.i2c platform device.
35  * One can pool this file to get target IRQ occurence information.
36  *
37  * subscribe to an AB8500 IRQ:
38  * # echo IRQ  >  <debugfs>/ab8500/irq-subscribe
39  *
40  * unsubscribe from an AB8500 IRQ:
41  * # echo IRQ  >  <debugfs>/ab8500/irq-unsubscribe
42  *
43  *
44  * AB8500 register formated read/write access
45  * ==========================================
46  *
47  * Read:  read data, data>>SHIFT, data&=MASK, output data
48  *        [0xABCDEF98] shift=12 mask=0xFFF => 0x00000CDE
49  * Write: read data, data &= ~(MASK<<SHIFT), data |= (VALUE<<SHIFT), write data
50  *        [0xABCDEF98] shift=12 mask=0xFFF value=0x123 => [0xAB123F98]
51  *
52  * Usage:
53  * # echo "CMD [OPTIONS] BANK ADRESS [VALUE]" > $debugfs/ab8500/hwreg
54  *
55  * CMD      read      read access
56  *          write     write access
57  *
58  * BANK     target reg bank
59  * ADDRESS  target reg address
60  * VALUE    (write) value to be updated
61  *
62  * OPTIONS
63  *  -d|-dec            (read) output in decimal
64  *  -h|-hexa           (read) output in 0x-hexa (default)
65  *  -l|-w|-b           32bit (default), 16bit or 8bit reg access
66  *  -m|-mask MASK      0x-hexa mask (default 0xFFFFFFFF)
67  *  -s|-shift SHIFT    bit shift value (read:left, write:right)
68  *  -o|-offset OFFSET  address offset to add to ADDRESS value
69  *
70  * Warning: bit shift operation is applied to bit-mask.
71  * Warning: bit shift direction depends on read or right command.
72  */
73 
74 #include <linux/seq_file.h>
75 #include <linux/uaccess.h>
76 #include <linux/fs.h>
77 #include <linux/init.h>
78 #include <linux/debugfs.h>
79 #include <linux/platform_device.h>
80 #include <linux/interrupt.h>
81 #include <linux/kobject.h>
82 #include <linux/slab.h>
83 #include <linux/irq.h>
84 
85 #include <linux/mfd/abx500.h>
86 #include <linux/mfd/abx500/ab8500.h>
87 
88 #ifdef CONFIG_DEBUG_FS
89 #include <linux/string.h>
90 #include <linux/ctype.h>
91 #endif
92 
93 static u32 debug_bank;
94 static u32 debug_address;
95 
96 static int irq_ab8500;
97 static int irq_first;
98 static int irq_last;
99 static u32 *irq_count;
100 static int num_irqs;
101 
102 static struct device_attribute **dev_attr;
103 static char **event_name;
104 
105 /**
106  * struct ab8500_reg_range
107  * @first: the first address of the range
108  * @last: the last address of the range
109  * @perm: access permissions for the range
110  */
111 struct ab8500_reg_range {
112 	u8 first;
113 	u8 last;
114 	u8 perm;
115 };
116 
117 /**
118  * struct ab8500_prcmu_ranges
119  * @num_ranges: the number of ranges in the list
120  * @bankid: bank identifier
121  * @range: the list of register ranges
122  */
123 struct ab8500_prcmu_ranges {
124 	u8 num_ranges;
125 	u8 bankid;
126 	const struct ab8500_reg_range *range;
127 };
128 
129 /* hwreg- "mask" and "shift" entries ressources */
130 struct hwreg_cfg {
131 	u32  bank;      /* target bank */
132 	unsigned long addr;      /* target address */
133 	uint fmt;       /* format */
134 	unsigned long mask; /* read/write mask, applied before any bit shift */
135 	long shift;     /* bit shift (read:right shift, write:left shift */
136 };
137 /* fmt bit #0: 0=hexa, 1=dec */
138 #define REG_FMT_DEC(c) ((c)->fmt & 0x1)
139 #define REG_FMT_HEX(c) (!REG_FMT_DEC(c))
140 
141 static struct hwreg_cfg hwreg_cfg = {
142 	.addr = 0,			/* default: invalid phys addr */
143 	.fmt = 0,			/* default: 32bit access, hex output */
144 	.mask = 0xFFFFFFFF,	/* default: no mask */
145 	.shift = 0,			/* default: no bit shift */
146 };
147 
148 #define AB8500_NAME_STRING "ab8500"
149 #define AB8500_NUM_BANKS AB8500_DEBUG_FIELD_LAST
150 
151 #define AB8500_REV_REG 0x80
152 
153 static struct ab8500_prcmu_ranges *debug_ranges;
154 
155 static struct ab8500_prcmu_ranges ab8500_debug_ranges[AB8500_NUM_BANKS] = {
156 	[AB8500_M_FSM_RANK] = {
157 		.num_ranges = 0,
158 		.range = NULL,
159 	},
160 	[AB8500_SYS_CTRL1_BLOCK] = {
161 		.num_ranges = 3,
162 		.range = (struct ab8500_reg_range[]) {
163 			{
164 				.first = 0x00,
165 				.last = 0x02,
166 			},
167 			{
168 				.first = 0x42,
169 				.last = 0x42,
170 			},
171 			{
172 				.first = 0x80,
173 				.last = 0x81,
174 			},
175 		},
176 	},
177 	[AB8500_SYS_CTRL2_BLOCK] = {
178 		.num_ranges = 4,
179 		.range = (struct ab8500_reg_range[]) {
180 			{
181 				.first = 0x00,
182 				.last = 0x0D,
183 			},
184 			{
185 				.first = 0x0F,
186 				.last = 0x17,
187 			},
188 			{
189 				.first = 0x30,
190 				.last = 0x30,
191 			},
192 			{
193 				.first = 0x32,
194 				.last = 0x33,
195 			},
196 		},
197 	},
198 	[AB8500_REGU_CTRL1] = {
199 		.num_ranges = 3,
200 		.range = (struct ab8500_reg_range[]) {
201 			{
202 				.first = 0x00,
203 				.last = 0x00,
204 			},
205 			{
206 				.first = 0x03,
207 				.last = 0x10,
208 			},
209 			{
210 				.first = 0x80,
211 				.last = 0x84,
212 			},
213 		},
214 	},
215 	[AB8500_REGU_CTRL2] = {
216 		.num_ranges = 5,
217 		.range = (struct ab8500_reg_range[]) {
218 			{
219 				.first = 0x00,
220 				.last = 0x15,
221 			},
222 			{
223 				.first = 0x17,
224 				.last = 0x19,
225 			},
226 			{
227 				.first = 0x1B,
228 				.last = 0x1D,
229 			},
230 			{
231 				.first = 0x1F,
232 				.last = 0x22,
233 			},
234 			{
235 				.first = 0x40,
236 				.last = 0x44,
237 			},
238 			/*
239 			 * 0x80-0x8B are SIM registers and should
240 			 * not be accessed from here
241 			 */
242 		},
243 	},
244 	[AB8500_USB] = {
245 		.num_ranges = 2,
246 		.range = (struct ab8500_reg_range[]) {
247 			{
248 				.first = 0x80,
249 				.last = 0x83,
250 			},
251 			{
252 				.first = 0x87,
253 				.last = 0x8A,
254 			},
255 		},
256 	},
257 	[AB8500_TVOUT] = {
258 		.num_ranges = 9,
259 		.range = (struct ab8500_reg_range[]) {
260 			{
261 				.first = 0x00,
262 				.last = 0x12,
263 			},
264 			{
265 				.first = 0x15,
266 				.last = 0x17,
267 			},
268 			{
269 				.first = 0x19,
270 				.last = 0x21,
271 			},
272 			{
273 				.first = 0x27,
274 				.last = 0x2C,
275 			},
276 			{
277 				.first = 0x41,
278 				.last = 0x41,
279 			},
280 			{
281 				.first = 0x45,
282 				.last = 0x5B,
283 			},
284 			{
285 				.first = 0x5D,
286 				.last = 0x5D,
287 			},
288 			{
289 				.first = 0x69,
290 				.last = 0x69,
291 			},
292 			{
293 				.first = 0x80,
294 				.last = 0x81,
295 			},
296 		},
297 	},
298 	[AB8500_DBI] = {
299 		.num_ranges = 0,
300 		.range = NULL,
301 	},
302 	[AB8500_ECI_AV_ACC] = {
303 		.num_ranges = 1,
304 		.range = (struct ab8500_reg_range[]) {
305 			{
306 				.first = 0x80,
307 				.last = 0x82,
308 			},
309 		},
310 	},
311 	[AB8500_RESERVED] = {
312 		.num_ranges = 0,
313 		.range = NULL,
314 	},
315 	[AB8500_GPADC] = {
316 		.num_ranges = 1,
317 		.range = (struct ab8500_reg_range[]) {
318 			{
319 				.first = 0x00,
320 				.last = 0x08,
321 			},
322 		},
323 	},
324 	[AB8500_CHARGER] = {
325 		.num_ranges = 9,
326 		.range = (struct ab8500_reg_range[]) {
327 			{
328 				.first = 0x00,
329 				.last = 0x03,
330 			},
331 			{
332 				.first = 0x05,
333 				.last = 0x05,
334 			},
335 			{
336 				.first = 0x40,
337 				.last = 0x40,
338 			},
339 			{
340 				.first = 0x42,
341 				.last = 0x42,
342 			},
343 			{
344 				.first = 0x44,
345 				.last = 0x44,
346 			},
347 			{
348 				.first = 0x50,
349 				.last = 0x55,
350 			},
351 			{
352 				.first = 0x80,
353 				.last = 0x82,
354 			},
355 			{
356 				.first = 0xC0,
357 				.last = 0xC2,
358 			},
359 			{
360 				.first = 0xf5,
361 				.last = 0xf6,
362 			},
363 		},
364 	},
365 	[AB8500_GAS_GAUGE] = {
366 		.num_ranges = 3,
367 		.range = (struct ab8500_reg_range[]) {
368 			{
369 				.first = 0x00,
370 				.last = 0x00,
371 			},
372 			{
373 				.first = 0x07,
374 				.last = 0x0A,
375 			},
376 			{
377 				.first = 0x10,
378 				.last = 0x14,
379 			},
380 		},
381 	},
382 	[AB8500_AUDIO] = {
383 		.num_ranges = 1,
384 		.range = (struct ab8500_reg_range[]) {
385 			{
386 				.first = 0x00,
387 				.last = 0x6F,
388 			},
389 		},
390 	},
391 	[AB8500_INTERRUPT] = {
392 		.num_ranges = 0,
393 		.range = NULL,
394 	},
395 	[AB8500_RTC] = {
396 		.num_ranges = 1,
397 		.range = (struct ab8500_reg_range[]) {
398 			{
399 				.first = 0x00,
400 				.last = 0x0F,
401 			},
402 		},
403 	},
404 	[AB8500_MISC] = {
405 		.num_ranges = 8,
406 		.range = (struct ab8500_reg_range[]) {
407 			{
408 				.first = 0x00,
409 				.last = 0x05,
410 			},
411 			{
412 				.first = 0x10,
413 				.last = 0x15,
414 			},
415 			{
416 				.first = 0x20,
417 				.last = 0x25,
418 			},
419 			{
420 				.first = 0x30,
421 				.last = 0x35,
422 			},
423 			{
424 				.first = 0x40,
425 				.last = 0x45,
426 			},
427 			{
428 				.first = 0x50,
429 				.last = 0x50,
430 			},
431 			{
432 				.first = 0x60,
433 				.last = 0x67,
434 			},
435 			{
436 				.first = 0x80,
437 				.last = 0x80,
438 			},
439 		},
440 	},
441 	[AB8500_DEVELOPMENT] = {
442 		.num_ranges = 1,
443 		.range = (struct ab8500_reg_range[]) {
444 			{
445 				.first = 0x00,
446 				.last = 0x00,
447 			},
448 		},
449 	},
450 	[AB8500_DEBUG] = {
451 		.num_ranges = 1,
452 		.range = (struct ab8500_reg_range[]) {
453 			{
454 				.first = 0x05,
455 				.last = 0x07,
456 			},
457 		},
458 	},
459 	[AB8500_PROD_TEST] = {
460 		.num_ranges = 0,
461 		.range = NULL,
462 	},
463 	[AB8500_STE_TEST] = {
464 		.num_ranges = 0,
465 		.range = NULL,
466 	},
467 	[AB8500_OTP_EMUL] = {
468 		.num_ranges = 1,
469 		.range = (struct ab8500_reg_range[]) {
470 			{
471 				.first = 0x01,
472 				.last = 0x0F,
473 			},
474 		},
475 	},
476 };
477 
478 static struct ab8500_prcmu_ranges ab8505_debug_ranges[AB8500_NUM_BANKS] = {
479 	[0x0] = {
480 		.num_ranges = 0,
481 		.range = NULL,
482 	},
483 	[AB8500_SYS_CTRL1_BLOCK] = {
484 		.num_ranges = 5,
485 		.range = (struct ab8500_reg_range[]) {
486 			{
487 				.first = 0x00,
488 				.last = 0x04,
489 			},
490 			{
491 				.first = 0x42,
492 				.last = 0x42,
493 			},
494 			{
495 				.first = 0x52,
496 				.last = 0x52,
497 			},
498 			{
499 				.first = 0x54,
500 				.last = 0x57,
501 			},
502 			{
503 				.first = 0x80,
504 				.last = 0x83,
505 			},
506 		},
507 	},
508 	[AB8500_SYS_CTRL2_BLOCK] = {
509 		.num_ranges = 5,
510 		.range = (struct ab8500_reg_range[]) {
511 			{
512 				.first = 0x00,
513 				.last = 0x0D,
514 			},
515 			{
516 				.first = 0x0F,
517 				.last = 0x17,
518 			},
519 			{
520 				.first = 0x20,
521 				.last = 0x20,
522 			},
523 			{
524 				.first = 0x30,
525 				.last = 0x30,
526 			},
527 			{
528 				.first = 0x32,
529 				.last = 0x3A,
530 			},
531 		},
532 	},
533 	[AB8500_REGU_CTRL1] = {
534 		.num_ranges = 3,
535 		.range = (struct ab8500_reg_range[]) {
536 			{
537 				.first = 0x00,
538 				.last = 0x00,
539 			},
540 			{
541 				.first = 0x03,
542 				.last = 0x11,
543 			},
544 			{
545 				.first = 0x80,
546 				.last = 0x86,
547 			},
548 		},
549 	},
550 	[AB8500_REGU_CTRL2] = {
551 		.num_ranges = 6,
552 		.range = (struct ab8500_reg_range[]) {
553 			{
554 				.first = 0x00,
555 				.last = 0x06,
556 			},
557 			{
558 				.first = 0x08,
559 				.last = 0x15,
560 			},
561 			{
562 				.first = 0x17,
563 				.last = 0x19,
564 			},
565 			{
566 				.first = 0x1B,
567 				.last = 0x1D,
568 			},
569 			{
570 				.first = 0x1F,
571 				.last = 0x30,
572 			},
573 			{
574 				.first = 0x40,
575 				.last = 0x48,
576 			},
577 			/*
578 			 * 0x80-0x8B are SIM registers and should
579 			 * not be accessed from here
580 			 */
581 		},
582 	},
583 	[AB8500_USB] = {
584 		.num_ranges = 3,
585 		.range = (struct ab8500_reg_range[]) {
586 			{
587 				.first = 0x80,
588 				.last = 0x83,
589 			},
590 			{
591 				.first = 0x87,
592 				.last = 0x8A,
593 			},
594 			{
595 				.first = 0x91,
596 				.last = 0x94,
597 			},
598 		},
599 	},
600 	[AB8500_TVOUT] = {
601 		.num_ranges = 0,
602 		.range = NULL,
603 	},
604 	[AB8500_DBI] = {
605 		.num_ranges = 0,
606 		.range = NULL,
607 	},
608 	[AB8500_ECI_AV_ACC] = {
609 		.num_ranges = 1,
610 		.range = (struct ab8500_reg_range[]) {
611 			{
612 				.first = 0x80,
613 				.last = 0x82,
614 			},
615 		},
616 	},
617 	[AB8500_RESERVED] = {
618 		.num_ranges = 0,
619 		.range = NULL,
620 	},
621 	[AB8500_GPADC] = {
622 		.num_ranges = 1,
623 		.range = (struct ab8500_reg_range[]) {
624 			{
625 				.first = 0x00,
626 				.last = 0x08,
627 			},
628 		},
629 	},
630 	[AB8500_CHARGER] = {
631 		.num_ranges = 9,
632 		.range = (struct ab8500_reg_range[]) {
633 			{
634 				.first = 0x02,
635 				.last = 0x03,
636 			},
637 			{
638 				.first = 0x05,
639 				.last = 0x05,
640 			},
641 			{
642 				.first = 0x40,
643 				.last = 0x44,
644 			},
645 			{
646 				.first = 0x50,
647 				.last = 0x57,
648 			},
649 			{
650 				.first = 0x60,
651 				.last = 0x60,
652 			},
653 			{
654 				.first = 0xA0,
655 				.last = 0xA7,
656 			},
657 			{
658 				.first = 0xAF,
659 				.last = 0xB2,
660 			},
661 			{
662 				.first = 0xC0,
663 				.last = 0xC2,
664 			},
665 			{
666 				.first = 0xF5,
667 				.last = 0xF5,
668 			},
669 		},
670 	},
671 	[AB8500_GAS_GAUGE] = {
672 		.num_ranges = 3,
673 		.range = (struct ab8500_reg_range[]) {
674 			{
675 				.first = 0x00,
676 				.last = 0x00,
677 			},
678 			{
679 				.first = 0x07,
680 				.last = 0x0A,
681 			},
682 			{
683 				.first = 0x10,
684 				.last = 0x14,
685 			},
686 		},
687 	},
688 	[AB8500_AUDIO] = {
689 		.num_ranges = 1,
690 		.range = (struct ab8500_reg_range[]) {
691 			{
692 				.first = 0x00,
693 				.last = 0x83,
694 			},
695 		},
696 	},
697 	[AB8500_INTERRUPT] = {
698 		.num_ranges = 11,
699 		.range = (struct ab8500_reg_range[]) {
700 			{
701 				.first = 0x00,
702 				.last = 0x04,
703 			},
704 			{
705 				.first = 0x06,
706 				.last = 0x07,
707 			},
708 			{
709 				.first = 0x09,
710 				.last = 0x09,
711 			},
712 			{
713 				.first = 0x0B,
714 				.last = 0x0C,
715 			},
716 			{
717 				.first = 0x12,
718 				.last = 0x15,
719 			},
720 			{
721 				.first = 0x18,
722 				.last = 0x18,
723 			},
724 			/* Latch registers should not be read here */
725 			{
726 				.first = 0x40,
727 				.last = 0x44,
728 			},
729 			{
730 				.first = 0x46,
731 				.last = 0x49,
732 			},
733 			{
734 				.first = 0x4B,
735 				.last = 0x4D,
736 			},
737 			{
738 				.first = 0x52,
739 				.last = 0x55,
740 			},
741 			{
742 				.first = 0x58,
743 				.last = 0x58,
744 			},
745 			/* LatchHier registers should not be read here */
746 		},
747 	},
748 	[AB8500_RTC] = {
749 		.num_ranges = 2,
750 		.range = (struct ab8500_reg_range[]) {
751 			{
752 				.first = 0x00,
753 				.last = 0x14,
754 			},
755 			{
756 				.first = 0x16,
757 				.last = 0x17,
758 			},
759 		},
760 	},
761 	[AB8500_MISC] = {
762 		.num_ranges = 8,
763 		.range = (struct ab8500_reg_range[]) {
764 			{
765 				.first = 0x00,
766 				.last = 0x06,
767 			},
768 			{
769 				.first = 0x10,
770 				.last = 0x16,
771 			},
772 			{
773 				.first = 0x20,
774 				.last = 0x26,
775 			},
776 			{
777 				.first = 0x30,
778 				.last = 0x36,
779 			},
780 			{
781 				.first = 0x40,
782 				.last = 0x46,
783 			},
784 			{
785 				.first = 0x50,
786 				.last = 0x50,
787 			},
788 			{
789 				.first = 0x60,
790 				.last = 0x6B,
791 			},
792 			{
793 				.first = 0x80,
794 				.last = 0x82,
795 			},
796 		},
797 	},
798 	[AB8500_DEVELOPMENT] = {
799 		.num_ranges = 2,
800 		.range = (struct ab8500_reg_range[]) {
801 			{
802 				.first = 0x00,
803 				.last = 0x00,
804 			},
805 			{
806 				.first = 0x05,
807 				.last = 0x05,
808 			},
809 		},
810 	},
811 	[AB8500_DEBUG] = {
812 		.num_ranges = 1,
813 		.range = (struct ab8500_reg_range[]) {
814 			{
815 				.first = 0x05,
816 				.last = 0x07,
817 			},
818 		},
819 	},
820 	[AB8500_PROD_TEST] = {
821 		.num_ranges = 0,
822 		.range = NULL,
823 	},
824 	[AB8500_STE_TEST] = {
825 		.num_ranges = 0,
826 		.range = NULL,
827 	},
828 	[AB8500_OTP_EMUL] = {
829 		.num_ranges = 1,
830 		.range = (struct ab8500_reg_range[]) {
831 			{
832 				.first = 0x01,
833 				.last = 0x15,
834 			},
835 		},
836 	},
837 };
838 
839 static struct ab8500_prcmu_ranges ab8540_debug_ranges[AB8500_NUM_BANKS] = {
840 	[AB8500_M_FSM_RANK] = {
841 		.num_ranges = 1,
842 		.range = (struct ab8500_reg_range[]) {
843 			{
844 				.first = 0x00,
845 				.last = 0x0B,
846 			},
847 		},
848 	},
849 	[AB8500_SYS_CTRL1_BLOCK] = {
850 		.num_ranges = 6,
851 		.range = (struct ab8500_reg_range[]) {
852 			{
853 				.first = 0x00,
854 				.last = 0x04,
855 			},
856 			{
857 				.first = 0x42,
858 				.last = 0x42,
859 			},
860 			{
861 				.first = 0x50,
862 				.last = 0x54,
863 			},
864 			{
865 				.first = 0x57,
866 				.last = 0x57,
867 			},
868 			{
869 				.first = 0x80,
870 				.last = 0x83,
871 			},
872 			{
873 				.first = 0x90,
874 				.last = 0x90,
875 			},
876 		},
877 	},
878 	[AB8500_SYS_CTRL2_BLOCK] = {
879 		.num_ranges = 5,
880 		.range = (struct ab8500_reg_range[]) {
881 			{
882 				.first = 0x00,
883 				.last = 0x0D,
884 			},
885 			{
886 				.first = 0x0F,
887 				.last = 0x10,
888 			},
889 			{
890 				.first = 0x20,
891 				.last = 0x21,
892 			},
893 			{
894 				.first = 0x32,
895 				.last = 0x3C,
896 			},
897 			{
898 				.first = 0x40,
899 				.last = 0x42,
900 			},
901 		},
902 	},
903 	[AB8500_REGU_CTRL1] = {
904 		.num_ranges = 4,
905 		.range = (struct ab8500_reg_range[]) {
906 			{
907 				.first = 0x03,
908 				.last = 0x15,
909 			},
910 			{
911 				.first = 0x20,
912 				.last = 0x20,
913 			},
914 			{
915 				.first = 0x80,
916 				.last = 0x85,
917 			},
918 			{
919 				.first = 0x87,
920 				.last = 0x88,
921 			},
922 		},
923 	},
924 	[AB8500_REGU_CTRL2] = {
925 		.num_ranges = 8,
926 		.range = (struct ab8500_reg_range[]) {
927 			{
928 				.first = 0x00,
929 				.last = 0x06,
930 			},
931 			{
932 				.first = 0x08,
933 				.last = 0x15,
934 			},
935 			{
936 				.first = 0x17,
937 				.last = 0x19,
938 			},
939 			{
940 				.first = 0x1B,
941 				.last = 0x1D,
942 			},
943 			{
944 				.first = 0x1F,
945 				.last = 0x2F,
946 			},
947 			{
948 				.first = 0x31,
949 				.last = 0x3A,
950 			},
951 			{
952 				.first = 0x43,
953 				.last = 0x44,
954 			},
955 			{
956 				.first = 0x48,
957 				.last = 0x49,
958 			},
959 		},
960 	},
961 	[AB8500_USB] = {
962 		.num_ranges = 3,
963 		.range = (struct ab8500_reg_range[]) {
964 			{
965 				.first = 0x80,
966 				.last = 0x83,
967 			},
968 			{
969 				.first = 0x87,
970 				.last = 0x8A,
971 			},
972 			{
973 				.first = 0x91,
974 				.last = 0x94,
975 			},
976 		},
977 	},
978 	[AB8500_TVOUT] = {
979 		.num_ranges = 0,
980 		.range = NULL
981 	},
982 	[AB8500_DBI] = {
983 		.num_ranges = 4,
984 		.range = (struct ab8500_reg_range[]) {
985 			{
986 				.first = 0x00,
987 				.last = 0x07,
988 			},
989 			{
990 				.first = 0x10,
991 				.last = 0x11,
992 			},
993 			{
994 				.first = 0x20,
995 				.last = 0x21,
996 			},
997 			{
998 				.first = 0x30,
999 				.last = 0x43,
1000 			},
1001 		},
1002 	},
1003 	[AB8500_ECI_AV_ACC] = {
1004 		.num_ranges = 2,
1005 		.range = (struct ab8500_reg_range[]) {
1006 			{
1007 				.first = 0x00,
1008 				.last = 0x03,
1009 			},
1010 			{
1011 				.first = 0x80,
1012 				.last = 0x82,
1013 			},
1014 		},
1015 	},
1016 	[AB8500_RESERVED] = {
1017 		.num_ranges = 0,
1018 		.range = NULL,
1019 	},
1020 	[AB8500_GPADC] = {
1021 		.num_ranges = 4,
1022 		.range = (struct ab8500_reg_range[]) {
1023 			{
1024 				.first = 0x00,
1025 				.last = 0x01,
1026 			},
1027 			{
1028 				.first = 0x04,
1029 				.last = 0x06,
1030 			},
1031 			{
1032 				.first = 0x09,
1033 				.last = 0x0A,
1034 			},
1035 			{
1036 				.first = 0x10,
1037 				.last = 0x14,
1038 			},
1039 		},
1040 	},
1041 	[AB8500_CHARGER] = {
1042 		.num_ranges = 10,
1043 		.range = (struct ab8500_reg_range[]) {
1044 			{
1045 				.first = 0x00,
1046 				.last = 0x00,
1047 			},
1048 			{
1049 				.first = 0x02,
1050 				.last = 0x05,
1051 			},
1052 			{
1053 				.first = 0x40,
1054 				.last = 0x44,
1055 			},
1056 			{
1057 				.first = 0x50,
1058 				.last = 0x57,
1059 			},
1060 			{
1061 				.first = 0x60,
1062 				.last = 0x60,
1063 			},
1064 			{
1065 				.first = 0x70,
1066 				.last = 0x70,
1067 			},
1068 			{
1069 				.first = 0xA0,
1070 				.last = 0xA9,
1071 			},
1072 			{
1073 				.first = 0xAF,
1074 				.last = 0xB2,
1075 			},
1076 			{
1077 				.first = 0xC0,
1078 				.last = 0xC6,
1079 			},
1080 			{
1081 				.first = 0xF5,
1082 				.last = 0xF5,
1083 			},
1084 		},
1085 	},
1086 	[AB8500_GAS_GAUGE] = {
1087 		.num_ranges = 3,
1088 		.range = (struct ab8500_reg_range[]) {
1089 			{
1090 				.first = 0x00,
1091 				.last = 0x00,
1092 			},
1093 			{
1094 				.first = 0x07,
1095 				.last = 0x0A,
1096 			},
1097 			{
1098 				.first = 0x10,
1099 				.last = 0x14,
1100 			},
1101 		},
1102 	},
1103 	[AB8500_AUDIO] = {
1104 		.num_ranges = 1,
1105 		.range = (struct ab8500_reg_range[]) {
1106 			{
1107 				.first = 0x00,
1108 				.last = 0x9f,
1109 			},
1110 		},
1111 	},
1112 	[AB8500_INTERRUPT] = {
1113 		.num_ranges = 6,
1114 		.range = (struct ab8500_reg_range[]) {
1115 			{
1116 				.first = 0x00,
1117 				.last = 0x05,
1118 			},
1119 			{
1120 				.first = 0x0B,
1121 				.last = 0x0D,
1122 			},
1123 			{
1124 				.first = 0x12,
1125 				.last = 0x20,
1126 			},
1127 			/* Latch registers should not be read here */
1128 			{
1129 				.first = 0x40,
1130 				.last = 0x45,
1131 			},
1132 			{
1133 				.first = 0x4B,
1134 				.last = 0x4D,
1135 			},
1136 			{
1137 				.first = 0x52,
1138 				.last = 0x60,
1139 			},
1140 			/* LatchHier registers should not be read here */
1141 		},
1142 	},
1143 	[AB8500_RTC] = {
1144 		.num_ranges = 3,
1145 		.range = (struct ab8500_reg_range[]) {
1146 			{
1147 				.first = 0x00,
1148 				.last = 0x07,
1149 			},
1150 			{
1151 				.first = 0x0B,
1152 				.last = 0x18,
1153 			},
1154 			{
1155 				.first = 0x20,
1156 				.last = 0x25,
1157 			},
1158 		},
1159 	},
1160 	[AB8500_MISC] = {
1161 		.num_ranges = 9,
1162 		.range = (struct ab8500_reg_range[]) {
1163 			{
1164 				.first = 0x00,
1165 				.last = 0x06,
1166 			},
1167 			{
1168 				.first = 0x10,
1169 				.last = 0x16,
1170 			},
1171 			{
1172 				.first = 0x20,
1173 				.last = 0x26,
1174 			},
1175 			{
1176 				.first = 0x30,
1177 				.last = 0x36,
1178 			},
1179 			{
1180 				.first = 0x40,
1181 				.last = 0x49,
1182 			},
1183 			{
1184 				.first = 0x50,
1185 				.last = 0x50,
1186 			},
1187 			{
1188 				.first = 0x60,
1189 				.last = 0x6B,
1190 			},
1191 			{
1192 				.first = 0x70,
1193 				.last = 0x74,
1194 			},
1195 			{
1196 				.first = 0x80,
1197 				.last = 0x82,
1198 			},
1199 		},
1200 	},
1201 	[AB8500_DEVELOPMENT] = {
1202 		.num_ranges = 3,
1203 		.range = (struct ab8500_reg_range[]) {
1204 			{
1205 				.first = 0x00,
1206 				.last = 0x01,
1207 			},
1208 			{
1209 				.first = 0x06,
1210 				.last = 0x06,
1211 			},
1212 			{
1213 				.first = 0x10,
1214 				.last = 0x21,
1215 			},
1216 		},
1217 	},
1218 	[AB8500_DEBUG] = {
1219 		.num_ranges = 3,
1220 		.range = (struct ab8500_reg_range[]) {
1221 			{
1222 				.first = 0x01,
1223 				.last = 0x0C,
1224 			},
1225 			{
1226 				.first = 0x0E,
1227 				.last = 0x11,
1228 			},
1229 			{
1230 				.first = 0x80,
1231 				.last = 0x81,
1232 			},
1233 		},
1234 	},
1235 	[AB8500_PROD_TEST] = {
1236 		.num_ranges = 0,
1237 		.range = NULL,
1238 	},
1239 	[AB8500_STE_TEST] = {
1240 		.num_ranges = 0,
1241 		.range = NULL,
1242 	},
1243 	[AB8500_OTP_EMUL] = {
1244 		.num_ranges = 1,
1245 		.range = (struct ab8500_reg_range[]) {
1246 			{
1247 				.first = 0x00,
1248 				.last = 0x3F,
1249 			},
1250 		},
1251 	},
1252 };
1253 
ab8500_debug_handler(int irq,void * data)1254 static irqreturn_t ab8500_debug_handler(int irq, void *data)
1255 {
1256 	char buf[16];
1257 	struct kobject *kobj = (struct kobject *)data;
1258 	unsigned int irq_abb = irq - irq_first;
1259 
1260 	if (irq_abb < num_irqs)
1261 		irq_count[irq_abb]++;
1262 	/*
1263 	 * This makes it possible to use poll for events (EPOLLPRI | EPOLLERR)
1264 	 * from userspace on sysfs file named <irq-nr>
1265 	 */
1266 	sprintf(buf, "%d", irq);
1267 	sysfs_notify(kobj, NULL, buf);
1268 
1269 	return IRQ_HANDLED;
1270 }
1271 
1272 /* Prints to seq_file or log_buf */
ab8500_registers_print(struct device * dev,u32 bank,struct seq_file * s)1273 static int ab8500_registers_print(struct device *dev, u32 bank,
1274 				  struct seq_file *s)
1275 {
1276 	unsigned int i;
1277 
1278 	for (i = 0; i < debug_ranges[bank].num_ranges; i++) {
1279 		u32 reg;
1280 
1281 		for (reg = debug_ranges[bank].range[i].first;
1282 			reg <= debug_ranges[bank].range[i].last;
1283 			reg++) {
1284 			u8 value;
1285 			int err;
1286 
1287 			err = abx500_get_register_interruptible(dev,
1288 				(u8)bank, (u8)reg, &value);
1289 			if (err < 0) {
1290 				dev_err(dev, "ab->read fail %d\n", err);
1291 				return err;
1292 			}
1293 
1294 			if (s) {
1295 				seq_printf(s, "  [0x%02X/0x%02X]: 0x%02X\n",
1296 					   bank, reg, value);
1297 				/*
1298 				 * Error is not returned here since
1299 				 * the output is wanted in any case
1300 				 */
1301 				if (seq_has_overflowed(s))
1302 					return 0;
1303 			} else {
1304 				dev_info(dev, " [0x%02X/0x%02X]: 0x%02X\n",
1305 					 bank, reg, value);
1306 			}
1307 		}
1308 	}
1309 
1310 	return 0;
1311 }
1312 
ab8500_bank_registers_show(struct seq_file * s,void * p)1313 static int ab8500_bank_registers_show(struct seq_file *s, void *p)
1314 {
1315 	struct device *dev = s->private;
1316 	u32 bank = debug_bank;
1317 
1318 	seq_puts(s, AB8500_NAME_STRING " register values:\n");
1319 
1320 	seq_printf(s, " bank 0x%02X:\n", bank);
1321 
1322 	return ab8500_registers_print(dev, bank, s);
1323 }
1324 
1325 DEFINE_SHOW_ATTRIBUTE(ab8500_bank_registers);
1326 
ab8500_print_all_banks(struct seq_file * s,void * p)1327 static int ab8500_print_all_banks(struct seq_file *s, void *p)
1328 {
1329 	struct device *dev = s->private;
1330 	unsigned int i;
1331 
1332 	seq_puts(s, AB8500_NAME_STRING " register values:\n");
1333 
1334 	for (i = 0; i < AB8500_NUM_BANKS; i++) {
1335 		int err;
1336 
1337 		seq_printf(s, " bank 0x%02X:\n", i);
1338 		err = ab8500_registers_print(dev, i, s);
1339 		if (err)
1340 			return err;
1341 	}
1342 	return 0;
1343 }
1344 
1345 /* Dump registers to kernel log */
ab8500_dump_all_banks(struct device * dev)1346 void ab8500_dump_all_banks(struct device *dev)
1347 {
1348 	unsigned int i;
1349 
1350 	dev_info(dev, "ab8500 register values:\n");
1351 
1352 	for (i = 1; i < AB8500_NUM_BANKS; i++) {
1353 		dev_info(dev, " bank 0x%02X:\n", i);
1354 		ab8500_registers_print(dev, i, NULL);
1355 	}
1356 }
1357 
ab8500_all_banks_open(struct inode * inode,struct file * file)1358 static int ab8500_all_banks_open(struct inode *inode, struct file *file)
1359 {
1360 	struct seq_file *s;
1361 	int err;
1362 
1363 	err = single_open(file, ab8500_print_all_banks, inode->i_private);
1364 	if (!err) {
1365 		/* Default buf size in seq_read is not enough */
1366 		s = (struct seq_file *)file->private_data;
1367 		s->size = (PAGE_SIZE * 2);
1368 		s->buf = kmalloc(s->size, GFP_KERNEL);
1369 		if (!s->buf) {
1370 			single_release(inode, file);
1371 			err = -ENOMEM;
1372 		}
1373 	}
1374 	return err;
1375 }
1376 
1377 static const struct file_operations ab8500_all_banks_fops = {
1378 	.open = ab8500_all_banks_open,
1379 	.read = seq_read,
1380 	.llseek = seq_lseek,
1381 	.release = single_release,
1382 	.owner = THIS_MODULE,
1383 };
1384 
ab8500_bank_print(struct seq_file * s,void * p)1385 static int ab8500_bank_print(struct seq_file *s, void *p)
1386 {
1387 	seq_printf(s, "0x%02X\n", debug_bank);
1388 	return 0;
1389 }
1390 
ab8500_bank_open(struct inode * inode,struct file * file)1391 static int ab8500_bank_open(struct inode *inode, struct file *file)
1392 {
1393 	return single_open(file, ab8500_bank_print, inode->i_private);
1394 }
1395 
ab8500_bank_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1396 static ssize_t ab8500_bank_write(struct file *file,
1397 	const char __user *user_buf,
1398 	size_t count, loff_t *ppos)
1399 {
1400 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
1401 	unsigned long user_bank;
1402 	int err;
1403 
1404 	err = kstrtoul_from_user(user_buf, count, 0, &user_bank);
1405 	if (err)
1406 		return err;
1407 
1408 	if (user_bank >= AB8500_NUM_BANKS) {
1409 		dev_err(dev, "debugfs error input > number of banks\n");
1410 		return -EINVAL;
1411 	}
1412 
1413 	debug_bank = user_bank;
1414 
1415 	return count;
1416 }
1417 
ab8500_address_print(struct seq_file * s,void * p)1418 static int ab8500_address_print(struct seq_file *s, void *p)
1419 {
1420 	seq_printf(s, "0x%02X\n", debug_address);
1421 	return 0;
1422 }
1423 
ab8500_address_open(struct inode * inode,struct file * file)1424 static int ab8500_address_open(struct inode *inode, struct file *file)
1425 {
1426 	return single_open(file, ab8500_address_print, inode->i_private);
1427 }
1428 
ab8500_address_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1429 static ssize_t ab8500_address_write(struct file *file,
1430 				    const char __user *user_buf,
1431 				    size_t count, loff_t *ppos)
1432 {
1433 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
1434 	unsigned long user_address;
1435 	int err;
1436 
1437 	err = kstrtoul_from_user(user_buf, count, 0, &user_address);
1438 	if (err)
1439 		return err;
1440 
1441 	if (user_address > 0xff) {
1442 		dev_err(dev, "debugfs error input > 0xff\n");
1443 		return -EINVAL;
1444 	}
1445 	debug_address = user_address;
1446 
1447 	return count;
1448 }
1449 
ab8500_val_print(struct seq_file * s,void * p)1450 static int ab8500_val_print(struct seq_file *s, void *p)
1451 {
1452 	struct device *dev = s->private;
1453 	int ret;
1454 	u8 regvalue;
1455 
1456 	ret = abx500_get_register_interruptible(dev,
1457 		(u8)debug_bank, (u8)debug_address, &regvalue);
1458 	if (ret < 0) {
1459 		dev_err(dev, "abx500_get_reg fail %d, %d\n",
1460 			ret, __LINE__);
1461 		return -EINVAL;
1462 	}
1463 	seq_printf(s, "0x%02X\n", regvalue);
1464 
1465 	return 0;
1466 }
1467 
ab8500_val_open(struct inode * inode,struct file * file)1468 static int ab8500_val_open(struct inode *inode, struct file *file)
1469 {
1470 	return single_open(file, ab8500_val_print, inode->i_private);
1471 }
1472 
ab8500_val_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1473 static ssize_t ab8500_val_write(struct file *file,
1474 				const char __user *user_buf,
1475 				size_t count, loff_t *ppos)
1476 {
1477 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
1478 	unsigned long user_val;
1479 	int err;
1480 
1481 	err = kstrtoul_from_user(user_buf, count, 0, &user_val);
1482 	if (err)
1483 		return err;
1484 
1485 	if (user_val > 0xff) {
1486 		dev_err(dev, "debugfs error input > 0xff\n");
1487 		return -EINVAL;
1488 	}
1489 	err = abx500_set_register_interruptible(dev,
1490 		(u8)debug_bank, debug_address, (u8)user_val);
1491 	if (err < 0) {
1492 		pr_err("abx500_set_reg failed %d, %d", err, __LINE__);
1493 		return -EINVAL;
1494 	}
1495 
1496 	return count;
1497 }
1498 
1499 /*
1500  * Interrupt status
1501  */
1502 static u32 num_interrupts[AB8500_MAX_NR_IRQS];
1503 static u32 num_wake_interrupts[AB8500_MAX_NR_IRQS];
1504 static int num_interrupt_lines;
1505 
ab8500_debug_register_interrupt(int line)1506 void ab8500_debug_register_interrupt(int line)
1507 {
1508 	if (line < num_interrupt_lines)
1509 		num_interrupts[line]++;
1510 }
1511 
ab8500_interrupts_show(struct seq_file * s,void * p)1512 static int ab8500_interrupts_show(struct seq_file *s, void *p)
1513 {
1514 	int line;
1515 
1516 	seq_puts(s, "name: number:  number of: wake:\n");
1517 
1518 	for (line = 0; line < num_interrupt_lines; line++) {
1519 		struct irq_desc *desc = irq_to_desc(line + irq_first);
1520 
1521 		seq_printf(s, "%3i:  %6i %4i",
1522 			   line,
1523 			   num_interrupts[line],
1524 			   num_wake_interrupts[line]);
1525 
1526 		if (desc && desc->name)
1527 			seq_printf(s, "-%-8s", desc->name);
1528 		if (desc && desc->action) {
1529 			struct irqaction *action = desc->action;
1530 
1531 			seq_printf(s, "  %s", action->name);
1532 			while ((action = action->next) != NULL)
1533 				seq_printf(s, ", %s", action->name);
1534 		}
1535 		seq_putc(s, '\n');
1536 	}
1537 
1538 	return 0;
1539 }
1540 
1541 DEFINE_SHOW_ATTRIBUTE(ab8500_interrupts);
1542 
1543 /*
1544  * - HWREG DB8500 formated routines
1545  */
ab8500_hwreg_print(struct seq_file * s,void * d)1546 static int ab8500_hwreg_print(struct seq_file *s, void *d)
1547 {
1548 	struct device *dev = s->private;
1549 	int ret;
1550 	u8 regvalue;
1551 
1552 	ret = abx500_get_register_interruptible(dev,
1553 		(u8)hwreg_cfg.bank, (u8)hwreg_cfg.addr, &regvalue);
1554 	if (ret < 0) {
1555 		dev_err(dev, "abx500_get_reg fail %d, %d\n",
1556 			ret, __LINE__);
1557 		return -EINVAL;
1558 	}
1559 
1560 	if (hwreg_cfg.shift >= 0)
1561 		regvalue >>= hwreg_cfg.shift;
1562 	else
1563 		regvalue <<= -hwreg_cfg.shift;
1564 	regvalue &= hwreg_cfg.mask;
1565 
1566 	if (REG_FMT_DEC(&hwreg_cfg))
1567 		seq_printf(s, "%d\n", regvalue);
1568 	else
1569 		seq_printf(s, "0x%02X\n", regvalue);
1570 	return 0;
1571 }
1572 
ab8500_hwreg_open(struct inode * inode,struct file * file)1573 static int ab8500_hwreg_open(struct inode *inode, struct file *file)
1574 {
1575 	return single_open(file, ab8500_hwreg_print, inode->i_private);
1576 }
1577 
1578 #define AB8500_SUPPLY_CONTROL_CONFIG_1 0x01
1579 #define AB8500_SUPPLY_CONTROL_REG 0x00
1580 #define AB8500_FIRST_SIM_REG 0x80
1581 #define AB8500_LAST_SIM_REG 0x8B
1582 #define AB8505_LAST_SIM_REG 0x8C
1583 
ab8500_modem_show(struct seq_file * s,void * p)1584 static int ab8500_modem_show(struct seq_file *s, void *p)
1585 {
1586 	struct device *dev = s->private;
1587 	struct ab8500 *ab8500;
1588 	int err;
1589 	u8 value;
1590 	u8 orig_value;
1591 	u32 bank = AB8500_REGU_CTRL2;
1592 	u32 last_sim_reg = AB8500_LAST_SIM_REG;
1593 	u32 reg;
1594 
1595 	ab8500 = dev_get_drvdata(dev->parent);
1596 	dev_warn(dev, "WARNING! This operation can interfer with modem side\n"
1597 		"and should only be done with care\n");
1598 
1599 	err = abx500_get_register_interruptible(dev,
1600 		AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG, &orig_value);
1601 	if (err < 0)
1602 		goto report_read_failure;
1603 
1604 	/* Config 1 will allow APE side to read SIM registers */
1605 	err = abx500_set_register_interruptible(dev,
1606 		AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG,
1607 		AB8500_SUPPLY_CONTROL_CONFIG_1);
1608 	if (err < 0)
1609 		goto report_write_failure;
1610 
1611 	seq_printf(s, " bank 0x%02X:\n", bank);
1612 
1613 	if (is_ab9540(ab8500) || is_ab8505(ab8500))
1614 		last_sim_reg = AB8505_LAST_SIM_REG;
1615 
1616 	for (reg = AB8500_FIRST_SIM_REG; reg <= last_sim_reg; reg++) {
1617 		err = abx500_get_register_interruptible(dev,
1618 			bank, reg, &value);
1619 		if (err < 0)
1620 			goto report_read_failure;
1621 
1622 		seq_printf(s, "  [0x%02X/0x%02X]: 0x%02X\n", bank, reg, value);
1623 	}
1624 	err = abx500_set_register_interruptible(dev,
1625 		AB8500_REGU_CTRL1, AB8500_SUPPLY_CONTROL_REG, orig_value);
1626 	if (err < 0)
1627 		goto report_write_failure;
1628 
1629 	return 0;
1630 
1631 report_read_failure:
1632 	dev_err(dev, "ab->read fail %d\n", err);
1633 	return err;
1634 
1635 report_write_failure:
1636 	dev_err(dev, "ab->write fail %d\n", err);
1637 	return err;
1638 }
1639 
1640 DEFINE_SHOW_ATTRIBUTE(ab8500_modem);
1641 
1642 /*
1643  * return length of an ASCII numerical value, 0 is string is not a
1644  * numerical value.
1645  * string shall start at value 1st char.
1646  * string can be tailed with \0 or space or newline chars only.
1647  * value can be decimal or hexadecimal (prefixed 0x or 0X).
1648  */
strval_len(char * b)1649 static int strval_len(char *b)
1650 {
1651 	char *s = b;
1652 
1653 	if ((*s == '0') && ((*(s+1) == 'x') || (*(s+1) == 'X'))) {
1654 		s += 2;
1655 		for (; *s && (*s != ' ') && (*s != '\n'); s++) {
1656 			if (!isxdigit(*s))
1657 				return 0;
1658 		}
1659 	} else {
1660 		if (*s == '-')
1661 			s++;
1662 		for (; *s && (*s != ' ') && (*s != '\n'); s++) {
1663 			if (!isdigit(*s))
1664 				return 0;
1665 		}
1666 	}
1667 	return (int) (s-b);
1668 }
1669 
1670 /*
1671  * parse hwreg input data.
1672  * update global hwreg_cfg only if input data syntax is ok.
1673  */
hwreg_common_write(char * b,struct hwreg_cfg * cfg,struct device * dev)1674 static ssize_t hwreg_common_write(char *b, struct hwreg_cfg *cfg,
1675 		struct device *dev)
1676 {
1677 	uint write, val = 0;
1678 	u8  regvalue;
1679 	int ret;
1680 	struct hwreg_cfg loc = {
1681 		.bank = 0,          /* default: invalid phys addr */
1682 		.addr = 0,          /* default: invalid phys addr */
1683 		.fmt = 0,           /* default: 32bit access, hex output */
1684 		.mask = 0xFFFFFFFF, /* default: no mask */
1685 		.shift = 0,         /* default: no bit shift */
1686 	};
1687 
1688 	/* read or write ? */
1689 	if (!strncmp(b, "read ", 5)) {
1690 		write = 0;
1691 		b += 5;
1692 	} else if (!strncmp(b, "write ", 6)) {
1693 		write = 1;
1694 		b += 6;
1695 	} else
1696 		return -EINVAL;
1697 
1698 	/* OPTIONS -l|-w|-b -s -m -o */
1699 	while ((*b == ' ') || (*b == '-')) {
1700 		if (*(b-1) != ' ') {
1701 			b++;
1702 			continue;
1703 		}
1704 		if ((!strncmp(b, "-d ", 3)) ||
1705 				(!strncmp(b, "-dec ", 5))) {
1706 			b += (*(b+2) == ' ') ? 3 : 5;
1707 			loc.fmt |= (1<<0);
1708 		} else if ((!strncmp(b, "-h ", 3)) ||
1709 				(!strncmp(b, "-hex ", 5))) {
1710 			b += (*(b+2) == ' ') ? 3 : 5;
1711 			loc.fmt &= ~(1<<0);
1712 		} else if ((!strncmp(b, "-m ", 3)) ||
1713 				(!strncmp(b, "-mask ", 6))) {
1714 			b += (*(b+2) == ' ') ? 3 : 6;
1715 			if (strval_len(b) == 0)
1716 				return -EINVAL;
1717 			ret = kstrtoul(b, 0, &loc.mask);
1718 			if (ret)
1719 				return ret;
1720 		} else if ((!strncmp(b, "-s ", 3)) ||
1721 				(!strncmp(b, "-shift ", 7))) {
1722 			b += (*(b+2) == ' ') ? 3 : 7;
1723 			if (strval_len(b) == 0)
1724 				return -EINVAL;
1725 			ret = kstrtol(b, 0, &loc.shift);
1726 			if (ret)
1727 				return ret;
1728 		} else {
1729 			return -EINVAL;
1730 		}
1731 	}
1732 	/* get arg BANK and ADDRESS */
1733 	if (strval_len(b) == 0)
1734 		return -EINVAL;
1735 	ret = kstrtouint(b, 0, &loc.bank);
1736 	if (ret)
1737 		return ret;
1738 	while (*b == ' ')
1739 		b++;
1740 	if (strval_len(b) == 0)
1741 		return -EINVAL;
1742 	ret = kstrtoul(b, 0, &loc.addr);
1743 	if (ret)
1744 		return ret;
1745 
1746 	if (write) {
1747 		while (*b == ' ')
1748 			b++;
1749 		if (strval_len(b) == 0)
1750 			return -EINVAL;
1751 		ret = kstrtouint(b, 0, &val);
1752 		if (ret)
1753 			return ret;
1754 	}
1755 
1756 	/* args are ok, update target cfg (mainly for read) */
1757 	*cfg = loc;
1758 
1759 #ifdef ABB_HWREG_DEBUG
1760 	pr_warn("HWREG request: %s, %s,\n", (write) ? "write" : "read",
1761 		REG_FMT_DEC(cfg) ? "decimal" : "hexa");
1762 	pr_warn("  addr=0x%08X, mask=0x%X, shift=%d" "value=0x%X\n",
1763 		cfg->addr, cfg->mask, cfg->shift, val);
1764 #endif
1765 
1766 	if (!write)
1767 		return 0;
1768 
1769 	ret = abx500_get_register_interruptible(dev,
1770 			(u8)cfg->bank, (u8)cfg->addr, &regvalue);
1771 	if (ret < 0) {
1772 		dev_err(dev, "abx500_get_reg fail %d, %d\n",
1773 			ret, __LINE__);
1774 		return -EINVAL;
1775 	}
1776 
1777 	if (cfg->shift >= 0) {
1778 		regvalue &= ~(cfg->mask << (cfg->shift));
1779 		val = (val & cfg->mask) << (cfg->shift);
1780 	} else {
1781 		regvalue &= ~(cfg->mask >> (-cfg->shift));
1782 		val = (val & cfg->mask) >> (-cfg->shift);
1783 	}
1784 	val = val | regvalue;
1785 
1786 	ret = abx500_set_register_interruptible(dev,
1787 			(u8)cfg->bank, (u8)cfg->addr, (u8)val);
1788 	if (ret < 0) {
1789 		pr_err("abx500_set_reg failed %d, %d", ret, __LINE__);
1790 		return -EINVAL;
1791 	}
1792 
1793 	return 0;
1794 }
1795 
ab8500_hwreg_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1796 static ssize_t ab8500_hwreg_write(struct file *file,
1797 	const char __user *user_buf, size_t count, loff_t *ppos)
1798 {
1799 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
1800 	char buf[128];
1801 	int buf_size, ret;
1802 
1803 	/* Get userspace string and assure termination */
1804 	buf_size = min((int)count, (int)(sizeof(buf)-1));
1805 	if (copy_from_user(buf, user_buf, buf_size))
1806 		return -EFAULT;
1807 	buf[buf_size] = 0;
1808 
1809 	/* get args and process */
1810 	ret = hwreg_common_write(buf, &hwreg_cfg, dev);
1811 	return (ret) ? ret : buf_size;
1812 }
1813 
1814 /*
1815  * - irq subscribe/unsubscribe stuff
1816  */
ab8500_subscribe_unsubscribe_print(struct seq_file * s,void * p)1817 static int ab8500_subscribe_unsubscribe_print(struct seq_file *s, void *p)
1818 {
1819 	seq_printf(s, "%d\n", irq_first);
1820 
1821 	return 0;
1822 }
1823 
ab8500_subscribe_unsubscribe_open(struct inode * inode,struct file * file)1824 static int ab8500_subscribe_unsubscribe_open(struct inode *inode,
1825 					     struct file *file)
1826 {
1827 	return single_open(file, ab8500_subscribe_unsubscribe_print,
1828 		inode->i_private);
1829 }
1830 
1831 /*
1832  * Userspace should use poll() on this file. When an event occur
1833  * the blocking poll will be released.
1834  */
show_irq(struct device * dev,struct device_attribute * attr,char * buf)1835 static ssize_t show_irq(struct device *dev,
1836 			struct device_attribute *attr, char *buf)
1837 {
1838 	unsigned long name;
1839 	unsigned int irq_index;
1840 	int err;
1841 
1842 	err = kstrtoul(attr->attr.name, 0, &name);
1843 	if (err)
1844 		return err;
1845 
1846 	irq_index = name - irq_first;
1847 	if (irq_index >= num_irqs)
1848 		return -EINVAL;
1849 
1850 	return sprintf(buf, "%u\n", irq_count[irq_index]);
1851 }
1852 
ab8500_subscribe_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1853 static ssize_t ab8500_subscribe_write(struct file *file,
1854 				      const char __user *user_buf,
1855 				      size_t count, loff_t *ppos)
1856 {
1857 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
1858 	unsigned long user_val;
1859 	int err;
1860 	unsigned int irq_index;
1861 
1862 	err = kstrtoul_from_user(user_buf, count, 0, &user_val);
1863 	if (err)
1864 		return err;
1865 
1866 	if (user_val < irq_first) {
1867 		dev_err(dev, "debugfs error input < %d\n", irq_first);
1868 		return -EINVAL;
1869 	}
1870 	if (user_val > irq_last) {
1871 		dev_err(dev, "debugfs error input > %d\n", irq_last);
1872 		return -EINVAL;
1873 	}
1874 
1875 	irq_index = user_val - irq_first;
1876 	if (irq_index >= num_irqs)
1877 		return -EINVAL;
1878 
1879 	/*
1880 	 * This will create a sysfs file named <irq-nr> which userspace can
1881 	 * use to select or poll and get the AB8500 events
1882 	 */
1883 	dev_attr[irq_index] = kmalloc(sizeof(struct device_attribute),
1884 		GFP_KERNEL);
1885 	if (!dev_attr[irq_index])
1886 		return -ENOMEM;
1887 
1888 	event_name[irq_index] = kasprintf(GFP_KERNEL, "%lu", user_val);
1889 	if (!event_name[irq_index])
1890 		return -ENOMEM;
1891 
1892 	dev_attr[irq_index]->show = show_irq;
1893 	dev_attr[irq_index]->store = NULL;
1894 	dev_attr[irq_index]->attr.name = event_name[irq_index];
1895 	dev_attr[irq_index]->attr.mode = S_IRUGO;
1896 	err = sysfs_create_file(&dev->kobj, &dev_attr[irq_index]->attr);
1897 	if (err < 0) {
1898 		pr_info("sysfs_create_file failed %d\n", err);
1899 		return err;
1900 	}
1901 
1902 	err = request_threaded_irq(user_val, NULL, ab8500_debug_handler,
1903 				   IRQF_SHARED | IRQF_NO_SUSPEND | IRQF_ONESHOT,
1904 				   "ab8500-debug", &dev->kobj);
1905 	if (err < 0) {
1906 		pr_info("request_threaded_irq failed %d, %lu\n",
1907 			err, user_val);
1908 		sysfs_remove_file(&dev->kobj, &dev_attr[irq_index]->attr);
1909 		return err;
1910 	}
1911 
1912 	return count;
1913 }
1914 
ab8500_unsubscribe_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1915 static ssize_t ab8500_unsubscribe_write(struct file *file,
1916 					const char __user *user_buf,
1917 					size_t count, loff_t *ppos)
1918 {
1919 	struct device *dev = ((struct seq_file *)(file->private_data))->private;
1920 	unsigned long user_val;
1921 	int err;
1922 	unsigned int irq_index;
1923 
1924 	err = kstrtoul_from_user(user_buf, count, 0, &user_val);
1925 	if (err)
1926 		return err;
1927 
1928 	if (user_val < irq_first) {
1929 		dev_err(dev, "debugfs error input < %d\n", irq_first);
1930 		return -EINVAL;
1931 	}
1932 	if (user_val > irq_last) {
1933 		dev_err(dev, "debugfs error input > %d\n", irq_last);
1934 		return -EINVAL;
1935 	}
1936 
1937 	irq_index = user_val - irq_first;
1938 	if (irq_index >= num_irqs)
1939 		return -EINVAL;
1940 
1941 	/* Set irq count to 0 when unsubscribe */
1942 	irq_count[irq_index] = 0;
1943 
1944 	if (dev_attr[irq_index])
1945 		sysfs_remove_file(&dev->kobj, &dev_attr[irq_index]->attr);
1946 
1947 
1948 	free_irq(user_val, &dev->kobj);
1949 	kfree(event_name[irq_index]);
1950 	kfree(dev_attr[irq_index]);
1951 
1952 	return count;
1953 }
1954 
1955 /*
1956  * - several debugfs nodes fops
1957  */
1958 
1959 static const struct file_operations ab8500_bank_fops = {
1960 	.open = ab8500_bank_open,
1961 	.write = ab8500_bank_write,
1962 	.read = seq_read,
1963 	.llseek = seq_lseek,
1964 	.release = single_release,
1965 	.owner = THIS_MODULE,
1966 };
1967 
1968 static const struct file_operations ab8500_address_fops = {
1969 	.open = ab8500_address_open,
1970 	.write = ab8500_address_write,
1971 	.read = seq_read,
1972 	.llseek = seq_lseek,
1973 	.release = single_release,
1974 	.owner = THIS_MODULE,
1975 };
1976 
1977 static const struct file_operations ab8500_val_fops = {
1978 	.open = ab8500_val_open,
1979 	.write = ab8500_val_write,
1980 	.read = seq_read,
1981 	.llseek = seq_lseek,
1982 	.release = single_release,
1983 	.owner = THIS_MODULE,
1984 };
1985 
1986 static const struct file_operations ab8500_subscribe_fops = {
1987 	.open = ab8500_subscribe_unsubscribe_open,
1988 	.write = ab8500_subscribe_write,
1989 	.read = seq_read,
1990 	.llseek = seq_lseek,
1991 	.release = single_release,
1992 	.owner = THIS_MODULE,
1993 };
1994 
1995 static const struct file_operations ab8500_unsubscribe_fops = {
1996 	.open = ab8500_subscribe_unsubscribe_open,
1997 	.write = ab8500_unsubscribe_write,
1998 	.read = seq_read,
1999 	.llseek = seq_lseek,
2000 	.release = single_release,
2001 	.owner = THIS_MODULE,
2002 };
2003 
2004 static const struct file_operations ab8500_hwreg_fops = {
2005 	.open = ab8500_hwreg_open,
2006 	.write = ab8500_hwreg_write,
2007 	.read = seq_read,
2008 	.llseek = seq_lseek,
2009 	.release = single_release,
2010 	.owner = THIS_MODULE,
2011 };
2012 
ab8500_debug_probe(struct platform_device * plf)2013 static int ab8500_debug_probe(struct platform_device *plf)
2014 {
2015 	struct dentry *ab8500_dir;
2016 	struct ab8500 *ab8500;
2017 	struct resource *res;
2018 
2019 	debug_bank = AB8500_MISC;
2020 	debug_address = AB8500_REV_REG & 0x00FF;
2021 
2022 	ab8500 = dev_get_drvdata(plf->dev.parent);
2023 	num_irqs = ab8500->mask_size;
2024 
2025 	irq_count = devm_kcalloc(&plf->dev,
2026 				 num_irqs, sizeof(*irq_count), GFP_KERNEL);
2027 	if (!irq_count)
2028 		return -ENOMEM;
2029 
2030 	dev_attr = devm_kcalloc(&plf->dev,
2031 				num_irqs, sizeof(*dev_attr), GFP_KERNEL);
2032 	if (!dev_attr)
2033 		return -ENOMEM;
2034 
2035 	event_name = devm_kcalloc(&plf->dev,
2036 				  num_irqs, sizeof(*event_name), GFP_KERNEL);
2037 	if (!event_name)
2038 		return -ENOMEM;
2039 
2040 	res = platform_get_resource_byname(plf, 0, "IRQ_AB8500");
2041 	if (!res) {
2042 		dev_err(&plf->dev, "AB8500 irq not found, err %d\n", irq_first);
2043 		return -ENXIO;
2044 	}
2045 	irq_ab8500 = res->start;
2046 
2047 	irq_first = platform_get_irq_byname(plf, "IRQ_FIRST");
2048 	if (irq_first < 0)
2049 		return irq_first;
2050 
2051 	irq_last = platform_get_irq_byname(plf, "IRQ_LAST");
2052 	if (irq_last < 0)
2053 		return irq_last;
2054 
2055 	ab8500_dir = debugfs_create_dir(AB8500_NAME_STRING, NULL);
2056 
2057 	debugfs_create_file("all-bank-registers", S_IRUGO, ab8500_dir,
2058 			    &plf->dev, &ab8500_bank_registers_fops);
2059 	debugfs_create_file("all-banks", S_IRUGO, ab8500_dir,
2060 			    &plf->dev, &ab8500_all_banks_fops);
2061 	debugfs_create_file("register-bank", (S_IRUGO | S_IWUSR | S_IWGRP),
2062 			    ab8500_dir, &plf->dev, &ab8500_bank_fops);
2063 	debugfs_create_file("register-address", (S_IRUGO | S_IWUSR | S_IWGRP),
2064 			    ab8500_dir, &plf->dev, &ab8500_address_fops);
2065 	debugfs_create_file("register-value", (S_IRUGO | S_IWUSR | S_IWGRP),
2066 			    ab8500_dir, &plf->dev, &ab8500_val_fops);
2067 	debugfs_create_file("irq-subscribe", (S_IRUGO | S_IWUSR | S_IWGRP),
2068 			    ab8500_dir, &plf->dev, &ab8500_subscribe_fops);
2069 
2070 	if (is_ab8500(ab8500)) {
2071 		debug_ranges = ab8500_debug_ranges;
2072 		num_interrupt_lines = AB8500_NR_IRQS;
2073 	} else if (is_ab8505(ab8500)) {
2074 		debug_ranges = ab8505_debug_ranges;
2075 		num_interrupt_lines = AB8505_NR_IRQS;
2076 	} else if (is_ab9540(ab8500)) {
2077 		debug_ranges = ab8505_debug_ranges;
2078 		num_interrupt_lines = AB9540_NR_IRQS;
2079 	} else if (is_ab8540(ab8500)) {
2080 		debug_ranges = ab8540_debug_ranges;
2081 		num_interrupt_lines = AB8540_NR_IRQS;
2082 	}
2083 
2084 	debugfs_create_file("interrupts", (S_IRUGO), ab8500_dir, &plf->dev,
2085 			    &ab8500_interrupts_fops);
2086 	debugfs_create_file("irq-unsubscribe", (S_IRUGO | S_IWUSR | S_IWGRP),
2087 			    ab8500_dir, &plf->dev, &ab8500_unsubscribe_fops);
2088 	debugfs_create_file("hwreg", (S_IRUGO | S_IWUSR | S_IWGRP), ab8500_dir,
2089 			    &plf->dev, &ab8500_hwreg_fops);
2090 	debugfs_create_file("all-modem-registers", (S_IRUGO | S_IWUSR | S_IWGRP),
2091 			    ab8500_dir, &plf->dev, &ab8500_modem_fops);
2092 
2093 	return 0;
2094 }
2095 
2096 static struct platform_driver ab8500_debug_driver = {
2097 	.driver = {
2098 		.name = "ab8500-debug",
2099 		.suppress_bind_attrs = true,
2100 	},
2101 	.probe  = ab8500_debug_probe,
2102 };
2103 
ab8500_debug_init(void)2104 static int __init ab8500_debug_init(void)
2105 {
2106 	return platform_driver_register(&ab8500_debug_driver);
2107 }
2108 subsys_initcall(ab8500_debug_init);
2109