1# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the fpga framework and fpga manager drivers.
4#
5
6# Core FPGA Manager Framework
7obj-$(CONFIG_FPGA)			+= fpga-mgr.o
8
9# FPGA Manager Drivers
10obj-$(CONFIG_FPGA_MGR_ALTERA_CVP)	+= altera-cvp.o
11obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI)	+= altera-ps-spi.o
12obj-$(CONFIG_FPGA_MGR_ICE40_SPI)	+= ice40-spi.o
13obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI)	+= machxo2-spi.o
14obj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
15obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10)	+= socfpga-a10.o
16obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC)	+= stratix10-soc.o
17obj-$(CONFIG_FPGA_MGR_TS73XX)		+= ts73xx-fpga.o
18obj-$(CONFIG_FPGA_MGR_XILINX_SPI)	+= xilinx-spi.o
19obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
20obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA)	+= zynqmp-fpga.o
21obj-$(CONFIG_ALTERA_PR_IP_CORE)         += altera-pr-ip-core.o
22obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT)    += altera-pr-ip-core-plat.o
23
24# FPGA Bridge Drivers
25obj-$(CONFIG_FPGA_BRIDGE)		+= fpga-bridge.o
26obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE)	+= altera-hps2fpga.o altera-fpga2sdram.o
27obj-$(CONFIG_ALTERA_FREEZE_BRIDGE)	+= altera-freeze-bridge.o
28obj-$(CONFIG_XILINX_PR_DECOUPLER)	+= xilinx-pr-decoupler.o
29
30# High Level Interfaces
31obj-$(CONFIG_FPGA_REGION)		+= fpga-region.o
32obj-$(CONFIG_OF_FPGA_REGION)		+= of-fpga-region.o
33
34# FPGA Device Feature List Support
35obj-$(CONFIG_FPGA_DFL)			+= dfl.o
36obj-$(CONFIG_FPGA_DFL_FME)		+= dfl-fme.o
37obj-$(CONFIG_FPGA_DFL_FME_MGR)		+= dfl-fme-mgr.o
38obj-$(CONFIG_FPGA_DFL_FME_BRIDGE)	+= dfl-fme-br.o
39obj-$(CONFIG_FPGA_DFL_FME_REGION)	+= dfl-fme-region.o
40obj-$(CONFIG_FPGA_DFL_AFU)		+= dfl-afu.o
41
42dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o
43dfl-fme-objs += dfl-fme-perf.o
44dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o
45dfl-afu-objs += dfl-afu-error.o
46
47# Drivers for FPGAs which implement DFL
48obj-$(CONFIG_FPGA_DFL_PCI)		+= dfl-pci.o
49