1 /*
2 * omap-rng.c - RNG driver for TI OMAP CPU family
3 *
4 * Author: Deepak Saxena <dsaxena@plexity.net>
5 *
6 * Copyright 2005 (c) MontaVista Software, Inc.
7 *
8 * Mostly based on original driver:
9 *
10 * Copyright (C) 2005 Nokia Corporation
11 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
12 *
13 * This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied.
16 */
17
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/random.h>
21 #include <linux/err.h>
22 #include <linux/platform_device.h>
23 #include <linux/hw_random.h>
24 #include <linux/delay.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/of.h>
29 #include <linux/of_device.h>
30 #include <linux/of_address.h>
31 #include <linux/interrupt.h>
32 #include <linux/clk.h>
33
34 #include <asm/io.h>
35
36 #define RNG_REG_STATUS_RDY (1 << 0)
37
38 #define RNG_REG_INTACK_RDY_MASK (1 << 0)
39 #define RNG_REG_INTACK_SHUTDOWN_OFLO_MASK (1 << 1)
40 #define RNG_SHUTDOWN_OFLO_MASK (1 << 1)
41
42 #define RNG_CONTROL_STARTUP_CYCLES_SHIFT 16
43 #define RNG_CONTROL_STARTUP_CYCLES_MASK (0xffff << 16)
44 #define RNG_CONTROL_ENABLE_TRNG_SHIFT 10
45 #define RNG_CONTROL_ENABLE_TRNG_MASK (1 << 10)
46
47 #define RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT 16
48 #define RNG_CONFIG_MAX_REFIL_CYCLES_MASK (0xffff << 16)
49 #define RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT 0
50 #define RNG_CONFIG_MIN_REFIL_CYCLES_MASK (0xff << 0)
51
52 #define RNG_CONTROL_STARTUP_CYCLES 0xff
53 #define RNG_CONFIG_MIN_REFIL_CYCLES 0x21
54 #define RNG_CONFIG_MAX_REFIL_CYCLES 0x22
55
56 #define RNG_ALARMCNT_ALARM_TH_SHIFT 0x0
57 #define RNG_ALARMCNT_ALARM_TH_MASK (0xff << 0)
58 #define RNG_ALARMCNT_SHUTDOWN_TH_SHIFT 16
59 #define RNG_ALARMCNT_SHUTDOWN_TH_MASK (0x1f << 16)
60 #define RNG_ALARM_THRESHOLD 0xff
61 #define RNG_SHUTDOWN_THRESHOLD 0x4
62
63 #define RNG_REG_FROENABLE_MASK 0xffffff
64 #define RNG_REG_FRODETUNE_MASK 0xffffff
65
66 #define OMAP2_RNG_OUTPUT_SIZE 0x4
67 #define OMAP4_RNG_OUTPUT_SIZE 0x8
68 #define EIP76_RNG_OUTPUT_SIZE 0x10
69
70 /*
71 * EIP76 RNG takes approx. 700us to produce 16 bytes of output data
72 * as per testing results. And to account for the lack of udelay()'s
73 * reliability, we keep the timeout as 1000us.
74 */
75 #define RNG_DATA_FILL_TIMEOUT 100
76
77 enum {
78 RNG_OUTPUT_0_REG = 0,
79 RNG_OUTPUT_1_REG,
80 RNG_OUTPUT_2_REG,
81 RNG_OUTPUT_3_REG,
82 RNG_STATUS_REG,
83 RNG_INTMASK_REG,
84 RNG_INTACK_REG,
85 RNG_CONTROL_REG,
86 RNG_CONFIG_REG,
87 RNG_ALARMCNT_REG,
88 RNG_FROENABLE_REG,
89 RNG_FRODETUNE_REG,
90 RNG_ALARMMASK_REG,
91 RNG_ALARMSTOP_REG,
92 RNG_REV_REG,
93 RNG_SYSCONFIG_REG,
94 };
95
96 static const u16 reg_map_omap2[] = {
97 [RNG_OUTPUT_0_REG] = 0x0,
98 [RNG_STATUS_REG] = 0x4,
99 [RNG_CONFIG_REG] = 0x28,
100 [RNG_REV_REG] = 0x3c,
101 [RNG_SYSCONFIG_REG] = 0x40,
102 };
103
104 static const u16 reg_map_omap4[] = {
105 [RNG_OUTPUT_0_REG] = 0x0,
106 [RNG_OUTPUT_1_REG] = 0x4,
107 [RNG_STATUS_REG] = 0x8,
108 [RNG_INTMASK_REG] = 0xc,
109 [RNG_INTACK_REG] = 0x10,
110 [RNG_CONTROL_REG] = 0x14,
111 [RNG_CONFIG_REG] = 0x18,
112 [RNG_ALARMCNT_REG] = 0x1c,
113 [RNG_FROENABLE_REG] = 0x20,
114 [RNG_FRODETUNE_REG] = 0x24,
115 [RNG_ALARMMASK_REG] = 0x28,
116 [RNG_ALARMSTOP_REG] = 0x2c,
117 [RNG_REV_REG] = 0x1FE0,
118 [RNG_SYSCONFIG_REG] = 0x1FE4,
119 };
120
121 static const u16 reg_map_eip76[] = {
122 [RNG_OUTPUT_0_REG] = 0x0,
123 [RNG_OUTPUT_1_REG] = 0x4,
124 [RNG_OUTPUT_2_REG] = 0x8,
125 [RNG_OUTPUT_3_REG] = 0xc,
126 [RNG_STATUS_REG] = 0x10,
127 [RNG_INTACK_REG] = 0x10,
128 [RNG_CONTROL_REG] = 0x14,
129 [RNG_CONFIG_REG] = 0x18,
130 [RNG_ALARMCNT_REG] = 0x1c,
131 [RNG_FROENABLE_REG] = 0x20,
132 [RNG_FRODETUNE_REG] = 0x24,
133 [RNG_ALARMMASK_REG] = 0x28,
134 [RNG_ALARMSTOP_REG] = 0x2c,
135 [RNG_REV_REG] = 0x7c,
136 };
137
138 struct omap_rng_dev;
139 /**
140 * struct omap_rng_pdata - RNG IP block-specific data
141 * @regs: Pointer to the register offsets structure.
142 * @data_size: No. of bytes in RNG output.
143 * @data_present: Callback to determine if data is available.
144 * @init: Callback for IP specific initialization sequence.
145 * @cleanup: Callback for IP specific cleanup sequence.
146 */
147 struct omap_rng_pdata {
148 u16 *regs;
149 u32 data_size;
150 u32 (*data_present)(struct omap_rng_dev *priv);
151 int (*init)(struct omap_rng_dev *priv);
152 void (*cleanup)(struct omap_rng_dev *priv);
153 };
154
155 struct omap_rng_dev {
156 void __iomem *base;
157 struct device *dev;
158 const struct omap_rng_pdata *pdata;
159 struct hwrng rng;
160 struct clk *clk;
161 struct clk *clk_reg;
162 };
163
omap_rng_read(struct omap_rng_dev * priv,u16 reg)164 static inline u32 omap_rng_read(struct omap_rng_dev *priv, u16 reg)
165 {
166 return __raw_readl(priv->base + priv->pdata->regs[reg]);
167 }
168
omap_rng_write(struct omap_rng_dev * priv,u16 reg,u32 val)169 static inline void omap_rng_write(struct omap_rng_dev *priv, u16 reg,
170 u32 val)
171 {
172 __raw_writel(val, priv->base + priv->pdata->regs[reg]);
173 }
174
175
omap_rng_do_read(struct hwrng * rng,void * data,size_t max,bool wait)176 static int omap_rng_do_read(struct hwrng *rng, void *data, size_t max,
177 bool wait)
178 {
179 struct omap_rng_dev *priv;
180 int i, present;
181
182 priv = (struct omap_rng_dev *)rng->priv;
183
184 if (max < priv->pdata->data_size)
185 return 0;
186
187 for (i = 0; i < RNG_DATA_FILL_TIMEOUT; i++) {
188 present = priv->pdata->data_present(priv);
189 if (present || !wait)
190 break;
191
192 udelay(10);
193 }
194 if (!present)
195 return 0;
196
197 memcpy_fromio(data, priv->base + priv->pdata->regs[RNG_OUTPUT_0_REG],
198 priv->pdata->data_size);
199
200 if (priv->pdata->regs[RNG_INTACK_REG])
201 omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_RDY_MASK);
202
203 return priv->pdata->data_size;
204 }
205
omap_rng_init(struct hwrng * rng)206 static int omap_rng_init(struct hwrng *rng)
207 {
208 struct omap_rng_dev *priv;
209
210 priv = (struct omap_rng_dev *)rng->priv;
211 return priv->pdata->init(priv);
212 }
213
omap_rng_cleanup(struct hwrng * rng)214 static void omap_rng_cleanup(struct hwrng *rng)
215 {
216 struct omap_rng_dev *priv;
217
218 priv = (struct omap_rng_dev *)rng->priv;
219 priv->pdata->cleanup(priv);
220 }
221
222
omap2_rng_data_present(struct omap_rng_dev * priv)223 static inline u32 omap2_rng_data_present(struct omap_rng_dev *priv)
224 {
225 return omap_rng_read(priv, RNG_STATUS_REG) ? 0 : 1;
226 }
227
omap2_rng_init(struct omap_rng_dev * priv)228 static int omap2_rng_init(struct omap_rng_dev *priv)
229 {
230 omap_rng_write(priv, RNG_SYSCONFIG_REG, 0x1);
231 return 0;
232 }
233
omap2_rng_cleanup(struct omap_rng_dev * priv)234 static void omap2_rng_cleanup(struct omap_rng_dev *priv)
235 {
236 omap_rng_write(priv, RNG_SYSCONFIG_REG, 0x0);
237 }
238
239 static struct omap_rng_pdata omap2_rng_pdata = {
240 .regs = (u16 *)reg_map_omap2,
241 .data_size = OMAP2_RNG_OUTPUT_SIZE,
242 .data_present = omap2_rng_data_present,
243 .init = omap2_rng_init,
244 .cleanup = omap2_rng_cleanup,
245 };
246
omap4_rng_data_present(struct omap_rng_dev * priv)247 static inline u32 omap4_rng_data_present(struct omap_rng_dev *priv)
248 {
249 return omap_rng_read(priv, RNG_STATUS_REG) & RNG_REG_STATUS_RDY;
250 }
251
eip76_rng_init(struct omap_rng_dev * priv)252 static int eip76_rng_init(struct omap_rng_dev *priv)
253 {
254 u32 val;
255
256 /* Return if RNG is already running. */
257 if (omap_rng_read(priv, RNG_CONTROL_REG) & RNG_CONTROL_ENABLE_TRNG_MASK)
258 return 0;
259
260 /* Number of 512 bit blocks of raw Noise Source output data that must
261 * be processed by either the Conditioning Function or the
262 * SP 800-90 DRBG ‘BC_DF’ functionality to yield a ‘full entropy’
263 * output value.
264 */
265 val = 0x5 << RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT;
266
267 /* Number of FRO samples that are XOR-ed together into one bit to be
268 * shifted into the main shift register
269 */
270 val |= RNG_CONFIG_MAX_REFIL_CYCLES << RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT;
271 omap_rng_write(priv, RNG_CONFIG_REG, val);
272
273 /* Enable all available FROs */
274 omap_rng_write(priv, RNG_FRODETUNE_REG, 0x0);
275 omap_rng_write(priv, RNG_FROENABLE_REG, RNG_REG_FROENABLE_MASK);
276
277 /* Enable TRNG */
278 val = RNG_CONTROL_ENABLE_TRNG_MASK;
279 omap_rng_write(priv, RNG_CONTROL_REG, val);
280
281 return 0;
282 }
283
omap4_rng_init(struct omap_rng_dev * priv)284 static int omap4_rng_init(struct omap_rng_dev *priv)
285 {
286 u32 val;
287
288 /* Return if RNG is already running. */
289 if (omap_rng_read(priv, RNG_CONTROL_REG) & RNG_CONTROL_ENABLE_TRNG_MASK)
290 return 0;
291
292 val = RNG_CONFIG_MIN_REFIL_CYCLES << RNG_CONFIG_MIN_REFIL_CYCLES_SHIFT;
293 val |= RNG_CONFIG_MAX_REFIL_CYCLES << RNG_CONFIG_MAX_REFIL_CYCLES_SHIFT;
294 omap_rng_write(priv, RNG_CONFIG_REG, val);
295
296 omap_rng_write(priv, RNG_FRODETUNE_REG, 0x0);
297 omap_rng_write(priv, RNG_FROENABLE_REG, RNG_REG_FROENABLE_MASK);
298 val = RNG_ALARM_THRESHOLD << RNG_ALARMCNT_ALARM_TH_SHIFT;
299 val |= RNG_SHUTDOWN_THRESHOLD << RNG_ALARMCNT_SHUTDOWN_TH_SHIFT;
300 omap_rng_write(priv, RNG_ALARMCNT_REG, val);
301
302 val = RNG_CONTROL_STARTUP_CYCLES << RNG_CONTROL_STARTUP_CYCLES_SHIFT;
303 val |= RNG_CONTROL_ENABLE_TRNG_MASK;
304 omap_rng_write(priv, RNG_CONTROL_REG, val);
305
306 return 0;
307 }
308
omap4_rng_cleanup(struct omap_rng_dev * priv)309 static void omap4_rng_cleanup(struct omap_rng_dev *priv)
310 {
311 int val;
312
313 val = omap_rng_read(priv, RNG_CONTROL_REG);
314 val &= ~RNG_CONTROL_ENABLE_TRNG_MASK;
315 omap_rng_write(priv, RNG_CONTROL_REG, val);
316 }
317
omap4_rng_irq(int irq,void * dev_id)318 static irqreturn_t omap4_rng_irq(int irq, void *dev_id)
319 {
320 struct omap_rng_dev *priv = dev_id;
321 u32 fro_detune, fro_enable;
322
323 /*
324 * Interrupt raised by a fro shutdown threshold, do the following:
325 * 1. Clear the alarm events.
326 * 2. De tune the FROs which are shutdown.
327 * 3. Re enable the shutdown FROs.
328 */
329 omap_rng_write(priv, RNG_ALARMMASK_REG, 0x0);
330 omap_rng_write(priv, RNG_ALARMSTOP_REG, 0x0);
331
332 fro_enable = omap_rng_read(priv, RNG_FROENABLE_REG);
333 fro_detune = ~fro_enable & RNG_REG_FRODETUNE_MASK;
334 fro_detune = fro_detune | omap_rng_read(priv, RNG_FRODETUNE_REG);
335 fro_enable = RNG_REG_FROENABLE_MASK;
336
337 omap_rng_write(priv, RNG_FRODETUNE_REG, fro_detune);
338 omap_rng_write(priv, RNG_FROENABLE_REG, fro_enable);
339
340 omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_SHUTDOWN_OFLO_MASK);
341
342 return IRQ_HANDLED;
343 }
344
345 static struct omap_rng_pdata omap4_rng_pdata = {
346 .regs = (u16 *)reg_map_omap4,
347 .data_size = OMAP4_RNG_OUTPUT_SIZE,
348 .data_present = omap4_rng_data_present,
349 .init = omap4_rng_init,
350 .cleanup = omap4_rng_cleanup,
351 };
352
353 static struct omap_rng_pdata eip76_rng_pdata = {
354 .regs = (u16 *)reg_map_eip76,
355 .data_size = EIP76_RNG_OUTPUT_SIZE,
356 .data_present = omap4_rng_data_present,
357 .init = eip76_rng_init,
358 .cleanup = omap4_rng_cleanup,
359 };
360
361 static const struct of_device_id omap_rng_of_match[] __maybe_unused = {
362 {
363 .compatible = "ti,omap2-rng",
364 .data = &omap2_rng_pdata,
365 },
366 {
367 .compatible = "ti,omap4-rng",
368 .data = &omap4_rng_pdata,
369 },
370 {
371 .compatible = "inside-secure,safexcel-eip76",
372 .data = &eip76_rng_pdata,
373 },
374 {},
375 };
376 MODULE_DEVICE_TABLE(of, omap_rng_of_match);
377
of_get_omap_rng_device_details(struct omap_rng_dev * priv,struct platform_device * pdev)378 static int of_get_omap_rng_device_details(struct omap_rng_dev *priv,
379 struct platform_device *pdev)
380 {
381 const struct of_device_id *match;
382 struct device *dev = &pdev->dev;
383 int irq, err;
384
385 match = of_match_device(of_match_ptr(omap_rng_of_match), dev);
386 if (!match) {
387 dev_err(dev, "no compatible OF match\n");
388 return -EINVAL;
389 }
390 priv->pdata = match->data;
391
392 if (of_device_is_compatible(dev->of_node, "ti,omap4-rng") ||
393 of_device_is_compatible(dev->of_node, "inside-secure,safexcel-eip76")) {
394 irq = platform_get_irq(pdev, 0);
395 if (irq < 0)
396 return irq;
397
398 err = devm_request_irq(dev, irq, omap4_rng_irq,
399 IRQF_TRIGGER_NONE, dev_name(dev), priv);
400 if (err) {
401 dev_err(dev, "unable to request irq %d, err = %d\n",
402 irq, err);
403 return err;
404 }
405
406 /*
407 * On OMAP4, enabling the shutdown_oflo interrupt is
408 * done in the interrupt mask register. There is no
409 * such register on EIP76, and it's enabled by the
410 * same bit in the control register
411 */
412 if (priv->pdata->regs[RNG_INTMASK_REG])
413 omap_rng_write(priv, RNG_INTMASK_REG,
414 RNG_SHUTDOWN_OFLO_MASK);
415 else
416 omap_rng_write(priv, RNG_CONTROL_REG,
417 RNG_SHUTDOWN_OFLO_MASK);
418 }
419 return 0;
420 }
421
get_omap_rng_device_details(struct omap_rng_dev * omap_rng)422 static int get_omap_rng_device_details(struct omap_rng_dev *omap_rng)
423 {
424 /* Only OMAP2/3 can be non-DT */
425 omap_rng->pdata = &omap2_rng_pdata;
426 return 0;
427 }
428
omap_rng_probe(struct platform_device * pdev)429 static int omap_rng_probe(struct platform_device *pdev)
430 {
431 struct omap_rng_dev *priv;
432 struct device *dev = &pdev->dev;
433 int ret;
434
435 priv = devm_kzalloc(dev, sizeof(struct omap_rng_dev), GFP_KERNEL);
436 if (!priv)
437 return -ENOMEM;
438
439 priv->rng.read = omap_rng_do_read;
440 priv->rng.init = omap_rng_init;
441 priv->rng.cleanup = omap_rng_cleanup;
442 priv->rng.quality = 900;
443
444 priv->rng.priv = (unsigned long)priv;
445 platform_set_drvdata(pdev, priv);
446 priv->dev = dev;
447
448 priv->base = devm_platform_ioremap_resource(pdev, 0);
449 if (IS_ERR(priv->base)) {
450 ret = PTR_ERR(priv->base);
451 goto err_ioremap;
452 }
453
454 priv->rng.name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
455 if (!priv->rng.name) {
456 ret = -ENOMEM;
457 goto err_ioremap;
458 }
459
460 pm_runtime_enable(&pdev->dev);
461 ret = pm_runtime_get_sync(&pdev->dev);
462 if (ret < 0) {
463 dev_err(&pdev->dev, "Failed to runtime_get device: %d\n", ret);
464 pm_runtime_put_noidle(&pdev->dev);
465 goto err_ioremap;
466 }
467
468 priv->clk = devm_clk_get(&pdev->dev, NULL);
469 if (PTR_ERR(priv->clk) == -EPROBE_DEFER)
470 return -EPROBE_DEFER;
471 if (!IS_ERR(priv->clk)) {
472 ret = clk_prepare_enable(priv->clk);
473 if (ret) {
474 dev_err(&pdev->dev,
475 "Unable to enable the clk: %d\n", ret);
476 goto err_register;
477 }
478 }
479
480 priv->clk_reg = devm_clk_get(&pdev->dev, "reg");
481 if (PTR_ERR(priv->clk_reg) == -EPROBE_DEFER)
482 return -EPROBE_DEFER;
483 if (!IS_ERR(priv->clk_reg)) {
484 ret = clk_prepare_enable(priv->clk_reg);
485 if (ret) {
486 dev_err(&pdev->dev,
487 "Unable to enable the register clk: %d\n",
488 ret);
489 goto err_register;
490 }
491 }
492
493 ret = (dev->of_node) ? of_get_omap_rng_device_details(priv, pdev) :
494 get_omap_rng_device_details(priv);
495 if (ret)
496 goto err_register;
497
498 ret = devm_hwrng_register(&pdev->dev, &priv->rng);
499 if (ret)
500 goto err_register;
501
502 dev_info(&pdev->dev, "Random Number Generator ver. %02x\n",
503 omap_rng_read(priv, RNG_REV_REG));
504
505 return 0;
506
507 err_register:
508 priv->base = NULL;
509 pm_runtime_put_sync(&pdev->dev);
510 pm_runtime_disable(&pdev->dev);
511
512 clk_disable_unprepare(priv->clk_reg);
513 clk_disable_unprepare(priv->clk);
514 err_ioremap:
515 dev_err(dev, "initialization failed.\n");
516 return ret;
517 }
518
omap_rng_remove(struct platform_device * pdev)519 static int omap_rng_remove(struct platform_device *pdev)
520 {
521 struct omap_rng_dev *priv = platform_get_drvdata(pdev);
522
523
524 priv->pdata->cleanup(priv);
525
526 pm_runtime_put_sync(&pdev->dev);
527 pm_runtime_disable(&pdev->dev);
528
529 clk_disable_unprepare(priv->clk);
530 clk_disable_unprepare(priv->clk_reg);
531
532 return 0;
533 }
534
omap_rng_suspend(struct device * dev)535 static int __maybe_unused omap_rng_suspend(struct device *dev)
536 {
537 struct omap_rng_dev *priv = dev_get_drvdata(dev);
538
539 priv->pdata->cleanup(priv);
540 pm_runtime_put_sync(dev);
541
542 return 0;
543 }
544
omap_rng_resume(struct device * dev)545 static int __maybe_unused omap_rng_resume(struct device *dev)
546 {
547 struct omap_rng_dev *priv = dev_get_drvdata(dev);
548 int ret;
549
550 ret = pm_runtime_get_sync(dev);
551 if (ret < 0) {
552 dev_err(dev, "Failed to runtime_get device: %d\n", ret);
553 pm_runtime_put_noidle(dev);
554 return ret;
555 }
556
557 priv->pdata->init(priv);
558
559 return 0;
560 }
561
562 static SIMPLE_DEV_PM_OPS(omap_rng_pm, omap_rng_suspend, omap_rng_resume);
563
564 static struct platform_driver omap_rng_driver = {
565 .driver = {
566 .name = "omap_rng",
567 .pm = &omap_rng_pm,
568 .of_match_table = of_match_ptr(omap_rng_of_match),
569 },
570 .probe = omap_rng_probe,
571 .remove = omap_rng_remove,
572 };
573
574 module_platform_driver(omap_rng_driver);
575 MODULE_ALIAS("platform:omap_rng");
576 MODULE_AUTHOR("Deepak Saxena (and others)");
577 MODULE_LICENSE("GPL");
578
