1 /*
2 * arch/m68k/mvme16x/config.c
3 *
4 * Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk]
5 *
6 * Based on:
7 *
8 * linux/amiga/config.c
9 *
10 * Copyright (C) 1993 Hamish Macdonald
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file README.legal in the main directory of this archive
14 * for more details.
15 */
16
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/seq_file.h>
21 #include <linux/tty.h>
22 #include <linux/clocksource.h>
23 #include <linux/console.h>
24 #include <linux/linkage.h>
25 #include <linux/init.h>
26 #include <linux/major.h>
27 #include <linux/genhd.h>
28 #include <linux/rtc.h>
29 #include <linux/interrupt.h>
30 #include <linux/module.h>
31
32 #include <asm/bootinfo.h>
33 #include <asm/bootinfo-vme.h>
34 #include <asm/byteorder.h>
35 #include <asm/setup.h>
36 #include <asm/irq.h>
37 #include <asm/traps.h>
38 #include <asm/machdep.h>
39 #include <asm/mvme16xhw.h>
40
41 extern t_bdid mvme_bdid;
42
43 static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
44
45 static void mvme16x_get_model(char *model);
46 extern void mvme16x_sched_init(irq_handler_t handler);
47 extern int mvme16x_hwclk (int, struct rtc_time *);
48 extern void mvme16x_reset (void);
49
50 int bcd2int (unsigned char b);
51
52
53 unsigned short mvme16x_config;
54 EXPORT_SYMBOL(mvme16x_config);
55
56
mvme16x_parse_bootinfo(const struct bi_record * bi)57 int __init mvme16x_parse_bootinfo(const struct bi_record *bi)
58 {
59 uint16_t tag = be16_to_cpu(bi->tag);
60 if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
61 return 0;
62 else
63 return 1;
64 }
65
mvme16x_reset(void)66 void mvme16x_reset(void)
67 {
68 pr_info("\r\n\nCalled mvme16x_reset\r\n"
69 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
70 /* The string of returns is to delay the reset until the whole
71 * message is output. Assert reset bit in GCSR */
72 *(volatile char *)0xfff40107 = 0x80;
73 }
74
mvme16x_get_model(char * model)75 static void mvme16x_get_model(char *model)
76 {
77 p_bdid p = &mvme_bdid;
78 char suf[4];
79
80 suf[1] = p->brdsuffix[0];
81 suf[2] = p->brdsuffix[1];
82 suf[3] = '\0';
83 suf[0] = suf[1] ? '-' : '\0';
84
85 sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf);
86 }
87
88
mvme16x_get_hardware_list(struct seq_file * m)89 static void mvme16x_get_hardware_list(struct seq_file *m)
90 {
91 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
92
93 if (brdno == 0x0162 || brdno == 0x0172)
94 {
95 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
96
97 seq_printf (m, "VMEchip2 %spresent\n",
98 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
99 seq_printf (m, "SCSI interface %spresent\n",
100 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
101 seq_printf (m, "Ethernet i/f %spresent\n",
102 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
103 }
104 }
105
106 /*
107 * This function is called during kernel startup to initialize
108 * the mvme16x IRQ handling routines. Should probably ensure
109 * that the base vectors for the VMEChip2 and PCCChip2 are valid.
110 */
111
mvme16x_init_IRQ(void)112 static void __init mvme16x_init_IRQ (void)
113 {
114 m68k_setup_user_interrupt(VEC_USER, 192);
115 }
116
117 #define PCC2CHIP (0xfff42000)
118 #define PCCSCCMICR (PCC2CHIP + 0x1d)
119 #define PCCSCCTICR (PCC2CHIP + 0x1e)
120 #define PCCSCCRICR (PCC2CHIP + 0x1f)
121 #define PCCTPIACKR (PCC2CHIP + 0x25)
122
123 #ifdef CONFIG_EARLY_PRINTK
124
125 /**** cd2401 registers ****/
126 #define CD2401_ADDR (0xfff45000)
127
128 #define CyGFRCR (0x81)
129 #define CyCCR (0x13)
130 #define CyCLR_CHAN (0x40)
131 #define CyINIT_CHAN (0x20)
132 #define CyCHIP_RESET (0x10)
133 #define CyENB_XMTR (0x08)
134 #define CyDIS_XMTR (0x04)
135 #define CyENB_RCVR (0x02)
136 #define CyDIS_RCVR (0x01)
137 #define CyCAR (0xee)
138 #define CyIER (0x11)
139 #define CyMdmCh (0x80)
140 #define CyRxExc (0x20)
141 #define CyRxData (0x08)
142 #define CyTxMpty (0x02)
143 #define CyTxRdy (0x01)
144 #define CyLICR (0x26)
145 #define CyRISR (0x89)
146 #define CyTIMEOUT (0x80)
147 #define CySPECHAR (0x70)
148 #define CyOVERRUN (0x08)
149 #define CyPARITY (0x04)
150 #define CyFRAME (0x02)
151 #define CyBREAK (0x01)
152 #define CyREOIR (0x84)
153 #define CyTEOIR (0x85)
154 #define CyMEOIR (0x86)
155 #define CyNOTRANS (0x08)
156 #define CyRFOC (0x30)
157 #define CyRDR (0xf8)
158 #define CyTDR (0xf8)
159 #define CyMISR (0x8b)
160 #define CyRISR (0x89)
161 #define CyTISR (0x8a)
162 #define CyMSVR1 (0xde)
163 #define CyMSVR2 (0xdf)
164 #define CyDSR (0x80)
165 #define CyDCD (0x40)
166 #define CyCTS (0x20)
167 #define CyDTR (0x02)
168 #define CyRTS (0x01)
169 #define CyRTPRL (0x25)
170 #define CyRTPRH (0x24)
171 #define CyCOR1 (0x10)
172 #define CyPARITY_NONE (0x00)
173 #define CyPARITY_E (0x40)
174 #define CyPARITY_O (0xC0)
175 #define Cy_5_BITS (0x04)
176 #define Cy_6_BITS (0x05)
177 #define Cy_7_BITS (0x06)
178 #define Cy_8_BITS (0x07)
179 #define CyCOR2 (0x17)
180 #define CyETC (0x20)
181 #define CyCtsAE (0x02)
182 #define CyCOR3 (0x16)
183 #define Cy_1_STOP (0x02)
184 #define Cy_2_STOP (0x04)
185 #define CyCOR4 (0x15)
186 #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
187 #define CyCOR5 (0x14)
188 #define CyCOR6 (0x18)
189 #define CyCOR7 (0x07)
190 #define CyRBPR (0xcb)
191 #define CyRCOR (0xc8)
192 #define CyTBPR (0xc3)
193 #define CyTCOR (0xc0)
194 #define CySCHR1 (0x1f)
195 #define CySCHR2 (0x1e)
196 #define CyTPR (0xda)
197 #define CyPILR1 (0xe3)
198 #define CyPILR2 (0xe0)
199 #define CyPILR3 (0xe1)
200 #define CyCMR (0x1b)
201 #define CyASYNC (0x02)
202 #define CyLICR (0x26)
203 #define CyLIVR (0x09)
204 #define CySCRL (0x23)
205 #define CySCRH (0x22)
206 #define CyTFTC (0x80)
207
mvme16x_cons_write(struct console * co,const char * str,unsigned count)208 void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
209 {
210 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
211 volatile u_char sink;
212 u_char ier;
213 int port;
214 u_char do_lf = 0;
215 int i = 0;
216
217 /* Ensure transmitter is enabled! */
218
219 port = 0;
220 base_addr[CyCAR] = (u_char)port;
221 while (base_addr[CyCCR])
222 ;
223 base_addr[CyCCR] = CyENB_XMTR;
224
225 ier = base_addr[CyIER];
226 base_addr[CyIER] = CyTxMpty;
227
228 while (1) {
229 if (in_8(PCCSCCTICR) & 0x20)
230 {
231 /* We have a Tx int. Acknowledge it */
232 sink = in_8(PCCTPIACKR);
233 if ((base_addr[CyLICR] >> 2) == port) {
234 if (i == count) {
235 /* Last char of string is now output */
236 base_addr[CyTEOIR] = CyNOTRANS;
237 break;
238 }
239 if (do_lf) {
240 base_addr[CyTDR] = '\n';
241 str++;
242 i++;
243 do_lf = 0;
244 }
245 else if (*str == '\n') {
246 base_addr[CyTDR] = '\r';
247 do_lf = 1;
248 }
249 else {
250 base_addr[CyTDR] = *str++;
251 i++;
252 }
253 base_addr[CyTEOIR] = 0;
254 }
255 else
256 base_addr[CyTEOIR] = CyNOTRANS;
257 }
258 }
259
260 base_addr[CyIER] = ier;
261 }
262
263 #endif
264
config_mvme16x(void)265 void __init config_mvme16x(void)
266 {
267 p_bdid p = &mvme_bdid;
268 char id[40];
269 uint16_t brdno = be16_to_cpu(p->brdno);
270
271 mach_max_dma_address = 0xffffffff;
272 mach_sched_init = mvme16x_sched_init;
273 mach_init_IRQ = mvme16x_init_IRQ;
274 mach_hwclk = mvme16x_hwclk;
275 mach_reset = mvme16x_reset;
276 mach_get_model = mvme16x_get_model;
277 mach_get_hardware_list = mvme16x_get_hardware_list;
278
279 /* Report board revision */
280
281 if (strncmp("BDID", p->bdid, 4))
282 {
283 pr_crit("Bug call .BRD_ID returned garbage - giving up\n");
284 while (1)
285 ;
286 }
287 /* Board type is only set by newer versions of vmelilo/tftplilo */
288 if (vme_brdtype == 0)
289 vme_brdtype = brdno;
290
291 mvme16x_get_model(id);
292 pr_info("BRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev >> 4,
293 p->rev & 0xf, p->yr, p->mth, p->day);
294 if (brdno == 0x0162 || brdno == 0x172)
295 {
296 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
297
298 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
299
300 pr_info("MVME%x Hardware status:\n", brdno);
301 pr_info(" CPU Type 68%s040\n",
302 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
303 pr_info(" CPU clock %dMHz\n",
304 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
305 pr_info(" VMEchip2 %spresent\n",
306 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
307 pr_info(" SCSI interface %spresent\n",
308 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
309 pr_info(" Ethernet interface %spresent\n",
310 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
311 }
312 else
313 {
314 mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
315 }
316 }
317
mvme16x_abort_int(int irq,void * dev_id)318 static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
319 {
320 unsigned long *new = (unsigned long *)vectors;
321 unsigned long *old = (unsigned long *)0xffe00000;
322 volatile unsigned char uc, *ucp;
323 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
324
325 if (brdno == 0x0162 || brdno == 0x172)
326 {
327 ucp = (volatile unsigned char *)0xfff42043;
328 uc = *ucp | 8;
329 *ucp = uc;
330 }
331 else
332 {
333 *(volatile unsigned long *)0xfff40074 = 0x40000000;
334 }
335 *(new+4) = *(old+4); /* Illegal instruction */
336 *(new+9) = *(old+9); /* Trace */
337 *(new+47) = *(old+47); /* Trap #15 */
338
339 if (brdno == 0x0162 || brdno == 0x172)
340 *(new+0x5e) = *(old+0x5e); /* ABORT switch */
341 else
342 *(new+0x6e) = *(old+0x6e); /* ABORT switch */
343 return IRQ_HANDLED;
344 }
345
346 static u64 mvme16x_read_clk(struct clocksource *cs);
347
348 static struct clocksource mvme16x_clk = {
349 .name = "pcc",
350 .rating = 250,
351 .read = mvme16x_read_clk,
352 .mask = CLOCKSOURCE_MASK(32),
353 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
354 };
355
356 static u32 clk_total;
357
358 #define PCC_TIMER_CLOCK_FREQ 1000000
359 #define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
360
361 #define PCCTCMP1 (PCC2CHIP + 0x04)
362 #define PCCTCNT1 (PCC2CHIP + 0x08)
363 #define PCCTOVR1 (PCC2CHIP + 0x17)
364 #define PCCTIC1 (PCC2CHIP + 0x1b)
365
366 #define PCCTOVR1_TIC_EN 0x01
367 #define PCCTOVR1_COC_EN 0x02
368 #define PCCTOVR1_OVR_CLR 0x04
369
370 #define PCCTIC1_INT_CLR 0x08
371 #define PCCTIC1_INT_EN 0x10
372
mvme16x_timer_int(int irq,void * dev_id)373 static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
374 {
375 irq_handler_t timer_routine = dev_id;
376 unsigned long flags;
377
378 local_irq_save(flags);
379 out_8(PCCTIC1, in_8(PCCTIC1) | PCCTIC1_INT_CLR);
380 out_8(PCCTOVR1, PCCTOVR1_OVR_CLR);
381 clk_total += PCC_TIMER_CYCLES;
382 timer_routine(0, NULL);
383 local_irq_restore(flags);
384
385 return IRQ_HANDLED;
386 }
387
mvme16x_sched_init(irq_handler_t timer_routine)388 void mvme16x_sched_init (irq_handler_t timer_routine)
389 {
390 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
391 int irq;
392
393 /* Using PCCchip2 or MC2 chip tick timer 1 */
394 out_be32(PCCTCNT1, 0);
395 out_be32(PCCTCMP1, PCC_TIMER_CYCLES);
396 out_8(PCCTOVR1, in_8(PCCTOVR1) | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
397 out_8(PCCTIC1, PCCTIC1_INT_EN | 6);
398 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer",
399 timer_routine))
400 panic ("Couldn't register timer int");
401
402 clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ);
403
404 if (brdno == 0x0162 || brdno == 0x172)
405 irq = MVME162_IRQ_ABORT;
406 else
407 irq = MVME167_IRQ_ABORT;
408 if (request_irq(irq, mvme16x_abort_int, 0,
409 "abort", mvme16x_abort_int))
410 panic ("Couldn't register abort int");
411 }
412
mvme16x_read_clk(struct clocksource * cs)413 static u64 mvme16x_read_clk(struct clocksource *cs)
414 {
415 unsigned long flags;
416 u8 overflow, tmp;
417 u32 ticks;
418
419 local_irq_save(flags);
420 tmp = in_8(PCCTOVR1) >> 4;
421 ticks = in_be32(PCCTCNT1);
422 overflow = in_8(PCCTOVR1) >> 4;
423 if (overflow != tmp)
424 ticks = in_be32(PCCTCNT1);
425 ticks += overflow * PCC_TIMER_CYCLES;
426 ticks += clk_total;
427 local_irq_restore(flags);
428
429 return ticks;
430 }
431
bcd2int(unsigned char b)432 int bcd2int (unsigned char b)
433 {
434 return ((b>>4)*10 + (b&15));
435 }
436
mvme16x_hwclk(int op,struct rtc_time * t)437 int mvme16x_hwclk(int op, struct rtc_time *t)
438 {
439 #warning check me!
440 if (!op) {
441 rtc->ctrl = RTC_READ;
442 t->tm_year = bcd2int (rtc->bcd_year);
443 t->tm_mon = bcd2int(rtc->bcd_mth) - 1;
444 t->tm_mday = bcd2int (rtc->bcd_dom);
445 t->tm_hour = bcd2int (rtc->bcd_hr);
446 t->tm_min = bcd2int (rtc->bcd_min);
447 t->tm_sec = bcd2int (rtc->bcd_sec);
448 rtc->ctrl = 0;
449 if (t->tm_year < 70)
450 t->tm_year += 100;
451 }
452 return 0;
453 }
454
