1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * arch/arm/mach-ixp4xx/vulcan-setup.c
4 *
5 * Arcom/Eurotech Vulcan board-setup
6 *
7 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
8 *
9 * based on fsg-setup.c:
10 * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
11 */
12
13 #include <linux/if_ether.h>
14 #include <linux/irq.h>
15 #include <linux/serial.h>
16 #include <linux/serial_8250.h>
17 #include <linux/io.h>
18 #include <linux/w1-gpio.h>
19 #include <linux/gpio/machine.h>
20 #include <linux/mtd/plat-ram.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/arch.h>
23 #include <asm/mach/flash.h>
24
25 #include "irqs.h"
26
27 static struct flash_platform_data vulcan_flash_data = {
28 .map_name = "cfi_probe",
29 .width = 2,
30 };
31
32 static struct resource vulcan_flash_resource = {
33 .flags = IORESOURCE_MEM,
34 };
35
36 static struct platform_device vulcan_flash = {
37 .name = "IXP4XX-Flash",
38 .id = 0,
39 .dev = {
40 .platform_data = &vulcan_flash_data,
41 },
42 .resource = &vulcan_flash_resource,
43 .num_resources = 1,
44 };
45
46 static struct platdata_mtd_ram vulcan_sram_data = {
47 .mapname = "Vulcan SRAM",
48 .bankwidth = 1,
49 };
50
51 static struct resource vulcan_sram_resource = {
52 .flags = IORESOURCE_MEM,
53 };
54
55 static struct platform_device vulcan_sram = {
56 .name = "mtd-ram",
57 .id = 0,
58 .dev = {
59 .platform_data = &vulcan_sram_data,
60 },
61 .resource = &vulcan_sram_resource,
62 .num_resources = 1,
63 };
64
65 static struct resource vulcan_uart_resources[] = {
66 [0] = {
67 .start = IXP4XX_UART1_BASE_PHYS,
68 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = IXP4XX_UART2_BASE_PHYS,
73 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
74 .flags = IORESOURCE_MEM,
75 },
76 [2] = {
77 .flags = IORESOURCE_MEM,
78 },
79 };
80
81 static struct plat_serial8250_port vulcan_uart_data[] = {
82 [0] = {
83 .mapbase = IXP4XX_UART1_BASE_PHYS,
84 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
85 .irq = IRQ_IXP4XX_UART1,
86 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
87 .iotype = UPIO_MEM,
88 .regshift = 2,
89 .uartclk = IXP4XX_UART_XTAL,
90 },
91 [1] = {
92 .mapbase = IXP4XX_UART2_BASE_PHYS,
93 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
94 .irq = IRQ_IXP4XX_UART2,
95 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
96 .iotype = UPIO_MEM,
97 .regshift = 2,
98 .uartclk = IXP4XX_UART_XTAL,
99 },
100 [2] = {
101 .irq = IXP4XX_GPIO_IRQ(4),
102 .irqflags = IRQF_TRIGGER_LOW,
103 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
104 .iotype = UPIO_MEM,
105 .uartclk = 1843200,
106 },
107 [3] = {
108 .irq = IXP4XX_GPIO_IRQ(4),
109 .irqflags = IRQF_TRIGGER_LOW,
110 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
111 .iotype = UPIO_MEM,
112 .uartclk = 1843200,
113 },
114 { }
115 };
116
117 static struct platform_device vulcan_uart = {
118 .name = "serial8250",
119 .id = PLAT8250_DEV_PLATFORM,
120 .dev = {
121 .platform_data = vulcan_uart_data,
122 },
123 .resource = vulcan_uart_resources,
124 .num_resources = ARRAY_SIZE(vulcan_uart_resources),
125 };
126
127 static struct resource vulcan_npeb_resources[] = {
128 {
129 .start = IXP4XX_EthB_BASE_PHYS,
130 .end = IXP4XX_EthB_BASE_PHYS + 0x0fff,
131 .flags = IORESOURCE_MEM,
132 },
133 };
134
135 static struct resource vulcan_npec_resources[] = {
136 {
137 .start = IXP4XX_EthC_BASE_PHYS,
138 .end = IXP4XX_EthC_BASE_PHYS + 0x0fff,
139 .flags = IORESOURCE_MEM,
140 },
141 };
142
143 static struct eth_plat_info vulcan_plat_eth[] = {
144 [0] = {
145 .phy = 0,
146 .rxq = 3,
147 .txreadyq = 20,
148 },
149 [1] = {
150 .phy = 1,
151 .rxq = 4,
152 .txreadyq = 21,
153 },
154 };
155
156 static struct platform_device vulcan_eth[] = {
157 [0] = {
158 .name = "ixp4xx_eth",
159 .id = IXP4XX_ETH_NPEB,
160 .dev = {
161 .platform_data = &vulcan_plat_eth[0],
162 },
163 .num_resources = ARRAY_SIZE(vulcan_npeb_resources),
164 .resource = vulcan_npeb_resources,
165 },
166 [1] = {
167 .name = "ixp4xx_eth",
168 .id = IXP4XX_ETH_NPEC,
169 .dev = {
170 .platform_data = &vulcan_plat_eth[1],
171 },
172 .num_resources = ARRAY_SIZE(vulcan_npec_resources),
173 .resource = vulcan_npec_resources,
174 },
175 };
176
177 static struct resource vulcan_max6369_resource = {
178 .flags = IORESOURCE_MEM,
179 };
180
181 static struct platform_device vulcan_max6369 = {
182 .name = "max6369_wdt",
183 .id = -1,
184 .resource = &vulcan_max6369_resource,
185 .num_resources = 1,
186 };
187
188 static struct gpiod_lookup_table vulcan_w1_gpiod_table = {
189 .dev_id = "w1-gpio",
190 .table = {
191 GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", 14, NULL, 0,
192 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
193 },
194 };
195
196 static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
197 /* Intentionally left blank */
198 };
199
200 static struct platform_device vulcan_w1_gpio = {
201 .name = "w1-gpio",
202 .id = 0,
203 .dev = {
204 .platform_data = &vulcan_w1_gpio_pdata,
205 },
206 };
207
208 static struct platform_device *vulcan_devices[] __initdata = {
209 &vulcan_uart,
210 &vulcan_flash,
211 &vulcan_sram,
212 &vulcan_max6369,
213 &vulcan_eth[0],
214 &vulcan_eth[1],
215 &vulcan_w1_gpio,
216 };
217
vulcan_init(void)218 static void __init vulcan_init(void)
219 {
220 ixp4xx_sys_init();
221
222 /* Flash is spread over both CS0 and CS1 */
223 vulcan_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
224 vulcan_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
225 *IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN |
226 IXP4XX_EXP_BUS_STROBE_T(3) |
227 IXP4XX_EXP_BUS_SIZE(0xF) |
228 IXP4XX_EXP_BUS_BYTE_RD16 |
229 IXP4XX_EXP_BUS_WR_EN;
230 *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
231
232 /* SRAM on CS2, (256kB, 8bit, writable) */
233 vulcan_sram_resource.start = IXP4XX_EXP_BUS_BASE(2);
234 vulcan_sram_resource.end = IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
235 *IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN |
236 IXP4XX_EXP_BUS_STROBE_T(1) |
237 IXP4XX_EXP_BUS_HOLD_T(2) |
238 IXP4XX_EXP_BUS_SIZE(9) |
239 IXP4XX_EXP_BUS_SPLT_EN |
240 IXP4XX_EXP_BUS_WR_EN |
241 IXP4XX_EXP_BUS_BYTE_EN;
242
243 /* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
244 vulcan_uart_resources[2].start = IXP4XX_EXP_BUS_BASE(3);
245 vulcan_uart_resources[2].end = IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
246 vulcan_uart_data[2].mapbase = vulcan_uart_resources[2].start;
247 vulcan_uart_data[3].mapbase = vulcan_uart_data[2].mapbase + 8;
248 *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
249 IXP4XX_EXP_BUS_STROBE_T(3) |
250 IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|
251 IXP4XX_EXP_BUS_WR_EN |
252 IXP4XX_EXP_BUS_BYTE_EN;
253
254 /* GPIOS on CS4 (512 bytes, 8bits, writable) */
255 *IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN |
256 IXP4XX_EXP_BUS_WR_EN |
257 IXP4XX_EXP_BUS_BYTE_EN;
258
259 /* max6369 on CS5 (512 bytes, 8bits, writable) */
260 vulcan_max6369_resource.start = IXP4XX_EXP_BUS_BASE(5);
261 vulcan_max6369_resource.end = IXP4XX_EXP_BUS_BASE(5);
262 *IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN |
263 IXP4XX_EXP_BUS_WR_EN |
264 IXP4XX_EXP_BUS_BYTE_EN;
265
266 gpiod_add_lookup_table(&vulcan_w1_gpiod_table);
267 platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
268 }
269
270 MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
271 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
272 .map_io = ixp4xx_map_io,
273 .init_early = ixp4xx_init_early,
274 .init_irq = ixp4xx_init_irq,
275 .init_time = ixp4xx_timer_init,
276 .atag_offset = 0x100,
277 .init_machine = vulcan_init,
278 #if defined(CONFIG_PCI)
279 .dma_zone_size = SZ_64M,
280 #endif
281 .restart = ixp4xx_restart,
282 MACHINE_END
283
