1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC 4 * 5 * Copyright (C) 2014 Atmel, 6 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com> 7 */ 8 9#include <dt-bindings/clock/at91.h> 10#include <dt-bindings/dma/at91.h> 11#include <dt-bindings/pinctrl/at91.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/gpio/gpio.h> 14 15/ { 16 #address-cells = <1>; 17 #size-cells = <1>; 18 model = "Atmel SAMA5D4 family SoC"; 19 compatible = "atmel,sama5d4"; 20 interrupt-parent = <&aic>; 21 22 aliases { 23 serial0 = &usart3; 24 serial1 = &usart4; 25 serial2 = &usart2; 26 serial3 = &usart0; 27 serial4 = &usart1; 28 serial5 = &uart0; 29 serial6 = &uart1; 30 gpio0 = &pioA; 31 gpio1 = &pioB; 32 gpio2 = &pioC; 33 gpio3 = &pioD; 34 gpio4 = &pioE; 35 pwm0 = &pwm0; 36 ssc0 = &ssc0; 37 ssc1 = &ssc1; 38 tcb0 = &tcb0; 39 tcb1 = &tcb1; 40 i2c0 = &i2c0; 41 i2c1 = &i2c1; 42 i2c2 = &i2c2; 43 }; 44 cpus { 45 #address-cells = <1>; 46 #size-cells = <0>; 47 48 cpu@0 { 49 device_type = "cpu"; 50 compatible = "arm,cortex-a5"; 51 reg = <0>; 52 next-level-cache = <&L2>; 53 }; 54 }; 55 56 memory@20000000 { 57 device_type = "memory"; 58 reg = <0x20000000 0x20000000>; 59 }; 60 61 clocks { 62 slow_xtal: slow_xtal { 63 compatible = "fixed-clock"; 64 #clock-cells = <0>; 65 clock-frequency = <0>; 66 }; 67 68 main_xtal: main_xtal { 69 compatible = "fixed-clock"; 70 #clock-cells = <0>; 71 clock-frequency = <0>; 72 }; 73 74 adc_op_clk: adc_op_clk{ 75 compatible = "fixed-clock"; 76 #clock-cells = <0>; 77 clock-frequency = <1000000>; 78 }; 79 }; 80 81 ns_sram: sram@210000 { 82 compatible = "mmio-sram"; 83 reg = <0x00210000 0x10000>; 84 #address-cells = <1>; 85 #size-cells = <1>; 86 ranges = <0 0x00210000 0x10000>; 87 }; 88 89 ahb { 90 compatible = "simple-bus"; 91 #address-cells = <1>; 92 #size-cells = <1>; 93 ranges; 94 95 nfc_sram: sram@100000 { 96 compatible = "mmio-sram"; 97 no-memory-wc; 98 reg = <0x100000 0x2400>; 99 #address-cells = <1>; 100 #size-cells = <1>; 101 ranges = <0 0x100000 0x2400>; 102 }; 103 104 usb0: gadget@400000 { 105 compatible = "atmel,sama5d3-udc"; 106 reg = <0x00400000 0x100000 107 0xfc02c000 0x4000>; 108 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>; 109 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 110 clock-names = "pclk", "hclk"; 111 status = "disabled"; 112 }; 113 114 usb1: ohci@500000 { 115 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 116 reg = <0x00500000 0x100000>; 117 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>; 118 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>; 119 clock-names = "ohci_clk", "hclk", "uhpck"; 120 status = "disabled"; 121 }; 122 123 usb2: ehci@600000 { 124 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 125 reg = <0x00600000 0x100000>; 126 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>; 127 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>; 128 clock-names = "usb_clk", "ehci_clk"; 129 status = "disabled"; 130 }; 131 132 L2: cache-controller@a00000 { 133 compatible = "arm,pl310-cache"; 134 reg = <0x00a00000 0x1000>; 135 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>; 136 cache-unified; 137 cache-level = <2>; 138 }; 139 140 ebi: ebi@10000000 { 141 compatible = "atmel,sama5d3-ebi"; 142 #address-cells = <2>; 143 #size-cells = <1>; 144 atmel,smc = <&hsmc>; 145 reg = <0x10000000 0x10000000 146 0x60000000 0x28000000>; 147 ranges = <0x0 0x0 0x10000000 0x10000000 148 0x1 0x0 0x60000000 0x10000000 149 0x2 0x0 0x70000000 0x10000000 150 0x3 0x0 0x80000000 0x8000000>; 151 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 152 status = "disabled"; 153 154 nand_controller: nand-controller { 155 compatible = "atmel,sama5d3-nand-controller"; 156 atmel,nfc-sram = <&nfc_sram>; 157 atmel,nfc-io = <&nfc_io>; 158 ecc-engine = <&pmecc>; 159 #address-cells = <2>; 160 #size-cells = <1>; 161 ranges; 162 status = "disabled"; 163 }; 164 }; 165 166 nfc_io: nfc-io@90000000 { 167 compatible = "atmel,sama5d3-nfc-io", "syscon"; 168 reg = <0x90000000 0x8000000>; 169 }; 170 171 apb { 172 compatible = "simple-bus"; 173 #address-cells = <1>; 174 #size-cells = <1>; 175 ranges; 176 177 hlcdc: hlcdc@f0000000 { 178 compatible = "atmel,sama5d4-hlcdc"; 179 reg = <0xf0000000 0x4000>; 180 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>; 181 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; 182 clock-names = "periph_clk","sys_clk", "slow_clk"; 183 status = "disabled"; 184 185 hlcdc-display-controller { 186 compatible = "atmel,hlcdc-display-controller"; 187 #address-cells = <1>; 188 #size-cells = <0>; 189 190 port@0 { 191 #address-cells = <1>; 192 #size-cells = <0>; 193 reg = <0>; 194 }; 195 }; 196 197 hlcdc_pwm: hlcdc-pwm { 198 compatible = "atmel,hlcdc-pwm"; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&pinctrl_lcd_pwm>; 201 #pwm-cells = <3>; 202 }; 203 }; 204 205 dma1: dma-controller@f0004000 { 206 compatible = "atmel,sama5d4-dma"; 207 reg = <0xf0004000 0x200>; 208 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>; 209 #dma-cells = <1>; 210 clocks = <&pmc PMC_TYPE_PERIPHERAL 50>; 211 clock-names = "dma_clk"; 212 }; 213 214 isi: isi@f0008000 { 215 compatible = "atmel,at91sam9g45-isi"; 216 reg = <0xf0008000 0x4000>; 217 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_isi_data_0_7>; 220 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>; 221 clock-names = "isi_clk"; 222 status = "disabled"; 223 port { 224 #address-cells = <1>; 225 #size-cells = <0>; 226 }; 227 }; 228 229 ramc0: ramc@f0010000 { 230 compatible = "atmel,sama5d3-ddramc"; 231 reg = <0xf0010000 0x200>; 232 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>; 233 clock-names = "ddrck", "mpddr"; 234 }; 235 236 dma0: dma-controller@f0014000 { 237 compatible = "atmel,sama5d4-dma"; 238 reg = <0xf0014000 0x200>; 239 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>; 240 #dma-cells = <1>; 241 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 242 clock-names = "dma_clk"; 243 }; 244 245 pmc: pmc@f0018000 { 246 compatible = "atmel,sama5d4-pmc", "syscon"; 247 reg = <0xf0018000 0x120>; 248 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 249 #clock-cells = <2>; 250 clocks = <&clk32k>, <&main_xtal>; 251 clock-names = "slow_clk", "main_xtal"; 252 }; 253 254 mmc0: mmc@f8000000 { 255 compatible = "atmel,hsmci"; 256 reg = <0xf8000000 0x600>; 257 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; 258 dmas = <&dma1 259 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 260 | AT91_XDMAC_DT_PERID(0))>; 261 dma-names = "rxtx"; 262 pinctrl-names = "default"; 263 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>; 264 status = "disabled"; 265 #address-cells = <1>; 266 #size-cells = <0>; 267 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>; 268 clock-names = "mci_clk"; 269 }; 270 271 uart0: serial@f8004000 { 272 compatible = "atmel,at91sam9260-usart"; 273 reg = <0xf8004000 0x100>; 274 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>; 275 dmas = <&dma0 276 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 277 | AT91_XDMAC_DT_PERID(22))>, 278 <&dma0 279 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 280 | AT91_XDMAC_DT_PERID(23))>; 281 dma-names = "tx", "rx"; 282 pinctrl-names = "default"; 283 pinctrl-0 = <&pinctrl_uart0>; 284 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>; 285 clock-names = "usart"; 286 status = "disabled"; 287 }; 288 289 ssc0: ssc@f8008000 { 290 compatible = "atmel,at91sam9g45-ssc"; 291 reg = <0xf8008000 0x4000>; 292 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>; 293 pinctrl-names = "default"; 294 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 295 dmas = <&dma1 296 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 297 | AT91_XDMAC_DT_PERID(26))>, 298 <&dma1 299 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 300 | AT91_XDMAC_DT_PERID(27))>; 301 dma-names = "tx", "rx"; 302 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>; 303 clock-names = "pclk"; 304 status = "disabled"; 305 }; 306 307 pwm0: pwm@f800c000 { 308 compatible = "atmel,sama5d3-pwm"; 309 reg = <0xf800c000 0x300>; 310 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>; 311 #pwm-cells = <3>; 312 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; 313 status = "disabled"; 314 }; 315 316 spi0: spi@f8010000 { 317 #address-cells = <1>; 318 #size-cells = <0>; 319 compatible = "atmel,at91rm9200-spi"; 320 reg = <0xf8010000 0x100>; 321 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>; 322 dmas = <&dma1 323 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 324 | AT91_XDMAC_DT_PERID(10))>, 325 <&dma1 326 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 327 | AT91_XDMAC_DT_PERID(11))>; 328 dma-names = "tx", "rx"; 329 pinctrl-names = "default"; 330 pinctrl-0 = <&pinctrl_spi0>; 331 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; 332 clock-names = "spi_clk"; 333 status = "disabled"; 334 }; 335 336 i2c0: i2c@f8014000 { 337 compatible = "atmel,sama5d4-i2c"; 338 reg = <0xf8014000 0x4000>; 339 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>; 340 dmas = <&dma1 341 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 342 | AT91_XDMAC_DT_PERID(2))>, 343 <&dma1 344 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 345 | AT91_XDMAC_DT_PERID(3))>; 346 dma-names = "tx", "rx"; 347 pinctrl-names = "default", "gpio"; 348 pinctrl-0 = <&pinctrl_i2c0>; 349 pinctrl-1 = <&pinctrl_i2c0_gpio>; 350 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; 351 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 352 #address-cells = <1>; 353 #size-cells = <0>; 354 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; 355 status = "disabled"; 356 }; 357 358 i2c1: i2c@f8018000 { 359 compatible = "atmel,sama5d4-i2c"; 360 reg = <0xf8018000 0x4000>; 361 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>; 362 dmas = <&dma0 363 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 364 | AT91_XDMAC_DT_PERID(4))>, 365 <&dma0 366 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 367 | AT91_XDMAC_DT_PERID(5))>; 368 dma-names = "tx", "rx"; 369 pinctrl-names = "default", "gpio"; 370 pinctrl-0 = <&pinctrl_i2c1>; 371 pinctrl-1 = <&pinctrl_i2c1_gpio>; 372 sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; 373 scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 374 #address-cells = <1>; 375 #size-cells = <0>; 376 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; 377 status = "disabled"; 378 }; 379 380 tcb0: timer@f801c000 { 381 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 382 #address-cells = <1>; 383 #size-cells = <0>; 384 reg = <0xf801c000 0x100>; 385 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>; 386 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>; 387 clock-names = "t0_clk", "slow_clk"; 388 }; 389 390 macb0: ethernet@f8020000 { 391 compatible = "atmel,sama5d4-gem"; 392 reg = <0xf8020000 0x100>; 393 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>; 394 pinctrl-names = "default"; 395 pinctrl-0 = <&pinctrl_macb0_rmii>; 396 #address-cells = <1>; 397 #size-cells = <0>; 398 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>; 399 clock-names = "hclk", "pclk"; 400 status = "disabled"; 401 }; 402 403 i2c2: i2c@f8024000 { 404 compatible = "atmel,sama5d4-i2c"; 405 reg = <0xf8024000 0x4000>; 406 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>; 407 dmas = <&dma1 408 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 409 | AT91_XDMAC_DT_PERID(6))>, 410 <&dma1 411 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 412 | AT91_XDMAC_DT_PERID(7))>; 413 dma-names = "tx", "rx"; 414 pinctrl-names = "default", "gpio"; 415 pinctrl-0 = <&pinctrl_i2c2>; 416 pinctrl-1 = <&pinctrl_i2c2_gpio>; 417 sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>; 418 scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 419 #address-cells = <1>; 420 #size-cells = <0>; 421 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>; 422 status = "disabled"; 423 }; 424 425 sfr: sfr@f8028000 { 426 compatible = "atmel,sama5d4-sfr", "syscon"; 427 reg = <0xf8028000 0x60>; 428 }; 429 430 usart0: serial@f802c000 { 431 compatible = "atmel,at91sam9260-usart"; 432 reg = <0xf802c000 0x100>; 433 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 434 dmas = <&dma0 435 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 436 | AT91_XDMAC_DT_PERID(36))>, 437 <&dma0 438 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 439 | AT91_XDMAC_DT_PERID(37))>; 440 dma-names = "tx", "rx"; 441 pinctrl-names = "default"; 442 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>; 443 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 444 clock-names = "usart"; 445 status = "disabled"; 446 }; 447 448 usart1: serial@f8030000 { 449 compatible = "atmel,at91sam9260-usart"; 450 reg = <0xf8030000 0x100>; 451 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 452 dmas = <&dma0 453 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 454 | AT91_XDMAC_DT_PERID(38))>, 455 <&dma0 456 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 457 | AT91_XDMAC_DT_PERID(39))>; 458 dma-names = "tx", "rx"; 459 pinctrl-names = "default"; 460 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>; 461 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 462 clock-names = "usart"; 463 status = "disabled"; 464 }; 465 466 mmc1: mmc@fc000000 { 467 compatible = "atmel,hsmci"; 468 reg = <0xfc000000 0x600>; 469 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; 470 dmas = <&dma1 471 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 472 | AT91_XDMAC_DT_PERID(1))>; 473 dma-names = "rxtx"; 474 pinctrl-names = "default"; 475 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; 476 status = "disabled"; 477 #address-cells = <1>; 478 #size-cells = <0>; 479 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; 480 clock-names = "mci_clk"; 481 }; 482 483 uart1: serial@fc004000 { 484 compatible = "atmel,at91sam9260-usart"; 485 reg = <0xfc004000 0x100>; 486 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; 487 dmas = <&dma0 488 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 489 | AT91_XDMAC_DT_PERID(24))>, 490 <&dma0 491 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 492 | AT91_XDMAC_DT_PERID(25))>; 493 dma-names = "tx", "rx"; 494 pinctrl-names = "default"; 495 pinctrl-0 = <&pinctrl_uart1>; 496 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; 497 clock-names = "usart"; 498 status = "disabled"; 499 }; 500 501 usart2: serial@fc008000 { 502 compatible = "atmel,at91sam9260-usart"; 503 reg = <0xfc008000 0x100>; 504 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; 505 dmas = <&dma1 506 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 507 | AT91_XDMAC_DT_PERID(16))>, 508 <&dma1 509 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 510 | AT91_XDMAC_DT_PERID(17))>; 511 dma-names = "tx", "rx"; 512 pinctrl-names = "default"; 513 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>; 514 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>; 515 clock-names = "usart"; 516 status = "disabled"; 517 }; 518 519 usart3: serial@fc00c000 { 520 compatible = "atmel,at91sam9260-usart"; 521 reg = <0xfc00c000 0x100>; 522 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>; 523 dmas = <&dma1 524 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 525 | AT91_XDMAC_DT_PERID(18))>, 526 <&dma1 527 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 528 | AT91_XDMAC_DT_PERID(19))>; 529 dma-names = "tx", "rx"; 530 pinctrl-names = "default"; 531 pinctrl-0 = <&pinctrl_usart3>; 532 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; 533 clock-names = "usart"; 534 status = "disabled"; 535 }; 536 537 usart4: serial@fc010000 { 538 compatible = "atmel,at91sam9260-usart"; 539 reg = <0xfc010000 0x100>; 540 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>; 541 dmas = <&dma1 542 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 543 | AT91_XDMAC_DT_PERID(20))>, 544 <&dma1 545 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 546 | AT91_XDMAC_DT_PERID(21))>; 547 dma-names = "tx", "rx"; 548 pinctrl-names = "default"; 549 pinctrl-0 = <&pinctrl_usart4>; 550 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; 551 clock-names = "usart"; 552 status = "disabled"; 553 }; 554 555 ssc1: ssc@fc014000 { 556 compatible = "atmel,at91sam9g45-ssc"; 557 reg = <0xfc014000 0x4000>; 558 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>; 559 pinctrl-names = "default"; 560 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 561 dmas = <&dma1 562 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 563 | AT91_XDMAC_DT_PERID(28))>, 564 <&dma1 565 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 566 | AT91_XDMAC_DT_PERID(29))>; 567 dma-names = "tx", "rx"; 568 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>; 569 clock-names = "pclk"; 570 status = "disabled"; 571 }; 572 573 spi1: spi@fc018000 { 574 #address-cells = <1>; 575 #size-cells = <0>; 576 compatible = "atmel,at91rm9200-spi"; 577 reg = <0xfc018000 0x100>; 578 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>; 579 dmas = <&dma1 580 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 581 | AT91_XDMAC_DT_PERID(12))>, 582 <&dma1 583 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 584 | AT91_XDMAC_DT_PERID(13))>; 585 dma-names = "tx", "rx"; 586 pinctrl-names = "default"; 587 pinctrl-0 = <&pinctrl_spi1>; 588 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; 589 clock-names = "spi_clk"; 590 status = "disabled"; 591 }; 592 593 spi2: spi@fc01c000 { 594 #address-cells = <1>; 595 #size-cells = <0>; 596 compatible = "atmel,at91rm9200-spi"; 597 reg = <0xfc01c000 0x100>; 598 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>; 599 dmas = <&dma0 600 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 601 | AT91_XDMAC_DT_PERID(14))>, 602 <&dma0 603 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 604 | AT91_XDMAC_DT_PERID(15))>; 605 dma-names = "tx", "rx"; 606 pinctrl-names = "default"; 607 pinctrl-0 = <&pinctrl_spi2>; 608 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; 609 clock-names = "spi_clk"; 610 status = "disabled"; 611 }; 612 613 tcb1: timer@fc020000 { 614 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 615 #address-cells = <1>; 616 #size-cells = <0>; 617 reg = <0xfc020000 0x100>; 618 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>; 619 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>; 620 clock-names = "t0_clk", "slow_clk"; 621 }; 622 623 tcb2: timer@fc024000 { 624 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 625 #address-cells = <1>; 626 #size-cells = <0>; 627 reg = <0xfc024000 0x100>; 628 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; 629 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>; 630 clock-names = "t0_clk", "slow_clk"; 631 }; 632 633 macb1: ethernet@fc028000 { 634 compatible = "atmel,sama5d4-gem"; 635 reg = <0xfc028000 0x100>; 636 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>; 637 pinctrl-names = "default"; 638 pinctrl-0 = <&pinctrl_macb1_rmii>; 639 #address-cells = <1>; 640 #size-cells = <0>; 641 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>; 642 clock-names = "hclk", "pclk"; 643 status = "disabled"; 644 }; 645 646 trng@fc030000 { 647 compatible = "atmel,at91sam9g45-trng"; 648 reg = <0xfc030000 0x100>; 649 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>; 650 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>; 651 }; 652 653 adc0: adc@fc034000 { 654 compatible = "atmel,at91sam9x5-adc"; 655 reg = <0xfc034000 0x100>; 656 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>; 657 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>, 658 <&adc_op_clk>; 659 clock-names = "adc_clk", "adc_op_clk"; 660 atmel,adc-channels-used = <0x01f>; 661 atmel,adc-startup-time = <40>; 662 atmel,adc-use-external-triggers; 663 atmel,adc-vref = <3000>; 664 atmel,adc-res = <8 10>; 665 atmel,adc-sample-hold-time = <11>; 666 atmel,adc-res-names = "lowres", "highres"; 667 atmel,adc-ts-pressure-threshold = <10000>; 668 status = "disabled"; 669 670 trigger0 { 671 trigger-name = "external-rising"; 672 trigger-value = <0x1>; 673 trigger-external; 674 }; 675 trigger1 { 676 trigger-name = "external-falling"; 677 trigger-value = <0x2>; 678 trigger-external; 679 }; 680 trigger2 { 681 trigger-name = "external-any"; 682 trigger-value = <0x3>; 683 trigger-external; 684 }; 685 trigger3 { 686 trigger-name = "continuous"; 687 trigger-value = <0x6>; 688 }; 689 }; 690 691 aes@fc044000 { 692 compatible = "atmel,at91sam9g46-aes"; 693 reg = <0xfc044000 0x100>; 694 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; 695 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 696 | AT91_XDMAC_DT_PERID(41))>, 697 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 698 | AT91_XDMAC_DT_PERID(40))>; 699 dma-names = "tx", "rx"; 700 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 701 clock-names = "aes_clk"; 702 status = "okay"; 703 }; 704 705 tdes@fc04c000 { 706 compatible = "atmel,at91sam9g46-tdes"; 707 reg = <0xfc04c000 0x100>; 708 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>; 709 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 710 | AT91_XDMAC_DT_PERID(42))>, 711 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 712 | AT91_XDMAC_DT_PERID(43))>; 713 dma-names = "tx", "rx"; 714 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 715 clock-names = "tdes_clk"; 716 status = "okay"; 717 }; 718 719 sha@fc050000 { 720 compatible = "atmel,at91sam9g46-sha"; 721 reg = <0xfc050000 0x100>; 722 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>; 723 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) 724 | AT91_XDMAC_DT_PERID(44))>; 725 dma-names = "tx"; 726 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 727 clock-names = "sha_clk"; 728 status = "okay"; 729 }; 730 731 hsmc: smc@fc05c000 { 732 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; 733 reg = <0xfc05c000 0x1000>; 734 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>; 735 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; 736 #address-cells = <1>; 737 #size-cells = <1>; 738 ranges; 739 740 pmecc: ecc-engine@ffffc070 { 741 compatible = "atmel,sama5d4-pmecc"; 742 reg = <0xfc05c070 0x490>, 743 <0xfc05c500 0x100>; 744 }; 745 }; 746 747 reset_controller: rstc@fc068600 { 748 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; 749 reg = <0xfc068600 0x10>; 750 clocks = <&clk32k>; 751 }; 752 753 shutdown_controller: shdwc@fc068610 { 754 compatible = "atmel,at91sam9x5-shdwc"; 755 reg = <0xfc068610 0x10>; 756 clocks = <&clk32k>; 757 }; 758 759 pit: timer@fc068630 { 760 compatible = "atmel,at91sam9260-pit"; 761 reg = <0xfc068630 0x10>; 762 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 763 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>; 764 }; 765 766 watchdog: watchdog@fc068640 { 767 compatible = "atmel,sama5d4-wdt"; 768 reg = <0xfc068640 0x10>; 769 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; 770 clocks = <&clk32k>; 771 status = "disabled"; 772 }; 773 774 clk32k: sckc@fc068650 { 775 compatible = "atmel,sama5d4-sckc"; 776 reg = <0xfc068650 0x4>; 777 #clock-cells = <0>; 778 clocks = <&slow_xtal>; 779 }; 780 781 rtc@fc0686b0 { 782 compatible = "atmel,sama5d4-rtc"; 783 reg = <0xfc0686b0 0x30>; 784 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 785 clocks = <&clk32k>; 786 }; 787 788 dbgu: serial@fc069000 { 789 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 790 reg = <0xfc069000 0x200>; 791 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>; 792 pinctrl-names = "default"; 793 pinctrl-0 = <&pinctrl_dbgu>; 794 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; 795 clock-names = "usart"; 796 status = "disabled"; 797 }; 798 799 800 pinctrl: pinctrl@fc06a000 { 801 #address-cells = <1>; 802 #size-cells = <1>; 803 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; 804 ranges = <0xfc068000 0xfc068000 0x100 805 0xfc06a000 0xfc06a000 0x4000>; 806 /* WARNING: revisit as pin spec has changed */ 807 atmel,mux-mask = < 808 /* A B C */ 809 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */ 810 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */ 811 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */ 812 0x0003ff00 0x8002a800 0x00000000 /* pioD */ 813 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */ 814 >; 815 816 pioA: gpio@fc06a000 { 817 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 818 reg = <0xfc06a000 0x100>; 819 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>; 820 #gpio-cells = <2>; 821 gpio-controller; 822 interrupt-controller; 823 #interrupt-cells = <2>; 824 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; 825 }; 826 827 pioB: gpio@fc06b000 { 828 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 829 reg = <0xfc06b000 0x100>; 830 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>; 831 #gpio-cells = <2>; 832 gpio-controller; 833 interrupt-controller; 834 #interrupt-cells = <2>; 835 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 836 }; 837 838 pioC: gpio@fc06c000 { 839 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 840 reg = <0xfc06c000 0x100>; 841 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>; 842 #gpio-cells = <2>; 843 gpio-controller; 844 interrupt-controller; 845 #interrupt-cells = <2>; 846 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; 847 }; 848 849 pioD: gpio@fc068000 { 850 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 851 reg = <0xfc068000 0x100>; 852 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 853 #gpio-cells = <2>; 854 gpio-controller; 855 interrupt-controller; 856 #interrupt-cells = <2>; 857 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 858 }; 859 860 pioE: gpio@fc06d000 { 861 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 862 reg = <0xfc06d000 0x100>; 863 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>; 864 #gpio-cells = <2>; 865 gpio-controller; 866 interrupt-controller; 867 #interrupt-cells = <2>; 868 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; 869 }; 870 871 /* pinctrl pin settings */ 872 adc0 { 873 pinctrl_adc0_adtrg: adc0_adtrg { 874 atmel,pins = 875 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */ 876 }; 877 pinctrl_adc0_ad0: adc0_ad0 { 878 atmel,pins = 879 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 880 }; 881 pinctrl_adc0_ad1: adc0_ad1 { 882 atmel,pins = 883 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 884 }; 885 pinctrl_adc0_ad2: adc0_ad2 { 886 atmel,pins = 887 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 888 }; 889 pinctrl_adc0_ad3: adc0_ad3 { 890 atmel,pins = 891 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 892 }; 893 pinctrl_adc0_ad4: adc0_ad4 { 894 atmel,pins = 895 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 896 }; 897 }; 898 899 dbgu { 900 pinctrl_dbgu: dbgu-0 { 901 atmel,pins = 902 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with D14 and TDI */ 903 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */ 904 }; 905 }; 906 907 ebi { 908 pinctrl_ebi_addr: ebi-addr-0 { 909 atmel,pins = 910 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE 911 AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE 912 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE 913 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE 914 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE 915 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE 916 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE 917 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE 918 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE 919 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE 920 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE 921 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE 922 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE 923 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE 924 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE 925 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE 926 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE 927 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE 928 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE 929 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE 930 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE 931 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE 932 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE 933 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 934 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE 935 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 936 }; 937 938 pinctrl_ebi_nand_addr: ebi-addr-1 { 939 atmel,pins = 940 <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE 941 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 942 }; 943 944 pinctrl_ebi_cs0: ebi-cs0-0 { 945 atmel,pins = 946 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 947 }; 948 949 pinctrl_ebi_cs1: ebi-cs1-0 { 950 atmel,pins = 951 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 952 }; 953 954 pinctrl_ebi_cs2: ebi-cs2-0 { 955 atmel,pins = 956 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 957 }; 958 959 pinctrl_ebi_cs3: ebi-cs3-0 { 960 atmel,pins = 961 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 962 }; 963 964 pinctrl_ebi_data_0_7: ebi-data-lsb-0 { 965 atmel,pins = 966 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE 967 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE 968 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE 969 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE 970 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE 971 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE 972 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE 973 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; 974 }; 975 976 pinctrl_ebi_data_8_15: ebi-data-msb-0 { 977 atmel,pins = 978 <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE 979 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE 980 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE 981 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE 982 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE 983 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE 984 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE 985 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; 986 }; 987 988 pinctrl_ebi_nandrdy: ebi-nandrdy-0 { 989 atmel,pins = 990 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; 991 }; 992 993 pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 { 994 atmel,pins = 995 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; 996 }; 997 998 pinctrl_ebi_nwait: ebi-nwait-0 { 999 atmel,pins = 1000 <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1001 }; 1002 1003 pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 { 1004 atmel,pins = 1005 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1006 }; 1007 1008 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { 1009 atmel,pins = 1010 <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1011 }; 1012 }; 1013 1014 i2c0 { 1015 pinctrl_i2c0: i2c0-0 { 1016 atmel,pins = 1017 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE 1018 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1019 }; 1020 1021 pinctrl_i2c0_gpio: i2c0-gpio { 1022 atmel,pins = 1023 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 1024 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 1025 }; 1026 }; 1027 1028 i2c1 { 1029 pinctrl_i2c1: i2c1-0 { 1030 atmel,pins = 1031 <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* TWD1, conflicts with UART0 RX and DIBP */ 1032 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */ 1033 }; 1034 1035 pinctrl_i2c1_gpio: i2c1-gpio { 1036 atmel,pins = 1037 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 1038 AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 1039 }; 1040 }; 1041 1042 i2c2 { 1043 pinctrl_i2c2: i2c2-0 { 1044 atmel,pins = 1045 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */ 1046 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */ 1047 }; 1048 1049 pinctrl_i2c2_gpio: i2c2-gpio { 1050 atmel,pins = 1051 <AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 1052 AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 1053 }; 1054 }; 1055 1056 isi { 1057 pinctrl_isi_data_0_7: isi-0-data-0-7 { 1058 atmel,pins = 1059 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D0 */ 1060 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D1 */ 1061 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D2 */ 1062 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D3 */ 1063 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D4 */ 1064 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D5 */ 1065 AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D6 */ 1066 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D7 */ 1067 AT91_PIOB 1 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_PCK, conflict with G0_RXCK */ 1068 AT91_PIOB 3 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_VSYNC */ 1069 AT91_PIOB 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */ 1070 }; 1071 pinctrl_isi_data_8_9: isi-0-data-8-9 { 1072 atmel,pins = 1073 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */ 1074 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */ 1075 }; 1076 pinctrl_isi_data_10_11: isi-0-data-10-11 { 1077 atmel,pins = 1078 <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */ 1079 AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */ 1080 }; 1081 }; 1082 1083 lcd { 1084 pinctrl_lcd_base: lcd-base-0 { 1085 atmel,pins = 1086 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */ 1087 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */ 1088 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */ 1089 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */ 1090 }; 1091 pinctrl_lcd_pwm: lcd-pwm-0 { 1092 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */ 1093 }; 1094 pinctrl_lcd_rgb444: lcd-rgb-0 { 1095 atmel,pins = 1096 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 1097 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 1098 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1099 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1100 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1101 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1102 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1103 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1104 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 1105 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 1106 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1107 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */ 1108 }; 1109 pinctrl_lcd_rgb565: lcd-rgb-1 { 1110 atmel,pins = 1111 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 1112 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 1113 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1114 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1115 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1116 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1117 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1118 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1119 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 1120 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 1121 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1122 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 1123 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 1124 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 1125 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 1126 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */ 1127 }; 1128 pinctrl_lcd_rgb666: lcd-rgb-2 { 1129 atmel,pins = 1130 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1131 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1132 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1133 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1134 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1135 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1136 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1137 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 1138 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 1139 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 1140 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 1141 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ 1142 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ 1143 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ 1144 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ 1145 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ 1146 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ 1147 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ 1148 }; 1149 pinctrl_lcd_rgb777: lcd-rgb-3 { 1150 atmel,pins = 1151 /* LCDDAT0 conflicts with TMS */ 1152 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 1153 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1154 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1155 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1156 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1157 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1158 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1159 /* LCDDAT8 conflicts with TCK */ 1160 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 1161 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1162 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 1163 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 1164 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 1165 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 1166 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ 1167 /* LCDDAT16 conflicts with NTRST */ 1168 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ 1169 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ 1170 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ 1171 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ 1172 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ 1173 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ 1174 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ 1175 }; 1176 pinctrl_lcd_rgb888: lcd-rgb-4 { 1177 atmel,pins = 1178 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ 1179 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ 1180 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ 1181 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ 1182 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ 1183 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ 1184 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ 1185 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ 1186 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ 1187 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ 1188 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ 1189 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ 1190 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ 1191 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ 1192 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ 1193 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ 1194 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ 1195 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ 1196 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ 1197 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ 1198 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ 1199 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ 1200 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ 1201 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ 1202 }; 1203 }; 1204 1205 macb0 { 1206 pinctrl_macb0_rmii: macb0_rmii-0 { 1207 atmel,pins = 1208 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */ 1209 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */ 1210 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */ 1211 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */ 1212 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */ 1213 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */ 1214 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */ 1215 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */ 1216 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */ 1217 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */ 1218 >; 1219 }; 1220 }; 1221 1222 macb1 { 1223 pinctrl_macb1_rmii: macb1_rmii-0 { 1224 atmel,pins = 1225 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */ 1226 AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */ 1227 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */ 1228 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */ 1229 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */ 1230 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */ 1231 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */ 1232 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */ 1233 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */ 1234 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */ 1235 >; 1236 }; 1237 }; 1238 1239 mmc0 { 1240 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 1241 atmel,pins = 1242 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */ 1243 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */ 1244 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */ 1245 >; 1246 }; 1247 pinctrl_mmc0_dat1_3: mmc0_dat1_3 { 1248 atmel,pins = 1249 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */ 1250 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */ 1251 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */ 1252 >; 1253 }; 1254 pinctrl_mmc0_dat4_7: mmc0_dat4_7 { 1255 atmel,pins = 1256 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4, conflict with NAND_D5 */ 1257 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */ 1258 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict with NAND_D7 */ 1259 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_OE */ 1260 >; 1261 }; 1262 }; 1263 1264 mmc1 { 1265 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { 1266 atmel,pins = 1267 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */ 1268 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */ 1269 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */ 1270 >; 1271 }; 1272 pinctrl_mmc1_dat1_3: mmc1_dat1_3 { 1273 atmel,pins = 1274 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */ 1275 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */ 1276 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */ 1277 >; 1278 }; 1279 }; 1280 1281 nand0 { 1282 pinctrl_nand: nand-0 { 1283 atmel,pins = 1284 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */ 1285 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */ 1286 1287 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */ 1288 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */ 1289 1290 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */ 1291 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */ 1292 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */ 1293 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */ 1294 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */ 1295 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */ 1296 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */ 1297 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */ 1298 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */ 1299 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */ 1300 }; 1301 }; 1302 1303 spi0 { 1304 pinctrl_spi0: spi0-0 { 1305 atmel,pins = 1306 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */ 1307 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */ 1308 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */ 1309 >; 1310 }; 1311 }; 1312 1313 ssc0 { 1314 pinctrl_ssc0_tx: ssc0_tx { 1315 atmel,pins = 1316 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK0 */ 1317 AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF0 */ 1318 AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */ 1319 }; 1320 1321 pinctrl_ssc0_rx: ssc0_rx { 1322 atmel,pins = 1323 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK0 */ 1324 AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */ 1325 AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */ 1326 }; 1327 }; 1328 1329 ssc1 { 1330 pinctrl_ssc1_tx: ssc1_tx { 1331 atmel,pins = 1332 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK1 */ 1333 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF1 */ 1334 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */ 1335 }; 1336 1337 pinctrl_ssc1_rx: ssc1_rx { 1338 atmel,pins = 1339 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK1 */ 1340 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */ 1341 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */ 1342 }; 1343 }; 1344 1345 spi1 { 1346 pinctrl_spi1: spi1-0 { 1347 atmel,pins = 1348 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MISO */ 1349 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MOSI */ 1350 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_SPCK */ 1351 >; 1352 }; 1353 }; 1354 1355 spi2 { 1356 pinctrl_spi2: spi2-0 { 1357 atmel,pins = 1358 <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MISO conflicts with RTS0 */ 1359 AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MOSI conflicts with TXD0 */ 1360 AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_SPCK conflicts with RTS1 */ 1361 >; 1362 }; 1363 }; 1364 1365 uart0 { 1366 pinctrl_uart0: uart0-0 { 1367 atmel,pins = 1368 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */ 1369 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */ 1370 >; 1371 }; 1372 }; 1373 1374 uart1 { 1375 pinctrl_uart1: uart1-0 { 1376 atmel,pins = 1377 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */ 1378 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */ 1379 >; 1380 }; 1381 }; 1382 1383 usart0 { 1384 pinctrl_usart0: usart0-0 { 1385 atmel,pins = 1386 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */ 1387 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */ 1388 >; 1389 }; 1390 pinctrl_usart0_rts: usart0_rts-0 { 1391 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1392 }; 1393 pinctrl_usart0_cts: usart0_cts-0 { 1394 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1395 }; 1396 }; 1397 1398 usart1 { 1399 pinctrl_usart1: usart1-0 { 1400 atmel,pins = 1401 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */ 1402 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */ 1403 >; 1404 }; 1405 pinctrl_usart1_rts: usart1_rts-0 { 1406 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1407 }; 1408 pinctrl_usart1_cts: usart1_cts-0 { 1409 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; 1410 }; 1411 }; 1412 1413 usart2 { 1414 pinctrl_usart2: usart2-0 { 1415 atmel,pins = 1416 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */ 1417 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */ 1418 >; 1419 }; 1420 pinctrl_usart2_rts: usart2_rts-0 { 1421 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */ 1422 }; 1423 pinctrl_usart2_cts: usart2_cts-0 { 1424 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */ 1425 }; 1426 }; 1427 1428 usart3 { 1429 pinctrl_usart3: usart3-0 { 1430 atmel,pins = 1431 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */ 1432 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */ 1433 >; 1434 }; 1435 }; 1436 1437 usart4 { 1438 pinctrl_usart4: usart4-0 { 1439 atmel,pins = 1440 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */ 1441 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */ 1442 >; 1443 }; 1444 pinctrl_usart4_rts: usart4_rts-0 { 1445 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */ 1446 }; 1447 pinctrl_usart4_cts: usart4_cts-0 { 1448 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */ 1449 }; 1450 }; 1451 }; 1452 1453 aic: interrupt-controller@fc06e000 { 1454 #interrupt-cells = <3>; 1455 compatible = "atmel,sama5d4-aic"; 1456 interrupt-controller; 1457 reg = <0xfc06e000 0x200>; 1458 atmel,external-irqs = <56>; 1459 }; 1460 }; 1461 }; 1462}; 1463
