1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 //
3 // Copyright (c) 2018 BayLibre, SAS.
4 // Author: Jerome Brunet <jbrunet@baylibre.com>
5
6 /* This driver implements the frontend capture DAI of AXG based SoCs */
7
8 #include <linux/clk.h>
9 #include <linux/regmap.h>
10 #include <linux/module.h>
11 #include <linux/of_platform.h>
12 #include <sound/pcm_params.h>
13 #include <sound/soc.h>
14 #include <sound/soc-dai.h>
15
16 #include "axg-fifo.h"
17
18 #define CTRL0_TODDR_SEL_RESAMPLE BIT(30)
19 #define CTRL0_TODDR_EXT_SIGNED BIT(29)
20 #define CTRL0_TODDR_PP_MODE BIT(28)
21 #define CTRL0_TODDR_TYPE_MASK GENMASK(15, 13)
22 #define CTRL0_TODDR_TYPE(x) ((x) << 13)
23 #define CTRL0_TODDR_MSB_POS_MASK GENMASK(12, 8)
24 #define CTRL0_TODDR_MSB_POS(x) ((x) << 8)
25 #define CTRL0_TODDR_LSB_POS_MASK GENMASK(7, 3)
26 #define CTRL0_TODDR_LSB_POS(x) ((x) << 3)
27
axg_toddr_pcm_new(struct snd_soc_pcm_runtime * rtd,struct snd_soc_dai * dai)28 static int axg_toddr_pcm_new(struct snd_soc_pcm_runtime *rtd,
29 struct snd_soc_dai *dai)
30 {
31 return axg_fifo_pcm_new(rtd, SNDRV_PCM_STREAM_CAPTURE);
32 }
33
axg_toddr_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)34 static int axg_toddr_dai_hw_params(struct snd_pcm_substream *substream,
35 struct snd_pcm_hw_params *params,
36 struct snd_soc_dai *dai)
37 {
38 struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
39 unsigned int type, width, msb = 31;
40
41 /*
42 * NOTE:
43 * Almost all backend will place the MSB at bit 31, except SPDIF Input
44 * which will put it at index 28. When adding support for the SPDIF
45 * Input, we'll need to find which type of backend we are connected to.
46 */
47
48 switch (params_physical_width(params)) {
49 case 8:
50 type = 0; /* 8 samples of 8 bits */
51 break;
52 case 16:
53 type = 2; /* 4 samples of 16 bits - right justified */
54 break;
55 case 32:
56 type = 4; /* 2 samples of 32 bits - right justified */
57 break;
58 default:
59 return -EINVAL;
60 }
61
62 width = params_width(params);
63
64 regmap_update_bits(fifo->map, FIFO_CTRL0,
65 CTRL0_TODDR_TYPE_MASK |
66 CTRL0_TODDR_MSB_POS_MASK |
67 CTRL0_TODDR_LSB_POS_MASK,
68 CTRL0_TODDR_TYPE(type) |
69 CTRL0_TODDR_MSB_POS(msb) |
70 CTRL0_TODDR_LSB_POS(msb - (width - 1)));
71
72 return 0;
73 }
74
axg_toddr_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)75 static int axg_toddr_dai_startup(struct snd_pcm_substream *substream,
76 struct snd_soc_dai *dai)
77 {
78 struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
79 unsigned int fifo_threshold;
80 int ret;
81
82 /* Enable pclk to access registers and clock the fifo ip */
83 ret = clk_prepare_enable(fifo->pclk);
84 if (ret)
85 return ret;
86
87 /* Select orginal data - resampling not supported ATM */
88 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_SEL_RESAMPLE, 0);
89
90 /* Only signed format are supported ATM */
91 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_EXT_SIGNED,
92 CTRL0_TODDR_EXT_SIGNED);
93
94 /* Apply single buffer mode to the interface */
95 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_PP_MODE, 0);
96
97 /* TODDR does not have a configurable fifo depth */
98 fifo_threshold = AXG_FIFO_MIN_CNT - 1;
99 regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_THRESHOLD_MASK,
100 CTRL1_THRESHOLD(fifo_threshold));
101
102 return 0;
103 }
104
axg_toddr_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)105 static void axg_toddr_dai_shutdown(struct snd_pcm_substream *substream,
106 struct snd_soc_dai *dai)
107 {
108 struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai);
109
110 clk_disable_unprepare(fifo->pclk);
111 }
112
113 static const struct snd_soc_dai_ops axg_toddr_ops = {
114 .hw_params = axg_toddr_dai_hw_params,
115 .startup = axg_toddr_dai_startup,
116 .shutdown = axg_toddr_dai_shutdown,
117 };
118
119 static struct snd_soc_dai_driver axg_toddr_dai_drv = {
120 .name = "TODDR",
121 .capture = {
122 .stream_name = "Capture",
123 .channels_min = 1,
124 .channels_max = AXG_FIFO_CH_MAX,
125 .rates = AXG_FIFO_RATES,
126 .formats = AXG_FIFO_FORMATS,
127 },
128 .ops = &axg_toddr_ops,
129 .pcm_new = axg_toddr_pcm_new,
130 };
131
132 static const char * const axg_toddr_sel_texts[] = {
133 "IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 6"
134 };
135
136 static const unsigned int axg_toddr_sel_values[] = {
137 0, 1, 2, 3, 4, 6
138 };
139
140 static SOC_VALUE_ENUM_SINGLE_DECL(axg_toddr_sel_enum, FIFO_CTRL0,
141 CTRL0_SEL_SHIFT, CTRL0_SEL_MASK,
142 axg_toddr_sel_texts, axg_toddr_sel_values);
143
144 static const struct snd_kcontrol_new axg_toddr_in_mux =
145 SOC_DAPM_ENUM("Input Source", axg_toddr_sel_enum);
146
147 static const struct snd_soc_dapm_widget axg_toddr_dapm_widgets[] = {
148 SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_toddr_in_mux),
149 SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
150 SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
151 SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
152 SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
153 SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
154 SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0),
155 };
156
157 static const struct snd_soc_dapm_route axg_toddr_dapm_routes[] = {
158 { "Capture", NULL, "SRC SEL" },
159 { "SRC SEL", "IN 0", "IN 0" },
160 { "SRC SEL", "IN 1", "IN 1" },
161 { "SRC SEL", "IN 2", "IN 2" },
162 { "SRC SEL", "IN 3", "IN 3" },
163 { "SRC SEL", "IN 4", "IN 4" },
164 { "SRC SEL", "IN 6", "IN 6" },
165 };
166
167 static const struct snd_soc_component_driver axg_toddr_component_drv = {
168 .dapm_widgets = axg_toddr_dapm_widgets,
169 .num_dapm_widgets = ARRAY_SIZE(axg_toddr_dapm_widgets),
170 .dapm_routes = axg_toddr_dapm_routes,
171 .num_dapm_routes = ARRAY_SIZE(axg_toddr_dapm_routes),
172 .ops = &axg_fifo_pcm_ops
173 };
174
175 static const struct axg_fifo_match_data axg_toddr_match_data = {
176 .component_drv = &axg_toddr_component_drv,
177 .dai_drv = &axg_toddr_dai_drv
178 };
179
180 static const struct of_device_id axg_toddr_of_match[] = {
181 {
182 .compatible = "amlogic,axg-toddr",
183 .data = &axg_toddr_match_data,
184 }, {}
185 };
186 MODULE_DEVICE_TABLE(of, axg_toddr_of_match);
187
188 static struct platform_driver axg_toddr_pdrv = {
189 .probe = axg_fifo_probe,
190 .driver = {
191 .name = "axg-toddr",
192 .of_match_table = axg_toddr_of_match,
193 },
194 };
195 module_platform_driver(axg_toddr_pdrv);
196
197 MODULE_DESCRIPTION("Amlogic AXG capture fifo driver");
198 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
199 MODULE_LICENSE("GPL v2");
200
