1 /*
2 * Core driver interface for TI TPS65090 PMIC family
3 *
4 * Copyright (C) 2012 NVIDIA Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 *
20 */
21
22 #ifndef __LINUX_MFD_TPS65090_H
23 #define __LINUX_MFD_TPS65090_H
24
25 #include <linux/irq.h>
26 #include <linux/regmap.h>
27
28 /* TPS65090 IRQs */
29 enum {
30 TPS65090_IRQ_INTERRUPT,
31 TPS65090_IRQ_VAC_STATUS_CHANGE,
32 TPS65090_IRQ_VSYS_STATUS_CHANGE,
33 TPS65090_IRQ_BAT_STATUS_CHANGE,
34 TPS65090_IRQ_CHARGING_STATUS_CHANGE,
35 TPS65090_IRQ_CHARGING_COMPLETE,
36 TPS65090_IRQ_OVERLOAD_DCDC1,
37 TPS65090_IRQ_OVERLOAD_DCDC2,
38 TPS65090_IRQ_OVERLOAD_DCDC3,
39 TPS65090_IRQ_OVERLOAD_FET1,
40 TPS65090_IRQ_OVERLOAD_FET2,
41 TPS65090_IRQ_OVERLOAD_FET3,
42 TPS65090_IRQ_OVERLOAD_FET4,
43 TPS65090_IRQ_OVERLOAD_FET5,
44 TPS65090_IRQ_OVERLOAD_FET6,
45 TPS65090_IRQ_OVERLOAD_FET7,
46 };
47
48 /* TPS65090 Regulator ID */
49 enum {
50 TPS65090_REGULATOR_DCDC1,
51 TPS65090_REGULATOR_DCDC2,
52 TPS65090_REGULATOR_DCDC3,
53 TPS65090_REGULATOR_FET1,
54 TPS65090_REGULATOR_FET2,
55 TPS65090_REGULATOR_FET3,
56 TPS65090_REGULATOR_FET4,
57 TPS65090_REGULATOR_FET5,
58 TPS65090_REGULATOR_FET6,
59 TPS65090_REGULATOR_FET7,
60 TPS65090_REGULATOR_LDO1,
61 TPS65090_REGULATOR_LDO2,
62
63 /* Last entry for maximum ID */
64 TPS65090_REGULATOR_MAX,
65 };
66
67 /* Register addresses */
68 #define TPS65090_REG_INTR_STS 0x00
69 #define TPS65090_REG_INTR_STS2 0x01
70 #define TPS65090_REG_INTR_MASK 0x02
71 #define TPS65090_REG_INTR_MASK2 0x03
72 #define TPS65090_REG_CG_CTRL0 0x04
73 #define TPS65090_REG_CG_CTRL1 0x05
74 #define TPS65090_REG_CG_CTRL2 0x06
75 #define TPS65090_REG_CG_CTRL3 0x07
76 #define TPS65090_REG_CG_CTRL4 0x08
77 #define TPS65090_REG_CG_CTRL5 0x09
78 #define TPS65090_REG_CG_STATUS1 0x0a
79 #define TPS65090_REG_CG_STATUS2 0x0b
80 #define TPS65090_REG_AD_OUT1 0x17
81 #define TPS65090_REG_AD_OUT2 0x18
82
83 #define TPS65090_MAX_REG TPS65090_REG_AD_OUT2
84 #define TPS65090_NUM_REGS (TPS65090_MAX_REG + 1)
85
86 struct gpio_desc;
87
88 struct tps65090 {
89 struct device *dev;
90 struct regmap *rmap;
91 struct regmap_irq_chip_data *irq_data;
92 };
93
94 /*
95 * struct tps65090_regulator_plat_data
96 *
97 * @reg_init_data: The regulator init data.
98 * @enable_ext_control: Enable extrenal control or not. Only available for
99 * DCDC1, DCDC2 and DCDC3.
100 * @gpiod: Gpio descriptor if external control is enabled and controlled through
101 * gpio
102 * @overcurrent_wait_valid: True if the overcurrent_wait should be applied.
103 * @overcurrent_wait: Value to set as the overcurrent wait time. This is the
104 * actual bitfield value, not a time in ms (valid value are 0 - 3).
105 */
106 struct tps65090_regulator_plat_data {
107 struct regulator_init_data *reg_init_data;
108 bool enable_ext_control;
109 struct gpio_desc *gpiod;
110 bool overcurrent_wait_valid;
111 int overcurrent_wait;
112 };
113
114 struct tps65090_platform_data {
115 int irq_base;
116
117 char **supplied_to;
118 size_t num_supplicants;
119 int enable_low_current_chrg;
120
121 struct tps65090_regulator_plat_data *reg_pdata[TPS65090_REGULATOR_MAX];
122 };
123
124 /*
125 * NOTE: the functions below are not intended for use outside
126 * of the TPS65090 sub-device drivers
127 */
tps65090_write(struct device * dev,int reg,uint8_t val)128 static inline int tps65090_write(struct device *dev, int reg, uint8_t val)
129 {
130 struct tps65090 *tps = dev_get_drvdata(dev);
131
132 return regmap_write(tps->rmap, reg, val);
133 }
134
tps65090_read(struct device * dev,int reg,uint8_t * val)135 static inline int tps65090_read(struct device *dev, int reg, uint8_t *val)
136 {
137 struct tps65090 *tps = dev_get_drvdata(dev);
138 unsigned int temp_val;
139 int ret;
140
141 ret = regmap_read(tps->rmap, reg, &temp_val);
142 if (!ret)
143 *val = temp_val;
144 return ret;
145 }
146
tps65090_set_bits(struct device * dev,int reg,uint8_t bit_num)147 static inline int tps65090_set_bits(struct device *dev, int reg,
148 uint8_t bit_num)
149 {
150 struct tps65090 *tps = dev_get_drvdata(dev);
151
152 return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u);
153 }
154
tps65090_clr_bits(struct device * dev,int reg,uint8_t bit_num)155 static inline int tps65090_clr_bits(struct device *dev, int reg,
156 uint8_t bit_num)
157 {
158 struct tps65090 *tps = dev_get_drvdata(dev);
159
160 return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u);
161 }
162
163 #endif /*__LINUX_MFD_TPS65090_H */
164
