1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2016-2017 Google, Inc
4 *
5 * Fairchild FUSB302 Type-C Chip Driver
6 */
7
8 #include <linux/debugfs.h>
9 #include <linux/delay.h>
10 #include <linux/errno.h>
11 #include <linux/extcon.h>
12 #include <linux/gpio.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/of_device.h>
19 #include <linux/of_gpio.h>
20 #include <linux/pinctrl/consumer.h>
21 #include <linux/proc_fs.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/sched/clock.h>
24 #include <linux/seq_file.h>
25 #include <linux/slab.h>
26 #include <linux/string.h>
27 #include <linux/types.h>
28 #include <linux/usb/typec.h>
29 #include <linux/usb/tcpm.h>
30 #include <linux/usb/pd.h>
31 #include <linux/workqueue.h>
32
33 #include "fusb302_reg.h"
34
35 /*
36 * When the device is SNK, BC_LVL interrupt is used to monitor cc pins
37 * for the current capability offered by the SRC. As FUSB302 chip fires
38 * the BC_LVL interrupt on PD signalings, cc lvl should be handled after
39 * a delay to avoid measuring on PD activities. The delay is slightly
40 * longer than PD_T_PD_DEBPUNCE (10-20ms).
41 */
42 #define T_BC_LVL_DEBOUNCE_DELAY_MS 30
43
44 enum toggling_mode {
45 TOGGLINE_MODE_OFF,
46 TOGGLING_MODE_DRP,
47 TOGGLING_MODE_SNK,
48 TOGGLING_MODE_SRC,
49 };
50
51 static const char * const toggling_mode_name[] = {
52 [TOGGLINE_MODE_OFF] = "toggling_OFF",
53 [TOGGLING_MODE_DRP] = "toggling_DRP",
54 [TOGGLING_MODE_SNK] = "toggling_SNK",
55 [TOGGLING_MODE_SRC] = "toggling_SRC",
56 };
57
58 enum src_current_status {
59 SRC_CURRENT_DEFAULT,
60 SRC_CURRENT_MEDIUM,
61 SRC_CURRENT_HIGH,
62 };
63
64 static const u8 ra_mda_value[] = {
65 [SRC_CURRENT_DEFAULT] = 4, /* 210mV */
66 [SRC_CURRENT_MEDIUM] = 9, /* 420mV */
67 [SRC_CURRENT_HIGH] = 18, /* 798mV */
68 };
69
70 static const u8 rd_mda_value[] = {
71 [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */
72 [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */
73 [SRC_CURRENT_HIGH] = 61, /* 2604mV */
74 };
75
76 #define LOG_BUFFER_ENTRIES 1024
77 #define LOG_BUFFER_ENTRY_SIZE 128
78
79 struct fusb302_chip {
80 struct device *dev;
81 struct i2c_client *i2c_client;
82 struct tcpm_port *tcpm_port;
83 struct tcpc_dev tcpc_dev;
84 struct tcpc_config tcpc_config;
85
86 struct regulator *vbus;
87
88 int gpio_int_n;
89 int gpio_int_n_irq;
90 struct extcon_dev *extcon;
91
92 struct workqueue_struct *wq;
93 struct delayed_work bc_lvl_handler;
94
95 atomic_t pm_suspend;
96 atomic_t i2c_busy;
97
98 /* lock for sharing chip states */
99 struct mutex lock;
100
101 /* chip status */
102 enum toggling_mode toggling_mode;
103 enum src_current_status src_current_status;
104 bool intr_togdone;
105 bool intr_bc_lvl;
106 bool intr_comp_chng;
107
108 /* port status */
109 bool pull_up;
110 bool vconn_on;
111 bool vbus_on;
112 bool charge_on;
113 bool vbus_present;
114 enum typec_cc_polarity cc_polarity;
115 enum typec_cc_status cc1;
116 enum typec_cc_status cc2;
117 u32 snk_pdo[PDO_MAX_OBJECTS];
118
119 #ifdef CONFIG_DEBUG_FS
120 struct dentry *dentry;
121 /* lock for log buffer access */
122 struct mutex logbuffer_lock;
123 int logbuffer_head;
124 int logbuffer_tail;
125 u8 *logbuffer[LOG_BUFFER_ENTRIES];
126 #endif
127 };
128
129 /*
130 * Logging
131 */
132
133 #ifdef CONFIG_DEBUG_FS
134
fusb302_log_full(struct fusb302_chip * chip)135 static bool fusb302_log_full(struct fusb302_chip *chip)
136 {
137 return chip->logbuffer_tail ==
138 (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES;
139 }
140
_fusb302_log(struct fusb302_chip * chip,const char * fmt,va_list args)141 static void _fusb302_log(struct fusb302_chip *chip, const char *fmt,
142 va_list args)
143 {
144 char tmpbuffer[LOG_BUFFER_ENTRY_SIZE];
145 u64 ts_nsec = local_clock();
146 unsigned long rem_nsec;
147
148 if (!chip->logbuffer[chip->logbuffer_head]) {
149 chip->logbuffer[chip->logbuffer_head] =
150 kzalloc(LOG_BUFFER_ENTRY_SIZE, GFP_KERNEL);
151 if (!chip->logbuffer[chip->logbuffer_head])
152 return;
153 }
154
155 vsnprintf(tmpbuffer, sizeof(tmpbuffer), fmt, args);
156
157 mutex_lock(&chip->logbuffer_lock);
158
159 if (fusb302_log_full(chip)) {
160 chip->logbuffer_head = max(chip->logbuffer_head - 1, 0);
161 strlcpy(tmpbuffer, "overflow", sizeof(tmpbuffer));
162 }
163
164 if (chip->logbuffer_head < 0 ||
165 chip->logbuffer_head >= LOG_BUFFER_ENTRIES) {
166 dev_warn(chip->dev,
167 "Bad log buffer index %d\n", chip->logbuffer_head);
168 goto abort;
169 }
170
171 if (!chip->logbuffer[chip->logbuffer_head]) {
172 dev_warn(chip->dev,
173 "Log buffer index %d is NULL\n", chip->logbuffer_head);
174 goto abort;
175 }
176
177 rem_nsec = do_div(ts_nsec, 1000000000);
178 scnprintf(chip->logbuffer[chip->logbuffer_head],
179 LOG_BUFFER_ENTRY_SIZE, "[%5lu.%06lu] %s",
180 (unsigned long)ts_nsec, rem_nsec / 1000,
181 tmpbuffer);
182 chip->logbuffer_head = (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES;
183
184 abort:
185 mutex_unlock(&chip->logbuffer_lock);
186 }
187
fusb302_log(struct fusb302_chip * chip,const char * fmt,...)188 static void fusb302_log(struct fusb302_chip *chip, const char *fmt, ...)
189 {
190 va_list args;
191
192 va_start(args, fmt);
193 _fusb302_log(chip, fmt, args);
194 va_end(args);
195 }
196
fusb302_debug_show(struct seq_file * s,void * v)197 static int fusb302_debug_show(struct seq_file *s, void *v)
198 {
199 struct fusb302_chip *chip = (struct fusb302_chip *)s->private;
200 int tail;
201
202 mutex_lock(&chip->logbuffer_lock);
203 tail = chip->logbuffer_tail;
204 while (tail != chip->logbuffer_head) {
205 seq_printf(s, "%s\n", chip->logbuffer[tail]);
206 tail = (tail + 1) % LOG_BUFFER_ENTRIES;
207 }
208 if (!seq_has_overflowed(s))
209 chip->logbuffer_tail = tail;
210 mutex_unlock(&chip->logbuffer_lock);
211
212 return 0;
213 }
214 DEFINE_SHOW_ATTRIBUTE(fusb302_debug);
215
216 static struct dentry *rootdir;
217
fusb302_debugfs_init(struct fusb302_chip * chip)218 static void fusb302_debugfs_init(struct fusb302_chip *chip)
219 {
220 mutex_init(&chip->logbuffer_lock);
221 if (!rootdir)
222 rootdir = debugfs_create_dir("fusb302", NULL);
223
224 chip->dentry = debugfs_create_file(dev_name(chip->dev),
225 S_IFREG | 0444, rootdir,
226 chip, &fusb302_debug_fops);
227 }
228
fusb302_debugfs_exit(struct fusb302_chip * chip)229 static void fusb302_debugfs_exit(struct fusb302_chip *chip)
230 {
231 debugfs_remove(chip->dentry);
232 debugfs_remove(rootdir);
233 }
234
235 #else
236
fusb302_log(const struct fusb302_chip * chip,const char * fmt,...)237 static void fusb302_log(const struct fusb302_chip *chip,
238 const char *fmt, ...) { }
fusb302_debugfs_init(const struct fusb302_chip * chip)239 static void fusb302_debugfs_init(const struct fusb302_chip *chip) { }
fusb302_debugfs_exit(const struct fusb302_chip * chip)240 static void fusb302_debugfs_exit(const struct fusb302_chip *chip) { }
241
242 #endif
243
244 #define FUSB302_RESUME_RETRY 10
245 #define FUSB302_RESUME_RETRY_SLEEP 50
246
fusb302_is_suspended(struct fusb302_chip * chip)247 static bool fusb302_is_suspended(struct fusb302_chip *chip)
248 {
249 int retry_cnt;
250
251 for (retry_cnt = 0; retry_cnt < FUSB302_RESUME_RETRY; retry_cnt++) {
252 if (atomic_read(&chip->pm_suspend)) {
253 dev_err(chip->dev, "i2c: pm suspend, retry %d/%d\n",
254 retry_cnt + 1, FUSB302_RESUME_RETRY);
255 msleep(FUSB302_RESUME_RETRY_SLEEP);
256 } else {
257 return false;
258 }
259 }
260
261 return true;
262 }
263
fusb302_i2c_write(struct fusb302_chip * chip,u8 address,u8 data)264 static int fusb302_i2c_write(struct fusb302_chip *chip,
265 u8 address, u8 data)
266 {
267 int ret = 0;
268
269 atomic_set(&chip->i2c_busy, 1);
270
271 if (fusb302_is_suspended(chip)) {
272 atomic_set(&chip->i2c_busy, 0);
273 return -ETIMEDOUT;
274 }
275
276 ret = i2c_smbus_write_byte_data(chip->i2c_client, address, data);
277 if (ret < 0)
278 fusb302_log(chip, "cannot write 0x%02x to 0x%02x, ret=%d",
279 data, address, ret);
280 atomic_set(&chip->i2c_busy, 0);
281
282 return ret;
283 }
284
fusb302_i2c_block_write(struct fusb302_chip * chip,u8 address,u8 length,const u8 * data)285 static int fusb302_i2c_block_write(struct fusb302_chip *chip, u8 address,
286 u8 length, const u8 *data)
287 {
288 int ret = 0;
289
290 if (length <= 0)
291 return ret;
292 atomic_set(&chip->i2c_busy, 1);
293
294 if (fusb302_is_suspended(chip)) {
295 atomic_set(&chip->i2c_busy, 0);
296 return -ETIMEDOUT;
297 }
298
299 ret = i2c_smbus_write_i2c_block_data(chip->i2c_client, address,
300 length, data);
301 if (ret < 0)
302 fusb302_log(chip, "cannot block write 0x%02x, len=%d, ret=%d",
303 address, length, ret);
304 atomic_set(&chip->i2c_busy, 0);
305
306 return ret;
307 }
308
fusb302_i2c_read(struct fusb302_chip * chip,u8 address,u8 * data)309 static int fusb302_i2c_read(struct fusb302_chip *chip,
310 u8 address, u8 *data)
311 {
312 int ret = 0;
313
314 atomic_set(&chip->i2c_busy, 1);
315
316 if (fusb302_is_suspended(chip)) {
317 atomic_set(&chip->i2c_busy, 0);
318 return -ETIMEDOUT;
319 }
320
321 ret = i2c_smbus_read_byte_data(chip->i2c_client, address);
322 *data = (u8)ret;
323 if (ret < 0)
324 fusb302_log(chip, "cannot read %02x, ret=%d", address, ret);
325 atomic_set(&chip->i2c_busy, 0);
326
327 return ret;
328 }
329
fusb302_i2c_block_read(struct fusb302_chip * chip,u8 address,u8 length,u8 * data)330 static int fusb302_i2c_block_read(struct fusb302_chip *chip, u8 address,
331 u8 length, u8 *data)
332 {
333 int ret = 0;
334
335 if (length <= 0)
336 return ret;
337 atomic_set(&chip->i2c_busy, 1);
338
339 if (fusb302_is_suspended(chip)) {
340 atomic_set(&chip->i2c_busy, 0);
341 return -ETIMEDOUT;
342 }
343
344 ret = i2c_smbus_read_i2c_block_data(chip->i2c_client, address,
345 length, data);
346 if (ret < 0) {
347 fusb302_log(chip, "cannot block read 0x%02x, len=%d, ret=%d",
348 address, length, ret);
349 goto done;
350 }
351 if (ret != length) {
352 fusb302_log(chip, "only read %d/%d bytes from 0x%02x",
353 ret, length, address);
354 ret = -EIO;
355 }
356
357 done:
358 atomic_set(&chip->i2c_busy, 0);
359
360 return ret;
361 }
362
fusb302_i2c_mask_write(struct fusb302_chip * chip,u8 address,u8 mask,u8 value)363 static int fusb302_i2c_mask_write(struct fusb302_chip *chip, u8 address,
364 u8 mask, u8 value)
365 {
366 int ret = 0;
367 u8 data;
368
369 ret = fusb302_i2c_read(chip, address, &data);
370 if (ret < 0)
371 return ret;
372 data &= ~mask;
373 data |= value;
374 ret = fusb302_i2c_write(chip, address, data);
375 if (ret < 0)
376 return ret;
377
378 return ret;
379 }
380
fusb302_i2c_set_bits(struct fusb302_chip * chip,u8 address,u8 set_bits)381 static int fusb302_i2c_set_bits(struct fusb302_chip *chip, u8 address,
382 u8 set_bits)
383 {
384 return fusb302_i2c_mask_write(chip, address, 0x00, set_bits);
385 }
386
fusb302_i2c_clear_bits(struct fusb302_chip * chip,u8 address,u8 clear_bits)387 static int fusb302_i2c_clear_bits(struct fusb302_chip *chip, u8 address,
388 u8 clear_bits)
389 {
390 return fusb302_i2c_mask_write(chip, address, clear_bits, 0x00);
391 }
392
fusb302_sw_reset(struct fusb302_chip * chip)393 static int fusb302_sw_reset(struct fusb302_chip *chip)
394 {
395 int ret = 0;
396
397 ret = fusb302_i2c_write(chip, FUSB_REG_RESET,
398 FUSB_REG_RESET_SW_RESET);
399 if (ret < 0)
400 fusb302_log(chip, "cannot sw reset the chip, ret=%d", ret);
401 else
402 fusb302_log(chip, "sw reset");
403
404 return ret;
405 }
406
fusb302_enable_tx_auto_retries(struct fusb302_chip * chip)407 static int fusb302_enable_tx_auto_retries(struct fusb302_chip *chip)
408 {
409 int ret = 0;
410
411 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
412 FUSB_REG_CONTROL3_N_RETRIES_3 |
413 FUSB_REG_CONTROL3_AUTO_RETRY);
414
415 return ret;
416 }
417
418 /*
419 * initialize interrupt on the chip
420 * - unmasked interrupt: VBUS_OK
421 */
fusb302_init_interrupt(struct fusb302_chip * chip)422 static int fusb302_init_interrupt(struct fusb302_chip *chip)
423 {
424 int ret = 0;
425
426 ret = fusb302_i2c_write(chip, FUSB_REG_MASK,
427 0xFF & ~FUSB_REG_MASK_VBUSOK);
428 if (ret < 0)
429 return ret;
430 ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF);
431 if (ret < 0)
432 return ret;
433 ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF);
434 if (ret < 0)
435 return ret;
436 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL0,
437 FUSB_REG_CONTROL0_INT_MASK);
438 if (ret < 0)
439 return ret;
440
441 return ret;
442 }
443
fusb302_set_power_mode(struct fusb302_chip * chip,u8 power_mode)444 static int fusb302_set_power_mode(struct fusb302_chip *chip, u8 power_mode)
445 {
446 int ret = 0;
447
448 ret = fusb302_i2c_write(chip, FUSB_REG_POWER, power_mode);
449
450 return ret;
451 }
452
tcpm_init(struct tcpc_dev * dev)453 static int tcpm_init(struct tcpc_dev *dev)
454 {
455 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
456 tcpc_dev);
457 int ret = 0;
458 u8 data;
459
460 ret = fusb302_sw_reset(chip);
461 if (ret < 0)
462 return ret;
463 ret = fusb302_enable_tx_auto_retries(chip);
464 if (ret < 0)
465 return ret;
466 ret = fusb302_init_interrupt(chip);
467 if (ret < 0)
468 return ret;
469 ret = fusb302_set_power_mode(chip, FUSB_REG_POWER_PWR_ALL);
470 if (ret < 0)
471 return ret;
472 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &data);
473 if (ret < 0)
474 return ret;
475 chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK);
476 ret = fusb302_i2c_read(chip, FUSB_REG_DEVICE_ID, &data);
477 if (ret < 0)
478 return ret;
479 fusb302_log(chip, "fusb302 device ID: 0x%02x", data);
480
481 return ret;
482 }
483
tcpm_get_vbus(struct tcpc_dev * dev)484 static int tcpm_get_vbus(struct tcpc_dev *dev)
485 {
486 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
487 tcpc_dev);
488 int ret = 0;
489
490 mutex_lock(&chip->lock);
491 ret = chip->vbus_present ? 1 : 0;
492 mutex_unlock(&chip->lock);
493
494 return ret;
495 }
496
tcpm_get_current_limit(struct tcpc_dev * dev)497 static int tcpm_get_current_limit(struct tcpc_dev *dev)
498 {
499 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
500 tcpc_dev);
501 int current_limit = 0;
502 unsigned long timeout;
503
504 if (!chip->extcon)
505 return 0;
506
507 /*
508 * USB2 Charger detection may still be in progress when we get here,
509 * this can take upto 600ms, wait 800ms max.
510 */
511 timeout = jiffies + msecs_to_jiffies(800);
512 do {
513 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_SDP) == 1)
514 current_limit = 500;
515
516 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_CDP) == 1 ||
517 extcon_get_state(chip->extcon, EXTCON_CHG_USB_ACA) == 1)
518 current_limit = 1500;
519
520 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_DCP) == 1)
521 current_limit = 2000;
522
523 msleep(50);
524 } while (current_limit == 0 && time_before(jiffies, timeout));
525
526 return current_limit;
527 }
528
fusb302_set_cc_pull(struct fusb302_chip * chip,bool pull_up,bool pull_down)529 static int fusb302_set_cc_pull(struct fusb302_chip *chip,
530 bool pull_up, bool pull_down)
531 {
532 int ret = 0;
533 u8 data = 0x00;
534 u8 mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
535 FUSB_REG_SWITCHES0_CC2_PU_EN |
536 FUSB_REG_SWITCHES0_CC1_PD_EN |
537 FUSB_REG_SWITCHES0_CC2_PD_EN;
538
539 if (pull_up)
540 data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
541 FUSB_REG_SWITCHES0_CC1_PU_EN :
542 FUSB_REG_SWITCHES0_CC2_PU_EN;
543 if (pull_down)
544 data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
545 FUSB_REG_SWITCHES0_CC2_PD_EN;
546 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
547 mask, data);
548 if (ret < 0)
549 return ret;
550 chip->pull_up = pull_up;
551
552 return ret;
553 }
554
fusb302_set_src_current(struct fusb302_chip * chip,enum src_current_status status)555 static int fusb302_set_src_current(struct fusb302_chip *chip,
556 enum src_current_status status)
557 {
558 int ret = 0;
559
560 chip->src_current_status = status;
561 switch (status) {
562 case SRC_CURRENT_DEFAULT:
563 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
564 FUSB_REG_CONTROL0_HOST_CUR_MASK,
565 FUSB_REG_CONTROL0_HOST_CUR_DEF);
566 break;
567 case SRC_CURRENT_MEDIUM:
568 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
569 FUSB_REG_CONTROL0_HOST_CUR_MASK,
570 FUSB_REG_CONTROL0_HOST_CUR_MED);
571 break;
572 case SRC_CURRENT_HIGH:
573 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
574 FUSB_REG_CONTROL0_HOST_CUR_MASK,
575 FUSB_REG_CONTROL0_HOST_CUR_HIGH);
576 break;
577 default:
578 break;
579 }
580
581 return ret;
582 }
583
fusb302_set_toggling(struct fusb302_chip * chip,enum toggling_mode mode)584 static int fusb302_set_toggling(struct fusb302_chip *chip,
585 enum toggling_mode mode)
586 {
587 int ret = 0;
588
589 /* first disable toggling */
590 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL2,
591 FUSB_REG_CONTROL2_TOGGLE);
592 if (ret < 0)
593 return ret;
594 /* mask interrupts for SRC or SNK */
595 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASK,
596 FUSB_REG_MASK_BC_LVL |
597 FUSB_REG_MASK_COMP_CHNG);
598 if (ret < 0)
599 return ret;
600 chip->intr_bc_lvl = false;
601 chip->intr_comp_chng = false;
602 /* configure toggling mode: none/snk/src/drp */
603 switch (mode) {
604 case TOGGLINE_MODE_OFF:
605 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
606 FUSB_REG_CONTROL2_MODE_MASK,
607 FUSB_REG_CONTROL2_MODE_NONE);
608 if (ret < 0)
609 return ret;
610 break;
611 case TOGGLING_MODE_SNK:
612 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
613 FUSB_REG_CONTROL2_MODE_MASK,
614 FUSB_REG_CONTROL2_MODE_UFP);
615 if (ret < 0)
616 return ret;
617 break;
618 case TOGGLING_MODE_SRC:
619 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
620 FUSB_REG_CONTROL2_MODE_MASK,
621 FUSB_REG_CONTROL2_MODE_DFP);
622 if (ret < 0)
623 return ret;
624 break;
625 case TOGGLING_MODE_DRP:
626 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
627 FUSB_REG_CONTROL2_MODE_MASK,
628 FUSB_REG_CONTROL2_MODE_DRP);
629 if (ret < 0)
630 return ret;
631 break;
632 default:
633 break;
634 }
635
636 if (mode == TOGGLINE_MODE_OFF) {
637 /* mask TOGDONE interrupt */
638 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASKA,
639 FUSB_REG_MASKA_TOGDONE);
640 if (ret < 0)
641 return ret;
642 chip->intr_togdone = false;
643 } else {
644 /* unmask TOGDONE interrupt */
645 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA,
646 FUSB_REG_MASKA_TOGDONE);
647 if (ret < 0)
648 return ret;
649 chip->intr_togdone = true;
650 /* start toggling */
651 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL2,
652 FUSB_REG_CONTROL2_TOGGLE);
653 if (ret < 0)
654 return ret;
655 /* during toggling, consider cc as Open */
656 chip->cc1 = TYPEC_CC_OPEN;
657 chip->cc2 = TYPEC_CC_OPEN;
658 }
659 chip->toggling_mode = mode;
660
661 return ret;
662 }
663
664 static const char * const typec_cc_status_name[] = {
665 [TYPEC_CC_OPEN] = "Open",
666 [TYPEC_CC_RA] = "Ra",
667 [TYPEC_CC_RD] = "Rd",
668 [TYPEC_CC_RP_DEF] = "Rp-def",
669 [TYPEC_CC_RP_1_5] = "Rp-1.5",
670 [TYPEC_CC_RP_3_0] = "Rp-3.0",
671 };
672
673 static const enum src_current_status cc_src_current[] = {
674 [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT,
675 [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT,
676 [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT,
677 [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT,
678 [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM,
679 [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH,
680 };
681
tcpm_set_cc(struct tcpc_dev * dev,enum typec_cc_status cc)682 static int tcpm_set_cc(struct tcpc_dev *dev, enum typec_cc_status cc)
683 {
684 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
685 tcpc_dev);
686 int ret = 0;
687 bool pull_up, pull_down;
688 u8 rd_mda;
689
690 mutex_lock(&chip->lock);
691 switch (cc) {
692 case TYPEC_CC_OPEN:
693 pull_up = false;
694 pull_down = false;
695 break;
696 case TYPEC_CC_RD:
697 pull_up = false;
698 pull_down = true;
699 break;
700 case TYPEC_CC_RP_DEF:
701 case TYPEC_CC_RP_1_5:
702 case TYPEC_CC_RP_3_0:
703 pull_up = true;
704 pull_down = false;
705 break;
706 default:
707 fusb302_log(chip, "unsupported cc value %s",
708 typec_cc_status_name[cc]);
709 ret = -EINVAL;
710 goto done;
711 }
712 ret = fusb302_set_toggling(chip, TOGGLINE_MODE_OFF);
713 if (ret < 0) {
714 fusb302_log(chip, "cannot stop toggling, ret=%d", ret);
715 goto done;
716 }
717 ret = fusb302_set_cc_pull(chip, pull_up, pull_down);
718 if (ret < 0) {
719 fusb302_log(chip,
720 "cannot set cc pulling up %s, down %s, ret = %d",
721 pull_up ? "True" : "False",
722 pull_down ? "True" : "False",
723 ret);
724 goto done;
725 }
726 /* reset the cc status */
727 chip->cc1 = TYPEC_CC_OPEN;
728 chip->cc2 = TYPEC_CC_OPEN;
729 /* adjust current for SRC */
730 if (pull_up) {
731 ret = fusb302_set_src_current(chip, cc_src_current[cc]);
732 if (ret < 0) {
733 fusb302_log(chip, "cannot set src current %s, ret=%d",
734 typec_cc_status_name[cc], ret);
735 goto done;
736 }
737 }
738 /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */
739 if (pull_up) {
740 rd_mda = rd_mda_value[cc_src_current[cc]];
741 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
742 if (ret < 0) {
743 fusb302_log(chip,
744 "cannot set SRC measure value, ret=%d",
745 ret);
746 goto done;
747 }
748 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
749 FUSB_REG_MASK_BC_LVL |
750 FUSB_REG_MASK_COMP_CHNG,
751 FUSB_REG_MASK_COMP_CHNG);
752 if (ret < 0) {
753 fusb302_log(chip, "cannot set SRC interrupt, ret=%d",
754 ret);
755 goto done;
756 }
757 chip->intr_bc_lvl = false;
758 chip->intr_comp_chng = true;
759 }
760 if (pull_down) {
761 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
762 FUSB_REG_MASK_BC_LVL |
763 FUSB_REG_MASK_COMP_CHNG,
764 FUSB_REG_MASK_BC_LVL);
765 if (ret < 0) {
766 fusb302_log(chip, "cannot set SRC interrupt, ret=%d",
767 ret);
768 goto done;
769 }
770 chip->intr_bc_lvl = true;
771 chip->intr_comp_chng = false;
772 }
773 fusb302_log(chip, "cc := %s", typec_cc_status_name[cc]);
774 done:
775 mutex_unlock(&chip->lock);
776
777 return ret;
778 }
779
tcpm_get_cc(struct tcpc_dev * dev,enum typec_cc_status * cc1,enum typec_cc_status * cc2)780 static int tcpm_get_cc(struct tcpc_dev *dev, enum typec_cc_status *cc1,
781 enum typec_cc_status *cc2)
782 {
783 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
784 tcpc_dev);
785
786 mutex_lock(&chip->lock);
787 *cc1 = chip->cc1;
788 *cc2 = chip->cc2;
789 fusb302_log(chip, "cc1=%s, cc2=%s", typec_cc_status_name[*cc1],
790 typec_cc_status_name[*cc2]);
791 mutex_unlock(&chip->lock);
792
793 return 0;
794 }
795
tcpm_set_polarity(struct tcpc_dev * dev,enum typec_cc_polarity polarity)796 static int tcpm_set_polarity(struct tcpc_dev *dev,
797 enum typec_cc_polarity polarity)
798 {
799 return 0;
800 }
801
tcpm_set_vconn(struct tcpc_dev * dev,bool on)802 static int tcpm_set_vconn(struct tcpc_dev *dev, bool on)
803 {
804 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
805 tcpc_dev);
806 int ret = 0;
807 u8 switches0_data = 0x00;
808 u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 |
809 FUSB_REG_SWITCHES0_VCONN_CC2;
810
811 mutex_lock(&chip->lock);
812 if (chip->vconn_on == on) {
813 fusb302_log(chip, "vconn is already %s", on ? "On" : "Off");
814 goto done;
815 }
816 if (on) {
817 switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
818 FUSB_REG_SWITCHES0_VCONN_CC2 :
819 FUSB_REG_SWITCHES0_VCONN_CC1;
820 }
821 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
822 switches0_mask, switches0_data);
823 if (ret < 0)
824 goto done;
825 chip->vconn_on = on;
826 fusb302_log(chip, "vconn := %s", on ? "On" : "Off");
827 done:
828 mutex_unlock(&chip->lock);
829
830 return ret;
831 }
832
tcpm_set_vbus(struct tcpc_dev * dev,bool on,bool charge)833 static int tcpm_set_vbus(struct tcpc_dev *dev, bool on, bool charge)
834 {
835 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
836 tcpc_dev);
837 int ret = 0;
838
839 mutex_lock(&chip->lock);
840 if (chip->vbus_on == on) {
841 fusb302_log(chip, "vbus is already %s", on ? "On" : "Off");
842 } else {
843 if (on)
844 ret = regulator_enable(chip->vbus);
845 else
846 ret = regulator_disable(chip->vbus);
847 if (ret < 0) {
848 fusb302_log(chip, "cannot %s vbus regulator, ret=%d",
849 on ? "enable" : "disable", ret);
850 goto done;
851 }
852 chip->vbus_on = on;
853 fusb302_log(chip, "vbus := %s", on ? "On" : "Off");
854 }
855 if (chip->charge_on == charge)
856 fusb302_log(chip, "charge is already %s",
857 charge ? "On" : "Off");
858 else
859 chip->charge_on = charge;
860
861 done:
862 mutex_unlock(&chip->lock);
863
864 return ret;
865 }
866
fusb302_pd_tx_flush(struct fusb302_chip * chip)867 static int fusb302_pd_tx_flush(struct fusb302_chip *chip)
868 {
869 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0,
870 FUSB_REG_CONTROL0_TX_FLUSH);
871 }
872
fusb302_pd_rx_flush(struct fusb302_chip * chip)873 static int fusb302_pd_rx_flush(struct fusb302_chip *chip)
874 {
875 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL1,
876 FUSB_REG_CONTROL1_RX_FLUSH);
877 }
878
fusb302_pd_set_auto_goodcrc(struct fusb302_chip * chip,bool on)879 static int fusb302_pd_set_auto_goodcrc(struct fusb302_chip *chip, bool on)
880 {
881 if (on)
882 return fusb302_i2c_set_bits(chip, FUSB_REG_SWITCHES1,
883 FUSB_REG_SWITCHES1_AUTO_GCRC);
884 return fusb302_i2c_clear_bits(chip, FUSB_REG_SWITCHES1,
885 FUSB_REG_SWITCHES1_AUTO_GCRC);
886 }
887
fusb302_pd_set_interrupts(struct fusb302_chip * chip,bool on)888 static int fusb302_pd_set_interrupts(struct fusb302_chip *chip, bool on)
889 {
890 int ret = 0;
891 u8 mask_interrupts = FUSB_REG_MASK_COLLISION;
892 u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL |
893 FUSB_REG_MASKA_HARDSENT |
894 FUSB_REG_MASKA_TX_SUCCESS |
895 FUSB_REG_MASKA_HARDRESET;
896 u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT;
897
898 ret = on ?
899 fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, mask_interrupts) :
900 fusb302_i2c_set_bits(chip, FUSB_REG_MASK, mask_interrupts);
901 if (ret < 0)
902 return ret;
903 ret = on ?
904 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, maska_interrupts) :
905 fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, maska_interrupts);
906 if (ret < 0)
907 return ret;
908 ret = on ?
909 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKB, maskb_interrupts) :
910 fusb302_i2c_set_bits(chip, FUSB_REG_MASKB, maskb_interrupts);
911 return ret;
912 }
913
tcpm_set_pd_rx(struct tcpc_dev * dev,bool on)914 static int tcpm_set_pd_rx(struct tcpc_dev *dev, bool on)
915 {
916 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
917 tcpc_dev);
918 int ret = 0;
919
920 mutex_lock(&chip->lock);
921 ret = fusb302_pd_rx_flush(chip);
922 if (ret < 0) {
923 fusb302_log(chip, "cannot flush pd rx buffer, ret=%d", ret);
924 goto done;
925 }
926 ret = fusb302_pd_tx_flush(chip);
927 if (ret < 0) {
928 fusb302_log(chip, "cannot flush pd tx buffer, ret=%d", ret);
929 goto done;
930 }
931 ret = fusb302_pd_set_auto_goodcrc(chip, on);
932 if (ret < 0) {
933 fusb302_log(chip, "cannot turn %s auto GCRC, ret=%d",
934 on ? "on" : "off", ret);
935 goto done;
936 }
937 ret = fusb302_pd_set_interrupts(chip, on);
938 if (ret < 0) {
939 fusb302_log(chip, "cannot turn %s pd interrupts, ret=%d",
940 on ? "on" : "off", ret);
941 goto done;
942 }
943 fusb302_log(chip, "pd := %s", on ? "on" : "off");
944 done:
945 mutex_unlock(&chip->lock);
946
947 return ret;
948 }
949
950 static const char * const typec_role_name[] = {
951 [TYPEC_SINK] = "Sink",
952 [TYPEC_SOURCE] = "Source",
953 };
954
955 static const char * const typec_data_role_name[] = {
956 [TYPEC_DEVICE] = "Device",
957 [TYPEC_HOST] = "Host",
958 };
959
tcpm_set_roles(struct tcpc_dev * dev,bool attached,enum typec_role pwr,enum typec_data_role data)960 static int tcpm_set_roles(struct tcpc_dev *dev, bool attached,
961 enum typec_role pwr, enum typec_data_role data)
962 {
963 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
964 tcpc_dev);
965 int ret = 0;
966 u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE |
967 FUSB_REG_SWITCHES1_DATAROLE;
968 u8 switches1_data = 0x00;
969
970 mutex_lock(&chip->lock);
971 if (pwr == TYPEC_SOURCE)
972 switches1_data |= FUSB_REG_SWITCHES1_POWERROLE;
973 if (data == TYPEC_HOST)
974 switches1_data |= FUSB_REG_SWITCHES1_DATAROLE;
975 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
976 switches1_mask, switches1_data);
977 if (ret < 0) {
978 fusb302_log(chip, "unable to set pd header %s, %s, ret=%d",
979 typec_role_name[pwr], typec_data_role_name[data],
980 ret);
981 goto done;
982 }
983 fusb302_log(chip, "pd header := %s, %s", typec_role_name[pwr],
984 typec_data_role_name[data]);
985 done:
986 mutex_unlock(&chip->lock);
987
988 return ret;
989 }
990
tcpm_start_drp_toggling(struct tcpc_dev * dev,enum typec_cc_status cc)991 static int tcpm_start_drp_toggling(struct tcpc_dev *dev,
992 enum typec_cc_status cc)
993 {
994 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
995 tcpc_dev);
996 int ret = 0;
997
998 mutex_lock(&chip->lock);
999 ret = fusb302_set_src_current(chip, cc_src_current[cc]);
1000 if (ret < 0) {
1001 fusb302_log(chip, "unable to set src current %s, ret=%d",
1002 typec_cc_status_name[cc], ret);
1003 goto done;
1004 }
1005 ret = fusb302_set_toggling(chip, TOGGLING_MODE_DRP);
1006 if (ret < 0) {
1007 fusb302_log(chip,
1008 "unable to start drp toggling, ret=%d", ret);
1009 goto done;
1010 }
1011 fusb302_log(chip, "start drp toggling");
1012 done:
1013 mutex_unlock(&chip->lock);
1014
1015 return ret;
1016 }
1017
fusb302_pd_send_message(struct fusb302_chip * chip,const struct pd_message * msg)1018 static int fusb302_pd_send_message(struct fusb302_chip *chip,
1019 const struct pd_message *msg)
1020 {
1021 int ret = 0;
1022 u8 buf[40];
1023 u8 pos = 0;
1024 int len;
1025
1026 /* SOP tokens */
1027 buf[pos++] = FUSB302_TKN_SYNC1;
1028 buf[pos++] = FUSB302_TKN_SYNC1;
1029 buf[pos++] = FUSB302_TKN_SYNC1;
1030 buf[pos++] = FUSB302_TKN_SYNC2;
1031
1032 len = pd_header_cnt_le(msg->header) * 4;
1033 /* plug 2 for header */
1034 len += 2;
1035 if (len > 0x1F) {
1036 fusb302_log(chip,
1037 "PD message too long %d (incl. header)", len);
1038 return -EINVAL;
1039 }
1040 /* packsym tells the FUSB302 chip that the next X bytes are payload */
1041 buf[pos++] = FUSB302_TKN_PACKSYM | (len & 0x1F);
1042 memcpy(&buf[pos], &msg->header, sizeof(msg->header));
1043 pos += sizeof(msg->header);
1044
1045 len -= 2;
1046 memcpy(&buf[pos], msg->payload, len);
1047 pos += len;
1048
1049 /* CRC */
1050 buf[pos++] = FUSB302_TKN_JAMCRC;
1051 /* EOP */
1052 buf[pos++] = FUSB302_TKN_EOP;
1053 /* turn tx off after sending message */
1054 buf[pos++] = FUSB302_TKN_TXOFF;
1055 /* start transmission */
1056 buf[pos++] = FUSB302_TKN_TXON;
1057
1058 ret = fusb302_i2c_block_write(chip, FUSB_REG_FIFOS, pos, buf);
1059 if (ret < 0)
1060 return ret;
1061 fusb302_log(chip, "sending PD message header: %x", msg->header);
1062 fusb302_log(chip, "sending PD message len: %d", len);
1063
1064 return ret;
1065 }
1066
fusb302_pd_send_hardreset(struct fusb302_chip * chip)1067 static int fusb302_pd_send_hardreset(struct fusb302_chip *chip)
1068 {
1069 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
1070 FUSB_REG_CONTROL3_SEND_HARDRESET);
1071 }
1072
1073 static const char * const transmit_type_name[] = {
1074 [TCPC_TX_SOP] = "SOP",
1075 [TCPC_TX_SOP_PRIME] = "SOP'",
1076 [TCPC_TX_SOP_PRIME_PRIME] = "SOP''",
1077 [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'",
1078 [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''",
1079 [TCPC_TX_HARD_RESET] = "HARD_RESET",
1080 [TCPC_TX_CABLE_RESET] = "CABLE_RESET",
1081 [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2",
1082 };
1083
tcpm_pd_transmit(struct tcpc_dev * dev,enum tcpm_transmit_type type,const struct pd_message * msg)1084 static int tcpm_pd_transmit(struct tcpc_dev *dev, enum tcpm_transmit_type type,
1085 const struct pd_message *msg)
1086 {
1087 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
1088 tcpc_dev);
1089 int ret = 0;
1090
1091 mutex_lock(&chip->lock);
1092 switch (type) {
1093 case TCPC_TX_SOP:
1094 ret = fusb302_pd_send_message(chip, msg);
1095 if (ret < 0)
1096 fusb302_log(chip,
1097 "cannot send PD message, ret=%d", ret);
1098 break;
1099 case TCPC_TX_HARD_RESET:
1100 ret = fusb302_pd_send_hardreset(chip);
1101 if (ret < 0)
1102 fusb302_log(chip,
1103 "cannot send hardreset, ret=%d", ret);
1104 break;
1105 default:
1106 fusb302_log(chip, "type %s not supported",
1107 transmit_type_name[type]);
1108 ret = -EINVAL;
1109 }
1110 mutex_unlock(&chip->lock);
1111
1112 return ret;
1113 }
1114
fusb302_bc_lvl_to_cc(u8 bc_lvl)1115 static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl)
1116 {
1117 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX)
1118 return TYPEC_CC_RP_3_0;
1119 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230)
1120 return TYPEC_CC_RP_1_5;
1121 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600)
1122 return TYPEC_CC_RP_DEF;
1123 return TYPEC_CC_OPEN;
1124 }
1125
fusb302_bc_lvl_handler_work(struct work_struct * work)1126 static void fusb302_bc_lvl_handler_work(struct work_struct *work)
1127 {
1128 struct fusb302_chip *chip = container_of(work, struct fusb302_chip,
1129 bc_lvl_handler.work);
1130 int ret = 0;
1131 u8 status0;
1132 u8 bc_lvl;
1133 enum typec_cc_status cc_status;
1134
1135 mutex_lock(&chip->lock);
1136 if (!chip->intr_bc_lvl) {
1137 fusb302_log(chip, "BC_LVL interrupt is turned off, abort");
1138 goto done;
1139 }
1140 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1141 if (ret < 0)
1142 goto done;
1143 fusb302_log(chip, "BC_LVL handler, status0=0x%02x", status0);
1144 if (status0 & FUSB_REG_STATUS0_ACTIVITY) {
1145 fusb302_log(chip, "CC activities detected, delay handling");
1146 mod_delayed_work(chip->wq, &chip->bc_lvl_handler,
1147 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS));
1148 goto done;
1149 }
1150 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1151 cc_status = fusb302_bc_lvl_to_cc(bc_lvl);
1152 if (chip->cc_polarity == TYPEC_POLARITY_CC1) {
1153 if (chip->cc1 != cc_status) {
1154 fusb302_log(chip, "cc1: %s -> %s",
1155 typec_cc_status_name[chip->cc1],
1156 typec_cc_status_name[cc_status]);
1157 chip->cc1 = cc_status;
1158 tcpm_cc_change(chip->tcpm_port);
1159 }
1160 } else {
1161 if (chip->cc2 != cc_status) {
1162 fusb302_log(chip, "cc2: %s -> %s",
1163 typec_cc_status_name[chip->cc2],
1164 typec_cc_status_name[cc_status]);
1165 chip->cc2 = cc_status;
1166 tcpm_cc_change(chip->tcpm_port);
1167 }
1168 }
1169
1170 done:
1171 mutex_unlock(&chip->lock);
1172 }
1173
1174 #define PDO_FIXED_FLAGS \
1175 (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)
1176
1177 static const u32 src_pdo[] = {
1178 PDO_FIXED(5000, 400, PDO_FIXED_FLAGS),
1179 };
1180
1181 static const u32 snk_pdo[] = {
1182 PDO_FIXED(5000, 400, PDO_FIXED_FLAGS),
1183 };
1184
1185 static const struct tcpc_config fusb302_tcpc_config = {
1186 .src_pdo = src_pdo,
1187 .nr_src_pdo = ARRAY_SIZE(src_pdo),
1188 .operating_snk_mw = 2500,
1189 .type = TYPEC_PORT_DRP,
1190 .data = TYPEC_PORT_DRD,
1191 .default_role = TYPEC_SINK,
1192 .alt_modes = NULL,
1193 };
1194
init_tcpc_dev(struct tcpc_dev * fusb302_tcpc_dev)1195 static void init_tcpc_dev(struct tcpc_dev *fusb302_tcpc_dev)
1196 {
1197 fusb302_tcpc_dev->init = tcpm_init;
1198 fusb302_tcpc_dev->get_vbus = tcpm_get_vbus;
1199 fusb302_tcpc_dev->get_current_limit = tcpm_get_current_limit;
1200 fusb302_tcpc_dev->set_cc = tcpm_set_cc;
1201 fusb302_tcpc_dev->get_cc = tcpm_get_cc;
1202 fusb302_tcpc_dev->set_polarity = tcpm_set_polarity;
1203 fusb302_tcpc_dev->set_vconn = tcpm_set_vconn;
1204 fusb302_tcpc_dev->set_vbus = tcpm_set_vbus;
1205 fusb302_tcpc_dev->set_pd_rx = tcpm_set_pd_rx;
1206 fusb302_tcpc_dev->set_roles = tcpm_set_roles;
1207 fusb302_tcpc_dev->start_drp_toggling = tcpm_start_drp_toggling;
1208 fusb302_tcpc_dev->pd_transmit = tcpm_pd_transmit;
1209 }
1210
1211 static const char * const cc_polarity_name[] = {
1212 [TYPEC_POLARITY_CC1] = "Polarity_CC1",
1213 [TYPEC_POLARITY_CC2] = "Polarity_CC2",
1214 };
1215
fusb302_set_cc_polarity(struct fusb302_chip * chip,enum typec_cc_polarity cc_polarity)1216 static int fusb302_set_cc_polarity(struct fusb302_chip *chip,
1217 enum typec_cc_polarity cc_polarity)
1218 {
1219 int ret = 0;
1220 u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
1221 FUSB_REG_SWITCHES0_CC2_PU_EN |
1222 FUSB_REG_SWITCHES0_VCONN_CC1 |
1223 FUSB_REG_SWITCHES0_VCONN_CC2 |
1224 FUSB_REG_SWITCHES0_MEAS_CC1 |
1225 FUSB_REG_SWITCHES0_MEAS_CC2;
1226 u8 switches0_data = 0x00;
1227 u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN |
1228 FUSB_REG_SWITCHES1_TXCC2_EN;
1229 u8 switches1_data = 0x00;
1230
1231 if (cc_polarity == TYPEC_POLARITY_CC1) {
1232 switches0_data = FUSB_REG_SWITCHES0_MEAS_CC1;
1233 if (chip->vconn_on)
1234 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2;
1235 if (chip->pull_up)
1236 switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN;
1237 switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN;
1238 } else {
1239 switches0_data = FUSB_REG_SWITCHES0_MEAS_CC2;
1240 if (chip->vconn_on)
1241 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1;
1242 if (chip->pull_up)
1243 switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN;
1244 switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN;
1245 }
1246 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
1247 switches0_mask, switches0_data);
1248 if (ret < 0)
1249 return ret;
1250 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
1251 switches1_mask, switches1_data);
1252 if (ret < 0)
1253 return ret;
1254 chip->cc_polarity = cc_polarity;
1255
1256 return ret;
1257 }
1258
fusb302_handle_togdone_snk(struct fusb302_chip * chip,u8 togdone_result)1259 static int fusb302_handle_togdone_snk(struct fusb302_chip *chip,
1260 u8 togdone_result)
1261 {
1262 int ret = 0;
1263 u8 status0;
1264 u8 bc_lvl;
1265 enum typec_cc_polarity cc_polarity;
1266 enum typec_cc_status cc_status_active, cc1, cc2;
1267
1268 /* set pull_up, pull_down */
1269 ret = fusb302_set_cc_pull(chip, false, true);
1270 if (ret < 0) {
1271 fusb302_log(chip, "cannot set cc to pull down, ret=%d", ret);
1272 return ret;
1273 }
1274 /* set polarity */
1275 cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
1276 TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
1277 ret = fusb302_set_cc_polarity(chip, cc_polarity);
1278 if (ret < 0) {
1279 fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
1280 cc_polarity_name[cc_polarity], ret);
1281 return ret;
1282 }
1283 /* fusb302_set_cc_polarity() has set the correct measure block */
1284 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1285 if (ret < 0)
1286 return ret;
1287 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1288 cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl);
1289 /* restart toggling if the cc status on the active line is OPEN */
1290 if (cc_status_active == TYPEC_CC_OPEN) {
1291 fusb302_log(chip, "restart toggling as CC_OPEN detected");
1292 ret = fusb302_set_toggling(chip, chip->toggling_mode);
1293 return ret;
1294 }
1295 /* update tcpm with the new cc value */
1296 cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
1297 cc_status_active : TYPEC_CC_OPEN;
1298 cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
1299 cc_status_active : TYPEC_CC_OPEN;
1300 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1301 chip->cc1 = cc1;
1302 chip->cc2 = cc2;
1303 tcpm_cc_change(chip->tcpm_port);
1304 }
1305 /* turn off toggling */
1306 ret = fusb302_set_toggling(chip, TOGGLINE_MODE_OFF);
1307 if (ret < 0) {
1308 fusb302_log(chip,
1309 "cannot set toggling mode off, ret=%d", ret);
1310 return ret;
1311 }
1312 /* unmask bc_lvl interrupt */
1313 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL);
1314 if (ret < 0) {
1315 fusb302_log(chip,
1316 "cannot unmask bc_lcl interrupt, ret=%d", ret);
1317 return ret;
1318 }
1319 chip->intr_bc_lvl = true;
1320 fusb302_log(chip, "detected cc1=%s, cc2=%s",
1321 typec_cc_status_name[cc1],
1322 typec_cc_status_name[cc2]);
1323
1324 return ret;
1325 }
1326
fusb302_handle_togdone_src(struct fusb302_chip * chip,u8 togdone_result)1327 static int fusb302_handle_togdone_src(struct fusb302_chip *chip,
1328 u8 togdone_result)
1329 {
1330 /*
1331 * - set polarity (measure cc, vconn, tx)
1332 * - set pull_up, pull_down
1333 * - set cc1, cc2, and update to tcpm_port
1334 * - set I_COMP interrupt on
1335 */
1336 int ret = 0;
1337 u8 status0;
1338 u8 ra_mda = ra_mda_value[chip->src_current_status];
1339 u8 rd_mda = rd_mda_value[chip->src_current_status];
1340 bool ra_comp, rd_comp;
1341 enum typec_cc_polarity cc_polarity;
1342 enum typec_cc_status cc_status_active, cc1, cc2;
1343
1344 /* set pull_up, pull_down */
1345 ret = fusb302_set_cc_pull(chip, true, false);
1346 if (ret < 0) {
1347 fusb302_log(chip, "cannot set cc to pull up, ret=%d", ret);
1348 return ret;
1349 }
1350 /* set polarity */
1351 cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) ?
1352 TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
1353 ret = fusb302_set_cc_polarity(chip, cc_polarity);
1354 if (ret < 0) {
1355 fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
1356 cc_polarity_name[cc_polarity], ret);
1357 return ret;
1358 }
1359 /* fusb302_set_cc_polarity() has set the correct measure block */
1360 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1361 if (ret < 0)
1362 return ret;
1363 usleep_range(50, 100);
1364 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1365 if (ret < 0)
1366 return ret;
1367 rd_comp = !!(status0 & FUSB_REG_STATUS0_COMP);
1368 if (!rd_comp) {
1369 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, ra_mda);
1370 if (ret < 0)
1371 return ret;
1372 usleep_range(50, 100);
1373 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1374 if (ret < 0)
1375 return ret;
1376 ra_comp = !!(status0 & FUSB_REG_STATUS0_COMP);
1377 }
1378 if (rd_comp)
1379 cc_status_active = TYPEC_CC_OPEN;
1380 else if (ra_comp)
1381 cc_status_active = TYPEC_CC_RD;
1382 else
1383 /* Ra is not supported, report as Open */
1384 cc_status_active = TYPEC_CC_OPEN;
1385 /* restart toggling if the cc status on the active line is OPEN */
1386 if (cc_status_active == TYPEC_CC_OPEN) {
1387 fusb302_log(chip, "restart toggling as CC_OPEN detected");
1388 ret = fusb302_set_toggling(chip, chip->toggling_mode);
1389 return ret;
1390 }
1391 /* update tcpm with the new cc value */
1392 cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
1393 cc_status_active : TYPEC_CC_OPEN;
1394 cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
1395 cc_status_active : TYPEC_CC_OPEN;
1396 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1397 chip->cc1 = cc1;
1398 chip->cc2 = cc2;
1399 tcpm_cc_change(chip->tcpm_port);
1400 }
1401 /* turn off toggling */
1402 ret = fusb302_set_toggling(chip, TOGGLINE_MODE_OFF);
1403 if (ret < 0) {
1404 fusb302_log(chip,
1405 "cannot set toggling mode off, ret=%d", ret);
1406 return ret;
1407 }
1408 /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */
1409 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1410 if (ret < 0)
1411 return ret;
1412 /* unmask comp_chng interrupt */
1413 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK,
1414 FUSB_REG_MASK_COMP_CHNG);
1415 if (ret < 0) {
1416 fusb302_log(chip,
1417 "cannot unmask bc_lcl interrupt, ret=%d", ret);
1418 return ret;
1419 }
1420 chip->intr_comp_chng = true;
1421 fusb302_log(chip, "detected cc1=%s, cc2=%s",
1422 typec_cc_status_name[cc1],
1423 typec_cc_status_name[cc2]);
1424
1425 return ret;
1426 }
1427
fusb302_handle_togdone(struct fusb302_chip * chip)1428 static int fusb302_handle_togdone(struct fusb302_chip *chip)
1429 {
1430 int ret = 0;
1431 u8 status1a;
1432 u8 togdone_result;
1433
1434 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS1A, &status1a);
1435 if (ret < 0)
1436 return ret;
1437 togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) &
1438 FUSB_REG_STATUS1A_TOGSS_MASK;
1439 switch (togdone_result) {
1440 case FUSB_REG_STATUS1A_TOGSS_SNK1:
1441 case FUSB_REG_STATUS1A_TOGSS_SNK2:
1442 return fusb302_handle_togdone_snk(chip, togdone_result);
1443 case FUSB_REG_STATUS1A_TOGSS_SRC1:
1444 case FUSB_REG_STATUS1A_TOGSS_SRC2:
1445 return fusb302_handle_togdone_src(chip, togdone_result);
1446 case FUSB_REG_STATUS1A_TOGSS_AA:
1447 /* doesn't support */
1448 fusb302_log(chip, "AudioAccessory not supported");
1449 fusb302_set_toggling(chip, chip->toggling_mode);
1450 break;
1451 default:
1452 fusb302_log(chip, "TOGDONE with an invalid state: %d",
1453 togdone_result);
1454 fusb302_set_toggling(chip, chip->toggling_mode);
1455 break;
1456 }
1457 return ret;
1458 }
1459
fusb302_pd_reset(struct fusb302_chip * chip)1460 static int fusb302_pd_reset(struct fusb302_chip *chip)
1461 {
1462 return fusb302_i2c_set_bits(chip, FUSB_REG_RESET,
1463 FUSB_REG_RESET_PD_RESET);
1464 }
1465
fusb302_pd_read_message(struct fusb302_chip * chip,struct pd_message * msg)1466 static int fusb302_pd_read_message(struct fusb302_chip *chip,
1467 struct pd_message *msg)
1468 {
1469 int ret = 0;
1470 u8 token;
1471 u8 crc[4];
1472 int len;
1473
1474 /* first SOP token */
1475 ret = fusb302_i2c_read(chip, FUSB_REG_FIFOS, &token);
1476 if (ret < 0)
1477 return ret;
1478 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 2,
1479 (u8 *)&msg->header);
1480 if (ret < 0)
1481 return ret;
1482 len = pd_header_cnt_le(msg->header) * 4;
1483 /* add 4 to length to include the CRC */
1484 if (len > PD_MAX_PAYLOAD * 4) {
1485 fusb302_log(chip, "PD message too long %d", len);
1486 return -EINVAL;
1487 }
1488 if (len > 0) {
1489 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, len,
1490 (u8 *)msg->payload);
1491 if (ret < 0)
1492 return ret;
1493 }
1494 /* another 4 bytes to read CRC out */
1495 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 4, crc);
1496 if (ret < 0)
1497 return ret;
1498 fusb302_log(chip, "PD message header: %x", msg->header);
1499 fusb302_log(chip, "PD message len: %d", len);
1500
1501 /*
1502 * Check if we've read off a GoodCRC message. If so then indicate to
1503 * TCPM that the previous transmission has completed. Otherwise we pass
1504 * the received message over to TCPM for processing.
1505 *
1506 * We make this check here instead of basing the reporting decision on
1507 * the IRQ event type, as it's possible for the chip to report the
1508 * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need
1509 * to check the message type to ensure correct reporting to TCPM.
1510 */
1511 if ((!len) && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC))
1512 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1513 else
1514 tcpm_pd_receive(chip->tcpm_port, msg);
1515
1516 return ret;
1517 }
1518
fusb302_irq_intn(int irq,void * dev_id)1519 static irqreturn_t fusb302_irq_intn(int irq, void *dev_id)
1520 {
1521 struct fusb302_chip *chip = dev_id;
1522 int ret = 0;
1523 u8 interrupt;
1524 u8 interrupta;
1525 u8 interruptb;
1526 u8 status0;
1527 bool vbus_present;
1528 bool comp_result;
1529 bool intr_togdone;
1530 bool intr_bc_lvl;
1531 bool intr_comp_chng;
1532 struct pd_message pd_msg;
1533
1534 mutex_lock(&chip->lock);
1535 /* grab a snapshot of intr flags */
1536 intr_togdone = chip->intr_togdone;
1537 intr_bc_lvl = chip->intr_bc_lvl;
1538 intr_comp_chng = chip->intr_comp_chng;
1539
1540 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPT, &interrupt);
1541 if (ret < 0)
1542 goto done;
1543 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTA, &interrupta);
1544 if (ret < 0)
1545 goto done;
1546 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTB, &interruptb);
1547 if (ret < 0)
1548 goto done;
1549 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1550 if (ret < 0)
1551 goto done;
1552 fusb302_log(chip,
1553 "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x",
1554 interrupt, interrupta, interruptb, status0);
1555
1556 if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) {
1557 vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK);
1558 fusb302_log(chip, "IRQ: VBUS_OK, vbus=%s",
1559 vbus_present ? "On" : "Off");
1560 if (vbus_present != chip->vbus_present) {
1561 chip->vbus_present = vbus_present;
1562 tcpm_vbus_change(chip->tcpm_port);
1563 }
1564 }
1565
1566 if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) {
1567 fusb302_log(chip, "IRQ: TOGDONE");
1568 ret = fusb302_handle_togdone(chip);
1569 if (ret < 0) {
1570 fusb302_log(chip,
1571 "handle togdone error, ret=%d", ret);
1572 goto done;
1573 }
1574 }
1575
1576 if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) {
1577 fusb302_log(chip, "IRQ: BC_LVL, handler pending");
1578 /*
1579 * as BC_LVL interrupt can be affected by PD activity,
1580 * apply delay to for the handler to wait for the PD
1581 * signaling to finish.
1582 */
1583 mod_delayed_work(chip->wq, &chip->bc_lvl_handler,
1584 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS));
1585 }
1586
1587 if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) {
1588 comp_result = !!(status0 & FUSB_REG_STATUS0_COMP);
1589 fusb302_log(chip, "IRQ: COMP_CHNG, comp=%s",
1590 comp_result ? "true" : "false");
1591 if (comp_result) {
1592 /* cc level > Rd_threashold, detach */
1593 if (chip->cc_polarity == TYPEC_POLARITY_CC1)
1594 chip->cc1 = TYPEC_CC_OPEN;
1595 else
1596 chip->cc2 = TYPEC_CC_OPEN;
1597 tcpm_cc_change(chip->tcpm_port);
1598 }
1599 }
1600
1601 if (interrupt & FUSB_REG_INTERRUPT_COLLISION) {
1602 fusb302_log(chip, "IRQ: PD collision");
1603 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1604 }
1605
1606 if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) {
1607 fusb302_log(chip, "IRQ: PD retry failed");
1608 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1609 }
1610
1611 if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) {
1612 fusb302_log(chip, "IRQ: PD hardreset sent");
1613 ret = fusb302_pd_reset(chip);
1614 if (ret < 0) {
1615 fusb302_log(chip, "cannot PD reset, ret=%d", ret);
1616 goto done;
1617 }
1618 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1619 }
1620
1621 if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) {
1622 fusb302_log(chip, "IRQ: PD tx success");
1623 ret = fusb302_pd_read_message(chip, &pd_msg);
1624 if (ret < 0) {
1625 fusb302_log(chip,
1626 "cannot read in PD message, ret=%d", ret);
1627 goto done;
1628 }
1629 }
1630
1631 if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) {
1632 fusb302_log(chip, "IRQ: PD received hardreset");
1633 ret = fusb302_pd_reset(chip);
1634 if (ret < 0) {
1635 fusb302_log(chip, "cannot PD reset, ret=%d", ret);
1636 goto done;
1637 }
1638 tcpm_pd_hard_reset(chip->tcpm_port);
1639 }
1640
1641 if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) {
1642 fusb302_log(chip, "IRQ: PD sent good CRC");
1643 ret = fusb302_pd_read_message(chip, &pd_msg);
1644 if (ret < 0) {
1645 fusb302_log(chip,
1646 "cannot read in PD message, ret=%d", ret);
1647 goto done;
1648 }
1649 }
1650 done:
1651 mutex_unlock(&chip->lock);
1652
1653 return IRQ_HANDLED;
1654 }
1655
init_gpio(struct fusb302_chip * chip)1656 static int init_gpio(struct fusb302_chip *chip)
1657 {
1658 struct device_node *node;
1659 int ret = 0;
1660
1661 node = chip->dev->of_node;
1662 chip->gpio_int_n = of_get_named_gpio(node, "fcs,int_n", 0);
1663 if (!gpio_is_valid(chip->gpio_int_n)) {
1664 ret = chip->gpio_int_n;
1665 dev_err(chip->dev, "cannot get named GPIO Int_N, ret=%d", ret);
1666 return ret;
1667 }
1668 ret = devm_gpio_request(chip->dev, chip->gpio_int_n, "fcs,int_n");
1669 if (ret < 0) {
1670 dev_err(chip->dev, "cannot request GPIO Int_N, ret=%d", ret);
1671 return ret;
1672 }
1673 ret = gpio_direction_input(chip->gpio_int_n);
1674 if (ret < 0) {
1675 dev_err(chip->dev,
1676 "cannot set GPIO Int_N to input, ret=%d", ret);
1677 return ret;
1678 }
1679 ret = gpio_to_irq(chip->gpio_int_n);
1680 if (ret < 0) {
1681 dev_err(chip->dev,
1682 "cannot request IRQ for GPIO Int_N, ret=%d", ret);
1683 return ret;
1684 }
1685 chip->gpio_int_n_irq = ret;
1686 return 0;
1687 }
1688
fusb302_composite_snk_pdo_array(struct fusb302_chip * chip)1689 static int fusb302_composite_snk_pdo_array(struct fusb302_chip *chip)
1690 {
1691 struct device *dev = chip->dev;
1692 u32 max_uv, max_ua;
1693
1694 chip->snk_pdo[0] = PDO_FIXED(5000, 400, PDO_FIXED_FLAGS);
1695
1696 /*
1697 * As max_snk_ma/mv/mw is not needed for tcpc_config,
1698 * those settings should be passed in via sink PDO, so
1699 * "fcs, max-sink-*" properties will be deprecated, to
1700 * perserve compatibility with existing users of them,
1701 * we read those properties to convert them to be a var
1702 * PDO.
1703 */
1704 if (device_property_read_u32(dev, "fcs,max-sink-microvolt", &max_uv) ||
1705 device_property_read_u32(dev, "fcs,max-sink-microamp", &max_ua))
1706 return 1;
1707
1708 chip->snk_pdo[1] = PDO_VAR(5000, max_uv / 1000, max_ua / 1000);
1709 return 2;
1710 }
1711
fusb302_probe(struct i2c_client * client,const struct i2c_device_id * id)1712 static int fusb302_probe(struct i2c_client *client,
1713 const struct i2c_device_id *id)
1714 {
1715 struct fusb302_chip *chip;
1716 struct i2c_adapter *adapter;
1717 struct device *dev = &client->dev;
1718 const char *name;
1719 int ret = 0;
1720 u32 v;
1721
1722 adapter = to_i2c_adapter(client->dev.parent);
1723 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1724 dev_err(&client->dev,
1725 "I2C/SMBus block functionality not supported!\n");
1726 return -ENODEV;
1727 }
1728 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
1729 if (!chip)
1730 return -ENOMEM;
1731
1732 chip->i2c_client = client;
1733 i2c_set_clientdata(client, chip);
1734 chip->dev = &client->dev;
1735 chip->tcpc_config = fusb302_tcpc_config;
1736 chip->tcpc_dev.config = &chip->tcpc_config;
1737 mutex_init(&chip->lock);
1738
1739 if (!device_property_read_u32(dev, "fcs,operating-sink-microwatt", &v))
1740 chip->tcpc_config.operating_snk_mw = v / 1000;
1741
1742 /* Composite sink PDO */
1743 chip->tcpc_config.nr_snk_pdo = fusb302_composite_snk_pdo_array(chip);
1744 chip->tcpc_config.snk_pdo = chip->snk_pdo;
1745
1746 /*
1747 * Devicetree platforms should get extcon via phandle (not yet
1748 * supported). On ACPI platforms, we get the name from a device prop.
1749 * This device prop is for kernel internal use only and is expected
1750 * to be set by the platform code which also registers the i2c client
1751 * for the fusb302.
1752 */
1753 if (device_property_read_string(dev, "fcs,extcon-name", &name) == 0) {
1754 chip->extcon = extcon_get_extcon_dev(name);
1755 if (!chip->extcon)
1756 return -EPROBE_DEFER;
1757 }
1758
1759 fusb302_debugfs_init(chip);
1760
1761 chip->wq = create_singlethread_workqueue(dev_name(chip->dev));
1762 if (!chip->wq) {
1763 ret = -ENOMEM;
1764 goto clear_client_data;
1765 }
1766 INIT_DELAYED_WORK(&chip->bc_lvl_handler, fusb302_bc_lvl_handler_work);
1767 init_tcpc_dev(&chip->tcpc_dev);
1768
1769 chip->vbus = devm_regulator_get(chip->dev, "vbus");
1770 if (IS_ERR(chip->vbus)) {
1771 ret = PTR_ERR(chip->vbus);
1772 goto destroy_workqueue;
1773 }
1774
1775 if (client->irq) {
1776 chip->gpio_int_n_irq = client->irq;
1777 } else {
1778 ret = init_gpio(chip);
1779 if (ret < 0)
1780 goto destroy_workqueue;
1781 }
1782
1783 chip->tcpm_port = tcpm_register_port(&client->dev, &chip->tcpc_dev);
1784 if (IS_ERR(chip->tcpm_port)) {
1785 ret = PTR_ERR(chip->tcpm_port);
1786 if (ret != -EPROBE_DEFER)
1787 dev_err(dev, "cannot register tcpm port, ret=%d", ret);
1788 goto destroy_workqueue;
1789 }
1790
1791 ret = devm_request_threaded_irq(chip->dev, chip->gpio_int_n_irq,
1792 NULL, fusb302_irq_intn,
1793 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
1794 "fsc_interrupt_int_n", chip);
1795 if (ret < 0) {
1796 dev_err(dev, "cannot request IRQ for GPIO Int_N, ret=%d", ret);
1797 goto tcpm_unregister_port;
1798 }
1799 enable_irq_wake(chip->gpio_int_n_irq);
1800 return ret;
1801
1802 tcpm_unregister_port:
1803 tcpm_unregister_port(chip->tcpm_port);
1804 destroy_workqueue:
1805 destroy_workqueue(chip->wq);
1806 clear_client_data:
1807 i2c_set_clientdata(client, NULL);
1808 fusb302_debugfs_exit(chip);
1809
1810 return ret;
1811 }
1812
fusb302_remove(struct i2c_client * client)1813 static int fusb302_remove(struct i2c_client *client)
1814 {
1815 struct fusb302_chip *chip = i2c_get_clientdata(client);
1816
1817 tcpm_unregister_port(chip->tcpm_port);
1818 destroy_workqueue(chip->wq);
1819 i2c_set_clientdata(client, NULL);
1820 fusb302_debugfs_exit(chip);
1821
1822 return 0;
1823 }
1824
fusb302_pm_suspend(struct device * dev)1825 static int fusb302_pm_suspend(struct device *dev)
1826 {
1827 struct fusb302_chip *chip = dev->driver_data;
1828
1829 if (atomic_read(&chip->i2c_busy))
1830 return -EBUSY;
1831 atomic_set(&chip->pm_suspend, 1);
1832
1833 return 0;
1834 }
1835
fusb302_pm_resume(struct device * dev)1836 static int fusb302_pm_resume(struct device *dev)
1837 {
1838 struct fusb302_chip *chip = dev->driver_data;
1839
1840 atomic_set(&chip->pm_suspend, 0);
1841
1842 return 0;
1843 }
1844
1845 static const struct of_device_id fusb302_dt_match[] = {
1846 {.compatible = "fcs,fusb302"},
1847 {},
1848 };
1849 MODULE_DEVICE_TABLE(of, fusb302_dt_match);
1850
1851 static const struct i2c_device_id fusb302_i2c_device_id[] = {
1852 {"typec_fusb302", 0},
1853 {},
1854 };
1855 MODULE_DEVICE_TABLE(i2c, fusb302_i2c_device_id);
1856
1857 static const struct dev_pm_ops fusb302_pm_ops = {
1858 .suspend = fusb302_pm_suspend,
1859 .resume = fusb302_pm_resume,
1860 };
1861
1862 static struct i2c_driver fusb302_driver = {
1863 .driver = {
1864 .name = "typec_fusb302",
1865 .pm = &fusb302_pm_ops,
1866 .of_match_table = of_match_ptr(fusb302_dt_match),
1867 },
1868 .probe = fusb302_probe,
1869 .remove = fusb302_remove,
1870 .id_table = fusb302_i2c_device_id,
1871 };
1872 module_i2c_driver(fusb302_driver);
1873
1874 MODULE_AUTHOR("Yueyao Zhu <yueyao.zhu@gmail.com>");
1875 MODULE_DESCRIPTION("Fairchild FUSB302 Type-C Chip Driver");
1876 MODULE_LICENSE("GPL");
1877
