1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2016 Realtek Corporation. 5 * 6 * Contact Information: 7 * wlanfae <wlanfae@realtek.com> 8 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 9 * Hsinchu 300, Taiwan. 10 * 11 * Larry Finger <Larry.Finger@lwfinger.net> 12 * 13 *****************************************************************************/ 14 15 #ifndef __RTL8822B__FW__H__ 16 #define __RTL8822B__FW__H__ 17 18 #define USE_OLD_WOWLAN_DEBUG_FW 0 19 20 #define H2C_8822B_RSVDPAGE_LOC_LEN 5 21 #define H2C_8822B_PWEMODE_LENGTH 7 22 #define H2C_8822B_JOINBSSRPT_LENGTH 1 23 #define H2C_8822B_AP_OFFLOAD_LENGTH 3 24 #define H2C_8822B_WOWLAN_LENGTH 3 25 #define H2C_8822B_KEEP_ALIVE_CTRL_LENGTH 3 26 #if (USE_OLD_WOWLAN_DEBUG_FW == 0) 27 #define H2C_8822B_REMOTE_WAKE_CTRL_LEN 1 28 #else 29 #define H2C_8822B_REMOTE_WAKE_CTRL_LEN 3 30 #endif 31 #define H2C_8822B_AOAC_GLOBAL_INFO_LEN 2 32 #define H2C_8822B_AOAC_RSVDPAGE_LOC_LEN 7 33 #define H2C_DEFAULT_PORT_ID_LEN 2 34 35 /* Fw PS state for RPWM. 36 *BIT[2:0] = HW state 37 *BIT[3] = Protocol PS state, 1: register active state, 0: register sleep state 38 *BIT[4] = sub-state 39 */ 40 #define FW_PS_RF_ON BIT(2) 41 #define FW_PS_REGISTER_ACTIVE BIT(3) 42 43 #define FW_PS_ACK BIT(6) 44 #define FW_PS_TOGGLE BIT(7) 45 46 /* 8822B RPWM value*/ 47 /* BIT[0] = 1: 32k, 0: 40M*/ 48 #define FW_PS_CLOCK_OFF BIT(0) /* 32k */ 49 #define FW_PS_CLOCK_ON 0 /* 40M */ 50 51 #define FW_PS_STATE_MASK (0x0F) 52 #define FW_PS_STATE_HW_MASK (0x07) 53 #define FW_PS_STATE_INT_MASK (0x3F) 54 55 #define FW_PS_STATE(x) (FW_PS_STATE_MASK & (x)) 56 57 #define FW_PS_STATE_ALL_ON_8822B (FW_PS_CLOCK_ON) 58 #define FW_PS_STATE_RF_ON_8822B (FW_PS_CLOCK_ON) 59 #define FW_PS_STATE_RF_OFF_8822B (FW_PS_CLOCK_ON) 60 #define FW_PS_STATE_RF_OFF_LOW_PWR (FW_PS_CLOCK_OFF) 61 62 /* For 8822B H2C PwrMode Cmd ID 5.*/ 63 #define FW_PWR_STATE_ACTIVE ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE)) 64 #define FW_PWR_STATE_RF_OFF 0 65 66 #define FW_PS_IS_ACK(x) ((x) & FW_PS_ACK) 67 68 #define IS_IN_LOW_POWER_STATE_8822B(fw_ps_state) \ 69 (FW_PS_STATE(fw_ps_state) == FW_PS_CLOCK_OFF) 70 71 #define FW_PWR_STATE_ACTIVE ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE)) 72 #define FW_PWR_STATE_RF_OFF 0 73 74 enum rtl8822b_h2c_cmd { 75 H2C_8822B_RSVDPAGE = 0, 76 H2C_8822B_MSRRPT = 1, 77 H2C_8822B_SCAN = 2, 78 H2C_8822B_KEEP_ALIVE_CTRL = 3, 79 H2C_8822B_DISCONNECT_DECISION = 4, 80 #if (USE_OLD_WOWLAN_DEBUG_FW == 1) 81 H2C_8822B_WO_WLAN = 5, 82 #endif 83 H2C_8822B_INIT_OFFLOAD = 6, 84 #if (USE_OLD_WOWLAN_DEBUG_FW == 1) 85 H2C_8822B_REMOTE_WAKE_CTRL = 7, 86 #endif 87 H2C_8822B_AP_OFFLOAD = 8, 88 H2C_8822B_BCN_RSVDPAGE = 9, 89 H2C_8822B_PROBERSP_RSVDPAGE = 10, 90 91 H2C_8822B_SETPWRMODE = 0x20, 92 H2C_8822B_PS_TUNING_PARA = 0x21, 93 H2C_8822B_PS_TUNING_PARA2 = 0x22, 94 H2C_8822B_PS_LPS_PARA = 0x23, 95 H2C_8822B_P2P_PS_OFFLOAD = 024, 96 H2C_8822B_DEFAULT_PORT_ID = 0x2C, 97 98 #if (USE_OLD_WOWLAN_DEBUG_FW == 0) 99 H2C_8822B_WO_WLAN = 0x80, 100 H2C_8822B_REMOTE_WAKE_CTRL = 0x81, 101 H2C_8822B_AOAC_GLOBAL_INFO = 0x82, 102 H2C_8822B_AOAC_RSVDPAGE = 0x83, 103 #endif 104 H2C_8822B_MACID_CFG = 0x40, 105 H2C_8822B_RSSI_REPORT = 0x42, 106 H2C_8822B_MACID_CFG_3SS = 0x46, 107 /*Not defined CTW CMD for P2P yet*/ 108 H2C_8822B_P2P_PS_CTW_CMD = 0x99, 109 MAX_8822B_H2CCMD 110 }; 111 112 enum rtl8822b_c2h_evt { 113 C2H_8822B_DBG = 0x00, 114 C2H_8822B_LB = 0x01, 115 C2H_8822B_TXBF = 0x02, 116 C2H_8822B_TX_REPORT = 0x03, 117 C2H_8822B_BT_INFO = 0x09, 118 C2H_8822B_BT_MP = 0x0B, 119 C2H_8822B_RA_RPT = 0x0C, 120 MAX_8822B_C2HEVENT 121 }; 122 123 /* H2C: 0x20 */ 124 #define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \ 125 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 7, __val) 126 #define SET_H2CCMD_PWRMODE_PARM_CLK_REQ(__ph2ccmd, __val) \ 127 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 7, 1, __val) 128 #define SET_H2CCMD_PWRMODE_PARM_RLBM(__ph2ccmd, __val) \ 129 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 4, __val) 130 #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val) \ 131 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 4, 4, __val) 132 #define SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(__ph2ccmd, __val) \ 133 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val) 134 #define SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__ph2ccmd, __val) \ 135 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 0, 1, __val) 136 #define SET_H2CCMD_PWRMODE_PARM_BCN_EARLY_RPT(__ph2ccmd, __val) \ 137 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 2, 1, __val) 138 #define SET_H2CCMD_PWRMODE_PARM_PORT_ID(__ph2ccmd, __val) \ 139 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 5, 3, __val) 140 #define SET_H2CCMD_PWRMODE_PARM_PWR_STATE(__ph2ccmd, __val) \ 141 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 4, 0, 8, __val) 142 #define SET_H2CCMD_PWRMODE_PARM_BYTE5(__ph2ccmd, __val) \ 143 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 5, 0, 8, __val) 144 145 /* H2C: 0x00 */ 146 #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val) \ 147 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val) 148 #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val) \ 149 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val) 150 #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \ 151 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val) 152 #define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__ph2ccmd, __val) \ 153 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 0, 8, __val) 154 #define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__ph2ccmd, __val) \ 155 SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 4, 0, 8, __val) 156 157 /* H2C: 0x01 */ 158 #define SET_H2CCMD_MSRRPT_PARM_OPMODE(__ph2ccmd, __val) \ 159 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 1, __val) 160 #define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__ph2ccmd, __val) \ 161 SET_BITS_TO_LE_1BYTE(__ph2ccmd, 1, 1, __val) 162 #define SET_H2CCMD_MSRRPT_PARM_MACID(__ph2ccmd, __val) \ 163 SET_BITS_TO_LE_1BYTE(__ph2ccmd + 1, 0, 8, __val) 164 #define SET_H2CCMD_MSRRPT_PARM_MACID_END(__ph2ccmd, __val) \ 165 SET_BITS_TO_LE_1BYTE(__ph2ccmd + 2, 0, 8, __val) 166 167 /* H2C: 0x2C */ 168 #define SET_H2CCMD_DFTPID_PORT_ID(__ph2ccmd, __val) \ 169 SET_BITS_TO_LE_1BYTE(((u8 *)(__ph2ccmd)), 0, 8, (__val)) 170 #define SET_H2CCMD_DFTPID_MAC_ID(__ph2ccmd, __val) \ 171 SET_BITS_TO_LE_1BYTE(((u8 *)(__ph2ccmd)) + 1, 0, 8, (__val)) 172 173 void rtl8822be_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id, u32 cmd_len, 174 u8 *cmdbuffer); 175 void rtl8822be_set_default_port_id_cmd(struct ieee80211_hw *hw); 176 void rtl8822be_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode); 177 void rtl8822be_set_fw_media_status_rpt_cmd(struct ieee80211_hw *hw, u8 mstatus); 178 void rtl8822be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished); 179 void rtl8822be_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state); 180 void rtl8822be_c2h_packet_handler(struct ieee80211_hw *hw, u8 *buffer, u8 len); 181 void rtl8822be_c2h_content_parsing(struct ieee80211_hw *hw, u8 c2h_cmd_id, 182 u8 c2h_cmd_len, u8 *tmp_buf); 183 bool rtl8822b_halmac_cb_write_data_rsvd_page(struct rtl_priv *rtlpriv, u8 *buf, 184 u32 size); 185 bool rtl8822b_halmac_cb_write_data_h2c(struct rtl_priv *rtlpriv, u8 *buf, 186 u32 size); 187 #endif 188
