1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * FB driver for the ST7789V LCD Controller
4 *
5 * Copyright (C) 2015 Dennis Menschel
6 */
7
8 #include <linux/bitops.h>
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <video/mipi_display.h>
14
15 #include "fbtft.h"
16
17 #define DRVNAME "fb_st7789v"
18
19 #define DEFAULT_GAMMA \
20 "70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25\n" \
21 "70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25"
22
23 /**
24 * enum st7789v_command - ST7789V display controller commands
25 *
26 * @PORCTRL: porch setting
27 * @GCTRL: gate control
28 * @VCOMS: VCOM setting
29 * @VDVVRHEN: VDV and VRH command enable
30 * @VRHS: VRH set
31 * @VDVS: VDV set
32 * @VCMOFSET: VCOM offset set
33 * @PWCTRL1: power control 1
34 * @PVGAMCTRL: positive voltage gamma control
35 * @NVGAMCTRL: negative voltage gamma control
36 *
37 * The command names are the same as those found in the datasheet to ease
38 * looking up their semantics and usage.
39 *
40 * Note that the ST7789V display controller offers quite a few more commands
41 * which have been omitted from this list as they are not used at the moment.
42 * Furthermore, commands that are compliant with the MIPI DCS have been left
43 * out as well to avoid duplicate entries.
44 */
45 enum st7789v_command {
46 PORCTRL = 0xB2,
47 GCTRL = 0xB7,
48 VCOMS = 0xBB,
49 VDVVRHEN = 0xC2,
50 VRHS = 0xC3,
51 VDVS = 0xC4,
52 VCMOFSET = 0xC5,
53 PWCTRL1 = 0xD0,
54 PVGAMCTRL = 0xE0,
55 NVGAMCTRL = 0xE1,
56 };
57
58 #define MADCTL_BGR BIT(3) /* bitmask for RGB/BGR order */
59 #define MADCTL_MV BIT(5) /* bitmask for page/column order */
60 #define MADCTL_MX BIT(6) /* bitmask for column address order */
61 #define MADCTL_MY BIT(7) /* bitmask for page address order */
62
63 /**
64 * init_display() - initialize the display controller
65 *
66 * @par: FBTFT parameter object
67 *
68 * Most of the commands in this init function set their parameters to the
69 * same default values which are already in place after the display has been
70 * powered up. (The main exception to this rule is the pixel format which
71 * would default to 18 instead of 16 bit per pixel.)
72 * Nonetheless, this sequence can be used as a template for concrete
73 * displays which usually need some adjustments.
74 *
75 * Return: 0 on success, < 0 if error occurred.
76 */
init_display(struct fbtft_par * par)77 static int init_display(struct fbtft_par *par)
78 {
79 /* turn off sleep mode */
80 write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
81 mdelay(120);
82
83 /* set pixel format to RGB-565 */
84 write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
85
86 write_reg(par, PORCTRL, 0x08, 0x08, 0x00, 0x22, 0x22);
87
88 /*
89 * VGH = 13.26V
90 * VGL = -10.43V
91 */
92 write_reg(par, GCTRL, 0x35);
93
94 /*
95 * VDV and VRH register values come from command write
96 * (instead of NVM)
97 */
98 write_reg(par, VDVVRHEN, 0x01, 0xFF);
99
100 /*
101 * VAP = 4.1V + (VCOM + VCOM offset + 0.5 * VDV)
102 * VAN = -4.1V + (VCOM + VCOM offset + 0.5 * VDV)
103 */
104 write_reg(par, VRHS, 0x0B);
105
106 /* VDV = 0V */
107 write_reg(par, VDVS, 0x20);
108
109 /* VCOM = 0.9V */
110 write_reg(par, VCOMS, 0x20);
111
112 /* VCOM offset = 0V */
113 write_reg(par, VCMOFSET, 0x20);
114
115 /*
116 * AVDD = 6.8V
117 * AVCL = -4.8V
118 * VDS = 2.3V
119 */
120 write_reg(par, PWCTRL1, 0xA4, 0xA1);
121
122 write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
123 return 0;
124 }
125
126 /**
127 * set_var() - apply LCD properties like rotation and BGR mode
128 *
129 * @par: FBTFT parameter object
130 *
131 * Return: 0 on success, < 0 if error occurred.
132 */
set_var(struct fbtft_par * par)133 static int set_var(struct fbtft_par *par)
134 {
135 u8 madctl_par = 0;
136
137 if (par->bgr)
138 madctl_par |= MADCTL_BGR;
139 switch (par->info->var.rotate) {
140 case 0:
141 break;
142 case 90:
143 madctl_par |= (MADCTL_MV | MADCTL_MY);
144 break;
145 case 180:
146 madctl_par |= (MADCTL_MX | MADCTL_MY);
147 break;
148 case 270:
149 madctl_par |= (MADCTL_MV | MADCTL_MX);
150 break;
151 default:
152 return -EINVAL;
153 }
154 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, madctl_par);
155 return 0;
156 }
157
158 /**
159 * set_gamma() - set gamma curves
160 *
161 * @par: FBTFT parameter object
162 * @curves: gamma curves
163 *
164 * Before the gamma curves are applied, they are preprocessed with a bitmask
165 * to ensure syntactically correct input for the display controller.
166 * This implies that the curves input parameter might be changed by this
167 * function and that illegal gamma values are auto-corrected and not
168 * reported as errors.
169 *
170 * Return: 0 on success, < 0 if error occurred.
171 */
set_gamma(struct fbtft_par * par,u32 * curves)172 static int set_gamma(struct fbtft_par *par, u32 *curves)
173 {
174 int i;
175 int j;
176 int c; /* curve index offset */
177
178 /*
179 * Bitmasks for gamma curve command parameters.
180 * The masks are the same for both positive and negative voltage
181 * gamma curves.
182 */
183 static const u8 gamma_par_mask[] = {
184 0xFF, /* V63[3:0], V0[3:0]*/
185 0x3F, /* V1[5:0] */
186 0x3F, /* V2[5:0] */
187 0x1F, /* V4[4:0] */
188 0x1F, /* V6[4:0] */
189 0x3F, /* J0[1:0], V13[3:0] */
190 0x7F, /* V20[6:0] */
191 0x77, /* V36[2:0], V27[2:0] */
192 0x7F, /* V43[6:0] */
193 0x3F, /* J1[1:0], V50[3:0] */
194 0x1F, /* V57[4:0] */
195 0x1F, /* V59[4:0] */
196 0x3F, /* V61[5:0] */
197 0x3F, /* V62[5:0] */
198 };
199
200 for (i = 0; i < par->gamma.num_curves; i++) {
201 c = i * par->gamma.num_values;
202 for (j = 0; j < par->gamma.num_values; j++)
203 curves[c + j] &= gamma_par_mask[j];
204 write_reg(par, PVGAMCTRL + i,
205 curves[c + 0], curves[c + 1], curves[c + 2],
206 curves[c + 3], curves[c + 4], curves[c + 5],
207 curves[c + 6], curves[c + 7], curves[c + 8],
208 curves[c + 9], curves[c + 10], curves[c + 11],
209 curves[c + 12], curves[c + 13]);
210 }
211 return 0;
212 }
213
214 /**
215 * blank() - blank the display
216 *
217 * @par: FBTFT parameter object
218 * @on: whether to enable or disable blanking the display
219 *
220 * Return: 0 on success, < 0 if error occurred.
221 */
blank(struct fbtft_par * par,bool on)222 static int blank(struct fbtft_par *par, bool on)
223 {
224 if (on)
225 write_reg(par, MIPI_DCS_SET_DISPLAY_OFF);
226 else
227 write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
228 return 0;
229 }
230
231 static struct fbtft_display display = {
232 .regwidth = 8,
233 .width = 240,
234 .height = 320,
235 .gamma_num = 2,
236 .gamma_len = 14,
237 .gamma = DEFAULT_GAMMA,
238 .fbtftops = {
239 .init_display = init_display,
240 .set_var = set_var,
241 .set_gamma = set_gamma,
242 .blank = blank,
243 },
244 };
245
246 FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7789v", &display);
247
248 MODULE_ALIAS("spi:" DRVNAME);
249 MODULE_ALIAS("platform:" DRVNAME);
250 MODULE_ALIAS("spi:st7789v");
251 MODULE_ALIAS("platform:st7789v");
252
253 MODULE_DESCRIPTION("FB driver for the ST7789V LCD Controller");
254 MODULE_AUTHOR("Dennis Menschel");
255 MODULE_LICENSE("GPL");
256
