1 /*
2  * drivers/rtc/rtc-pcf85363.c
3  *
4  * Driver for NXP PCF85363 real-time clock.
5  *
6  * Copyright (C) 2017 Eric Nelson
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * Based loosely on rtc-8583 by Russell King, Wolfram Sang and Juergen Beisert
13  */
14 #include <linux/module.h>
15 #include <linux/i2c.h>
16 #include <linux/slab.h>
17 #include <linux/rtc.h>
18 #include <linux/init.h>
19 #include <linux/err.h>
20 #include <linux/errno.h>
21 #include <linux/bcd.h>
22 #include <linux/of.h>
23 #include <linux/of_device.h>
24 #include <linux/regmap.h>
25 
26 /*
27  * Date/Time registers
28  */
29 #define DT_100THS	0x00
30 #define DT_SECS		0x01
31 #define DT_MINUTES	0x02
32 #define DT_HOURS	0x03
33 #define DT_DAYS		0x04
34 #define DT_WEEKDAYS	0x05
35 #define DT_MONTHS	0x06
36 #define DT_YEARS	0x07
37 
38 /*
39  * Alarm registers
40  */
41 #define DT_SECOND_ALM1	0x08
42 #define DT_MINUTE_ALM1	0x09
43 #define DT_HOUR_ALM1	0x0a
44 #define DT_DAY_ALM1	0x0b
45 #define DT_MONTH_ALM1	0x0c
46 #define DT_MINUTE_ALM2	0x0d
47 #define DT_HOUR_ALM2	0x0e
48 #define DT_WEEKDAY_ALM2	0x0f
49 #define DT_ALARM_EN	0x10
50 
51 /*
52  * Time stamp registers
53  */
54 #define DT_TIMESTAMP1	0x11
55 #define DT_TIMESTAMP2	0x17
56 #define DT_TIMESTAMP3	0x1d
57 #define DT_TS_MODE	0x23
58 
59 /*
60  * control registers
61  */
62 #define CTRL_OFFSET	0x24
63 #define CTRL_OSCILLATOR	0x25
64 #define CTRL_BATTERY	0x26
65 #define CTRL_PIN_IO	0x27
66 #define CTRL_FUNCTION	0x28
67 #define CTRL_INTA_EN	0x29
68 #define CTRL_INTB_EN	0x2a
69 #define CTRL_FLAGS	0x2b
70 #define CTRL_RAMBYTE	0x2c
71 #define CTRL_WDOG	0x2d
72 #define CTRL_STOP_EN	0x2e
73 #define CTRL_RESETS	0x2f
74 #define CTRL_RAM	0x40
75 
76 #define ALRM_SEC_A1E	BIT(0)
77 #define ALRM_MIN_A1E	BIT(1)
78 #define ALRM_HR_A1E	BIT(2)
79 #define ALRM_DAY_A1E	BIT(3)
80 #define ALRM_MON_A1E	BIT(4)
81 #define ALRM_MIN_A2E	BIT(5)
82 #define ALRM_HR_A2E	BIT(6)
83 #define ALRM_DAY_A2E	BIT(7)
84 
85 #define INT_WDIE	BIT(0)
86 #define INT_BSIE	BIT(1)
87 #define INT_TSRIE	BIT(2)
88 #define INT_A2IE	BIT(3)
89 #define INT_A1IE	BIT(4)
90 #define INT_OIE		BIT(5)
91 #define INT_PIE		BIT(6)
92 #define INT_ILP		BIT(7)
93 
94 #define FLAGS_TSR1F	BIT(0)
95 #define FLAGS_TSR2F	BIT(1)
96 #define FLAGS_TSR3F	BIT(2)
97 #define FLAGS_BSF	BIT(3)
98 #define FLAGS_WDF	BIT(4)
99 #define FLAGS_A1F	BIT(5)
100 #define FLAGS_A2F	BIT(6)
101 #define FLAGS_PIF	BIT(7)
102 
103 #define PIN_IO_INTAPM	GENMASK(1, 0)
104 #define PIN_IO_INTA_CLK	0
105 #define PIN_IO_INTA_BAT	1
106 #define PIN_IO_INTA_OUT	2
107 #define PIN_IO_INTA_HIZ	3
108 
109 #define STOP_EN_STOP	BIT(0)
110 
111 #define RESET_CPR	0xa4
112 
113 #define NVRAM_SIZE	0x40
114 
115 static struct i2c_driver pcf85363_driver;
116 
117 struct pcf85363 {
118 	struct device		*dev;
119 	struct rtc_device	*rtc;
120 	struct regmap		*regmap;
121 };
122 
pcf85363_rtc_read_time(struct device * dev,struct rtc_time * tm)123 static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
124 {
125 	struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
126 	unsigned char buf[DT_YEARS + 1];
127 	int ret, len = sizeof(buf);
128 
129 	/* read the RTC date and time registers all at once */
130 	ret = regmap_bulk_read(pcf85363->regmap, DT_100THS, buf, len);
131 	if (ret) {
132 		dev_err(dev, "%s: error %d\n", __func__, ret);
133 		return ret;
134 	}
135 
136 	tm->tm_year = bcd2bin(buf[DT_YEARS]);
137 	/* adjust for 1900 base of rtc_time */
138 	tm->tm_year += 100;
139 
140 	tm->tm_wday = buf[DT_WEEKDAYS] & 7;
141 	buf[DT_SECS] &= 0x7F;
142 	tm->tm_sec = bcd2bin(buf[DT_SECS]);
143 	buf[DT_MINUTES] &= 0x7F;
144 	tm->tm_min = bcd2bin(buf[DT_MINUTES]);
145 	tm->tm_hour = bcd2bin(buf[DT_HOURS]);
146 	tm->tm_mday = bcd2bin(buf[DT_DAYS]);
147 	tm->tm_mon = bcd2bin(buf[DT_MONTHS]) - 1;
148 
149 	return 0;
150 }
151 
pcf85363_rtc_set_time(struct device * dev,struct rtc_time * tm)152 static int pcf85363_rtc_set_time(struct device *dev, struct rtc_time *tm)
153 {
154 	struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
155 	unsigned char tmp[11];
156 	unsigned char *buf = &tmp[2];
157 	int ret;
158 
159 	tmp[0] = STOP_EN_STOP;
160 	tmp[1] = RESET_CPR;
161 
162 	buf[DT_100THS] = 0;
163 	buf[DT_SECS] = bin2bcd(tm->tm_sec);
164 	buf[DT_MINUTES] = bin2bcd(tm->tm_min);
165 	buf[DT_HOURS] = bin2bcd(tm->tm_hour);
166 	buf[DT_DAYS] = bin2bcd(tm->tm_mday);
167 	buf[DT_WEEKDAYS] = tm->tm_wday;
168 	buf[DT_MONTHS] = bin2bcd(tm->tm_mon + 1);
169 	buf[DT_YEARS] = bin2bcd(tm->tm_year % 100);
170 
171 	ret = regmap_bulk_write(pcf85363->regmap, CTRL_STOP_EN,
172 				tmp, sizeof(tmp));
173 	if (ret)
174 		return ret;
175 
176 	return regmap_write(pcf85363->regmap, CTRL_STOP_EN, 0);
177 }
178 
pcf85363_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)179 static int pcf85363_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
180 {
181 	struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
182 	unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
183 	unsigned int val;
184 	int ret;
185 
186 	ret = regmap_bulk_read(pcf85363->regmap, DT_SECOND_ALM1, buf,
187 			       sizeof(buf));
188 	if (ret)
189 		return ret;
190 
191 	alrm->time.tm_sec = bcd2bin(buf[0]);
192 	alrm->time.tm_min = bcd2bin(buf[1]);
193 	alrm->time.tm_hour = bcd2bin(buf[2]);
194 	alrm->time.tm_mday = bcd2bin(buf[3]);
195 	alrm->time.tm_mon = bcd2bin(buf[4]) - 1;
196 
197 	ret = regmap_read(pcf85363->regmap, CTRL_INTA_EN, &val);
198 	if (ret)
199 		return ret;
200 
201 	alrm->enabled =  !!(val & INT_A1IE);
202 
203 	return 0;
204 }
205 
_pcf85363_rtc_alarm_irq_enable(struct pcf85363 * pcf85363,unsigned int enabled)206 static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned
207 					  int enabled)
208 {
209 	unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
210 				   ALRM_DAY_A1E | ALRM_MON_A1E;
211 	int ret;
212 
213 	ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
214 				 enabled ? alarm_flags : 0);
215 	if (ret)
216 		return ret;
217 
218 	ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
219 				 INT_A1IE, enabled ? INT_A1IE : 0);
220 
221 	if (ret || enabled)
222 		return ret;
223 
224 	/* clear current flags */
225 	return regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
226 }
227 
pcf85363_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)228 static int pcf85363_rtc_alarm_irq_enable(struct device *dev,
229 					 unsigned int enabled)
230 {
231 	struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
232 
233 	return _pcf85363_rtc_alarm_irq_enable(pcf85363, enabled);
234 }
235 
pcf85363_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)236 static int pcf85363_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
237 {
238 	struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
239 	unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
240 	int ret;
241 
242 	buf[0] = bin2bcd(alrm->time.tm_sec);
243 	buf[1] = bin2bcd(alrm->time.tm_min);
244 	buf[2] = bin2bcd(alrm->time.tm_hour);
245 	buf[3] = bin2bcd(alrm->time.tm_mday);
246 	buf[4] = bin2bcd(alrm->time.tm_mon + 1);
247 
248 	/*
249 	 * Disable the alarm interrupt before changing the value to avoid
250 	 * spurious interrupts
251 	 */
252 	ret = _pcf85363_rtc_alarm_irq_enable(pcf85363, 0);
253 	if (ret)
254 		return ret;
255 
256 	ret = regmap_bulk_write(pcf85363->regmap, DT_SECOND_ALM1, buf,
257 				sizeof(buf));
258 	if (ret)
259 		return ret;
260 
261 	return _pcf85363_rtc_alarm_irq_enable(pcf85363, alrm->enabled);
262 }
263 
pcf85363_rtc_handle_irq(int irq,void * dev_id)264 static irqreturn_t pcf85363_rtc_handle_irq(int irq, void *dev_id)
265 {
266 	struct pcf85363 *pcf85363 = i2c_get_clientdata(dev_id);
267 	unsigned int flags;
268 	int err;
269 
270 	err = regmap_read(pcf85363->regmap, CTRL_FLAGS, &flags);
271 	if (err)
272 		return IRQ_NONE;
273 
274 	if (flags & FLAGS_A1F) {
275 		rtc_update_irq(pcf85363->rtc, 1, RTC_IRQF | RTC_AF);
276 		regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
277 		return IRQ_HANDLED;
278 	}
279 
280 	return IRQ_NONE;
281 }
282 
283 static const struct rtc_class_ops rtc_ops = {
284 	.read_time	= pcf85363_rtc_read_time,
285 	.set_time	= pcf85363_rtc_set_time,
286 };
287 
288 static const struct rtc_class_ops rtc_ops_alarm = {
289 	.read_time	= pcf85363_rtc_read_time,
290 	.set_time	= pcf85363_rtc_set_time,
291 	.read_alarm	= pcf85363_rtc_read_alarm,
292 	.set_alarm	= pcf85363_rtc_set_alarm,
293 	.alarm_irq_enable = pcf85363_rtc_alarm_irq_enable,
294 };
295 
pcf85363_nvram_read(void * priv,unsigned int offset,void * val,size_t bytes)296 static int pcf85363_nvram_read(void *priv, unsigned int offset, void *val,
297 			       size_t bytes)
298 {
299 	struct pcf85363 *pcf85363 = priv;
300 
301 	return regmap_bulk_read(pcf85363->regmap, CTRL_RAM + offset,
302 				val, bytes);
303 }
304 
pcf85363_nvram_write(void * priv,unsigned int offset,void * val,size_t bytes)305 static int pcf85363_nvram_write(void *priv, unsigned int offset, void *val,
306 				size_t bytes)
307 {
308 	struct pcf85363 *pcf85363 = priv;
309 
310 	return regmap_bulk_write(pcf85363->regmap, CTRL_RAM + offset,
311 				 val, bytes);
312 }
313 
314 static const struct regmap_config regmap_config = {
315 	.reg_bits = 8,
316 	.val_bits = 8,
317 	.max_register = 0x7f,
318 };
319 
pcf85363_probe(struct i2c_client * client,const struct i2c_device_id * id)320 static int pcf85363_probe(struct i2c_client *client,
321 			  const struct i2c_device_id *id)
322 {
323 	struct pcf85363 *pcf85363;
324 	struct nvmem_config nvmem_cfg = {
325 		.name = "pcf85363-",
326 		.word_size = 1,
327 		.stride = 1,
328 		.size = NVRAM_SIZE,
329 		.reg_read = pcf85363_nvram_read,
330 		.reg_write = pcf85363_nvram_write,
331 	};
332 	int ret;
333 
334 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
335 		return -ENODEV;
336 
337 	pcf85363 = devm_kzalloc(&client->dev, sizeof(struct pcf85363),
338 				GFP_KERNEL);
339 	if (!pcf85363)
340 		return -ENOMEM;
341 
342 	pcf85363->regmap = devm_regmap_init_i2c(client, &regmap_config);
343 	if (IS_ERR(pcf85363->regmap)) {
344 		dev_err(&client->dev, "regmap allocation failed\n");
345 		return PTR_ERR(pcf85363->regmap);
346 	}
347 
348 	pcf85363->dev = &client->dev;
349 	i2c_set_clientdata(client, pcf85363);
350 
351 	pcf85363->rtc = devm_rtc_allocate_device(pcf85363->dev);
352 	if (IS_ERR(pcf85363->rtc))
353 		return PTR_ERR(pcf85363->rtc);
354 
355 	pcf85363->rtc->ops = &rtc_ops;
356 
357 	if (client->irq > 0) {
358 		regmap_write(pcf85363->regmap, CTRL_FLAGS, 0);
359 		regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO,
360 				   PIN_IO_INTA_OUT, PIN_IO_INTAPM);
361 		ret = devm_request_threaded_irq(pcf85363->dev, client->irq,
362 						NULL, pcf85363_rtc_handle_irq,
363 						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
364 						"pcf85363", client);
365 		if (ret)
366 			dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
367 		else
368 			pcf85363->rtc->ops = &rtc_ops_alarm;
369 	}
370 
371 	ret = rtc_register_device(pcf85363->rtc);
372 
373 	nvmem_cfg.priv = pcf85363;
374 	rtc_nvmem_register(pcf85363->rtc, &nvmem_cfg);
375 
376 	return ret;
377 }
378 
379 static const struct of_device_id dev_ids[] = {
380 	{ .compatible = "nxp,pcf85363" },
381 	{}
382 };
383 MODULE_DEVICE_TABLE(of, dev_ids);
384 
385 static struct i2c_driver pcf85363_driver = {
386 	.driver	= {
387 		.name	= "pcf85363",
388 		.of_match_table = of_match_ptr(dev_ids),
389 	},
390 	.probe	= pcf85363_probe,
391 };
392 
393 module_i2c_driver(pcf85363_driver);
394 
395 MODULE_AUTHOR("Eric Nelson");
396 MODULE_DESCRIPTION("pcf85363 I2C RTC driver");
397 MODULE_LICENSE("GPL");
398