1 /*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14 #include <linux/device.h>
15 #include <linux/module.h>
16 #include <linux/of_mdio.h>
17 #include <linux/mdio.h>
18 #include <linux/phy.h>
19 #include <linux/phy/phy.h>
20
21 #define BLK_ADDR_REG_OFFSET 0x1f
22 #define PLL_AFE1_100MHZ_BLK 0x2100
23 #define PLL_CLK_AMP_OFFSET 0x03
24 #define PLL_CLK_AMP_2P05V 0x2b18
25
ns2_pci_phy_init(struct phy * p)26 static int ns2_pci_phy_init(struct phy *p)
27 {
28 struct mdio_device *mdiodev = phy_get_drvdata(p);
29 int rc;
30
31 /* select the AFE 100MHz block page */
32 rc = mdiobus_write(mdiodev->bus, mdiodev->addr,
33 BLK_ADDR_REG_OFFSET, PLL_AFE1_100MHZ_BLK);
34 if (rc)
35 goto err;
36
37 /* set the 100 MHz reference clock amplitude to 2.05 v */
38 rc = mdiobus_write(mdiodev->bus, mdiodev->addr,
39 PLL_CLK_AMP_OFFSET, PLL_CLK_AMP_2P05V);
40 if (rc)
41 goto err;
42
43 return 0;
44
45 err:
46 dev_err(&mdiodev->dev, "Error %d writing to phy\n", rc);
47 return rc;
48 }
49
50 static const struct phy_ops ns2_pci_phy_ops = {
51 .init = ns2_pci_phy_init,
52 .owner = THIS_MODULE,
53 };
54
ns2_pci_phy_probe(struct mdio_device * mdiodev)55 static int ns2_pci_phy_probe(struct mdio_device *mdiodev)
56 {
57 struct device *dev = &mdiodev->dev;
58 struct phy_provider *provider;
59 struct phy *phy;
60
61 phy = devm_phy_create(dev, dev->of_node, &ns2_pci_phy_ops);
62 if (IS_ERR(phy)) {
63 dev_err(dev, "failed to create Phy\n");
64 return PTR_ERR(phy);
65 }
66
67 phy_set_drvdata(phy, mdiodev);
68
69 provider = devm_of_phy_provider_register(&phy->dev,
70 of_phy_simple_xlate);
71 if (IS_ERR(provider)) {
72 dev_err(dev, "failed to register Phy provider\n");
73 return PTR_ERR(provider);
74 }
75
76 dev_info(dev, "%s PHY registered\n", dev_name(dev));
77
78 return 0;
79 }
80
81 static const struct of_device_id ns2_pci_phy_of_match[] = {
82 { .compatible = "brcm,ns2-pcie-phy", },
83 { /* sentinel */ },
84 };
85 MODULE_DEVICE_TABLE(of, ns2_pci_phy_of_match);
86
87 static struct mdio_driver ns2_pci_phy_driver = {
88 .mdiodrv = {
89 .driver = {
90 .name = "phy-bcm-ns2-pci",
91 .of_match_table = ns2_pci_phy_of_match,
92 },
93 },
94 .probe = ns2_pci_phy_probe,
95 };
96 mdio_module_driver(ns2_pci_phy_driver);
97
98 MODULE_AUTHOR("Broadcom");
99 MODULE_DESCRIPTION("Broadcom Northstar2 PCI Phy driver");
100 MODULE_LICENSE("GPL v2");
101 MODULE_ALIAS("platform:phy-bcm-ns2-pci");
102
