1 /*
2 * USB 10M/100M ethernet adapter
3 *
4 * This file is licensed under the terms of the GNU General Public License
5 * version 2. This program is licensed "as is" without any warranty of any
6 * kind, whether express or implied
7 *
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/sched.h>
13 #include <linux/stddef.h>
14 #include <linux/init.h>
15 #include <linux/netdevice.h>
16 #include <linux/etherdevice.h>
17 #include <linux/ethtool.h>
18 #include <linux/mii.h>
19 #include <linux/usb.h>
20 #include <linux/crc32.h>
21 #include <linux/usb/usbnet.h>
22 #include <linux/slab.h>
23
24 #define CH9200_VID 0x1A86
25 #define CH9200_PID_E092 0xE092
26
27 #define CTRL_TIMEOUT_MS 1000
28
29 #define CONTROL_TIMEOUT_MS 1000
30
31 #define REQUEST_READ 0x0E
32 #define REQUEST_WRITE 0x0F
33
34 /* Address space:
35 * 00-63 : MII
36 * 64-128: MAC
37 *
38 * Note: all accesses must be 16-bit
39 */
40
41 #define MAC_REG_CTRL 64
42 #define MAC_REG_STATUS 66
43 #define MAC_REG_INTERRUPT_MASK 68
44 #define MAC_REG_PHY_COMMAND 70
45 #define MAC_REG_PHY_DATA 72
46 #define MAC_REG_STATION_L 74
47 #define MAC_REG_STATION_M 76
48 #define MAC_REG_STATION_H 78
49 #define MAC_REG_HASH_L 80
50 #define MAC_REG_HASH_M1 82
51 #define MAC_REG_HASH_M2 84
52 #define MAC_REG_HASH_H 86
53 #define MAC_REG_THRESHOLD 88
54 #define MAC_REG_FIFO_DEPTH 90
55 #define MAC_REG_PAUSE 92
56 #define MAC_REG_FLOW_CONTROL 94
57
58 /* Control register bits
59 *
60 * Note: bits 13 and 15 are reserved
61 */
62 #define LOOPBACK (0x01 << 14)
63 #define BASE100X (0x01 << 12)
64 #define MBPS_10 (0x01 << 11)
65 #define DUPLEX_MODE (0x01 << 10)
66 #define PAUSE_FRAME (0x01 << 9)
67 #define PROMISCUOUS (0x01 << 8)
68 #define MULTICAST (0x01 << 7)
69 #define BROADCAST (0x01 << 6)
70 #define HASH (0x01 << 5)
71 #define APPEND_PAD (0x01 << 4)
72 #define APPEND_CRC (0x01 << 3)
73 #define TRANSMITTER_ACTION (0x01 << 2)
74 #define RECEIVER_ACTION (0x01 << 1)
75 #define DMA_ACTION (0x01 << 0)
76
77 /* Status register bits
78 *
79 * Note: bits 7-15 are reserved
80 */
81 #define ALIGNMENT (0x01 << 6)
82 #define FIFO_OVER_RUN (0x01 << 5)
83 #define FIFO_UNDER_RUN (0x01 << 4)
84 #define RX_ERROR (0x01 << 3)
85 #define RX_COMPLETE (0x01 << 2)
86 #define TX_ERROR (0x01 << 1)
87 #define TX_COMPLETE (0x01 << 0)
88
89 /* FIFO depth register bits
90 *
91 * Note: bits 6 and 14 are reserved
92 */
93
94 #define ETH_TXBD (0x01 << 15)
95 #define ETN_TX_FIFO_DEPTH (0x01 << 8)
96 #define ETH_RXBD (0x01 << 7)
97 #define ETH_RX_FIFO_DEPTH (0x01 << 0)
98
control_read(struct usbnet * dev,unsigned char request,unsigned short value,unsigned short index,void * data,unsigned short size,int timeout)99 static int control_read(struct usbnet *dev,
100 unsigned char request, unsigned short value,
101 unsigned short index, void *data, unsigned short size,
102 int timeout)
103 {
104 unsigned char *buf = NULL;
105 unsigned char request_type;
106 int err = 0;
107
108 if (request == REQUEST_READ)
109 request_type = (USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_OTHER);
110 else
111 request_type = (USB_DIR_IN | USB_TYPE_VENDOR |
112 USB_RECIP_DEVICE);
113
114 netdev_dbg(dev->net, "Control_read() index=0x%02x size=%d\n",
115 index, size);
116
117 buf = kmalloc(size, GFP_KERNEL);
118 if (!buf) {
119 err = -ENOMEM;
120 goto err_out;
121 }
122
123 err = usb_control_msg(dev->udev,
124 usb_rcvctrlpipe(dev->udev, 0),
125 request, request_type, value, index, buf, size,
126 timeout);
127 if (err == size)
128 memcpy(data, buf, size);
129 else if (err >= 0)
130 err = -EINVAL;
131 kfree(buf);
132
133 return err;
134
135 err_out:
136 return err;
137 }
138
control_write(struct usbnet * dev,unsigned char request,unsigned short value,unsigned short index,void * data,unsigned short size,int timeout)139 static int control_write(struct usbnet *dev, unsigned char request,
140 unsigned short value, unsigned short index,
141 void *data, unsigned short size, int timeout)
142 {
143 unsigned char *buf = NULL;
144 unsigned char request_type;
145 int err = 0;
146
147 if (request == REQUEST_WRITE)
148 request_type = (USB_DIR_OUT | USB_TYPE_VENDOR |
149 USB_RECIP_OTHER);
150 else
151 request_type = (USB_DIR_OUT | USB_TYPE_VENDOR |
152 USB_RECIP_DEVICE);
153
154 netdev_dbg(dev->net, "Control_write() index=0x%02x size=%d\n",
155 index, size);
156
157 if (data) {
158 buf = kmemdup(data, size, GFP_KERNEL);
159 if (!buf) {
160 err = -ENOMEM;
161 goto err_out;
162 }
163 }
164
165 err = usb_control_msg(dev->udev,
166 usb_sndctrlpipe(dev->udev, 0),
167 request, request_type, value, index, buf, size,
168 timeout);
169 if (err >= 0 && err < size)
170 err = -EINVAL;
171 kfree(buf);
172
173 return 0;
174
175 err_out:
176 return err;
177 }
178
ch9200_mdio_read(struct net_device * netdev,int phy_id,int loc)179 static int ch9200_mdio_read(struct net_device *netdev, int phy_id, int loc)
180 {
181 struct usbnet *dev = netdev_priv(netdev);
182 unsigned char buff[2];
183
184 netdev_dbg(netdev, "ch9200_mdio_read phy_id:%02x loc:%02x\n",
185 phy_id, loc);
186
187 if (phy_id != 0)
188 return -ENODEV;
189
190 control_read(dev, REQUEST_READ, 0, loc * 2, buff, 0x02,
191 CONTROL_TIMEOUT_MS);
192
193 return (buff[0] | buff[1] << 8);
194 }
195
ch9200_mdio_write(struct net_device * netdev,int phy_id,int loc,int val)196 static void ch9200_mdio_write(struct net_device *netdev,
197 int phy_id, int loc, int val)
198 {
199 struct usbnet *dev = netdev_priv(netdev);
200 unsigned char buff[2];
201
202 netdev_dbg(netdev, "ch9200_mdio_write() phy_id=%02x loc:%02x\n",
203 phy_id, loc);
204
205 if (phy_id != 0)
206 return;
207
208 buff[0] = (unsigned char)val;
209 buff[1] = (unsigned char)(val >> 8);
210
211 control_write(dev, REQUEST_WRITE, 0, loc * 2, buff, 0x02,
212 CONTROL_TIMEOUT_MS);
213 }
214
ch9200_link_reset(struct usbnet * dev)215 static int ch9200_link_reset(struct usbnet *dev)
216 {
217 struct ethtool_cmd ecmd;
218
219 mii_check_media(&dev->mii, 1, 1);
220 mii_ethtool_gset(&dev->mii, &ecmd);
221
222 netdev_dbg(dev->net, "link_reset() speed:%d duplex:%d\n",
223 ecmd.speed, ecmd.duplex);
224
225 return 0;
226 }
227
ch9200_status(struct usbnet * dev,struct urb * urb)228 static void ch9200_status(struct usbnet *dev, struct urb *urb)
229 {
230 int link;
231 unsigned char *buf;
232
233 if (urb->actual_length < 16)
234 return;
235
236 buf = urb->transfer_buffer;
237 link = !!(buf[0] & 0x01);
238
239 if (link) {
240 netif_carrier_on(dev->net);
241 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
242 } else {
243 netif_carrier_off(dev->net);
244 }
245 }
246
ch9200_tx_fixup(struct usbnet * dev,struct sk_buff * skb,gfp_t flags)247 static struct sk_buff *ch9200_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
248 gfp_t flags)
249 {
250 int i = 0;
251 int len = 0;
252 int tx_overhead = 0;
253
254 tx_overhead = 0x40;
255
256 len = skb->len;
257 if (skb_cow_head(skb, tx_overhead)) {
258 dev_kfree_skb_any(skb);
259 return NULL;
260 }
261
262 __skb_push(skb, tx_overhead);
263 /* usbnet adds padding if length is a multiple of packet size
264 * if so, adjust length value in header
265 */
266 if ((skb->len % dev->maxpacket) == 0)
267 len++;
268
269 skb->data[0] = len;
270 skb->data[1] = len >> 8;
271 skb->data[2] = 0x00;
272 skb->data[3] = 0x80;
273
274 for (i = 4; i < 48; i++)
275 skb->data[i] = 0x00;
276
277 skb->data[48] = len;
278 skb->data[49] = len >> 8;
279 skb->data[50] = 0x00;
280 skb->data[51] = 0x80;
281
282 for (i = 52; i < 64; i++)
283 skb->data[i] = 0x00;
284
285 return skb;
286 }
287
ch9200_rx_fixup(struct usbnet * dev,struct sk_buff * skb)288 static int ch9200_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
289 {
290 int len = 0;
291 int rx_overhead = 0;
292
293 rx_overhead = 64;
294
295 if (unlikely(skb->len < rx_overhead)) {
296 dev_err(&dev->udev->dev, "unexpected tiny rx frame\n");
297 return 0;
298 }
299
300 len = (skb->data[skb->len - 16] | skb->data[skb->len - 15] << 8);
301 skb_trim(skb, len);
302
303 return 1;
304 }
305
get_mac_address(struct usbnet * dev,unsigned char * data)306 static int get_mac_address(struct usbnet *dev, unsigned char *data)
307 {
308 int err = 0;
309 unsigned char mac_addr[0x06];
310 int rd_mac_len = 0;
311
312 netdev_dbg(dev->net, "get_mac_address:\n\tusbnet VID:%0x PID:%0x\n",
313 le16_to_cpu(dev->udev->descriptor.idVendor),
314 le16_to_cpu(dev->udev->descriptor.idProduct));
315
316 memset(mac_addr, 0, sizeof(mac_addr));
317 rd_mac_len = control_read(dev, REQUEST_READ, 0,
318 MAC_REG_STATION_L, mac_addr, 0x02,
319 CONTROL_TIMEOUT_MS);
320 rd_mac_len += control_read(dev, REQUEST_READ, 0, MAC_REG_STATION_M,
321 mac_addr + 2, 0x02, CONTROL_TIMEOUT_MS);
322 rd_mac_len += control_read(dev, REQUEST_READ, 0, MAC_REG_STATION_H,
323 mac_addr + 4, 0x02, CONTROL_TIMEOUT_MS);
324 if (rd_mac_len != ETH_ALEN)
325 err = -EINVAL;
326
327 data[0] = mac_addr[5];
328 data[1] = mac_addr[4];
329 data[2] = mac_addr[3];
330 data[3] = mac_addr[2];
331 data[4] = mac_addr[1];
332 data[5] = mac_addr[0];
333
334 return err;
335 }
336
ch9200_bind(struct usbnet * dev,struct usb_interface * intf)337 static int ch9200_bind(struct usbnet *dev, struct usb_interface *intf)
338 {
339 int retval = 0;
340 unsigned char data[2];
341
342 retval = usbnet_get_endpoints(dev, intf);
343 if (retval)
344 return retval;
345
346 dev->mii.dev = dev->net;
347 dev->mii.mdio_read = ch9200_mdio_read;
348 dev->mii.mdio_write = ch9200_mdio_write;
349 dev->mii.reg_num_mask = 0x1f;
350
351 dev->mii.phy_id_mask = 0x1f;
352
353 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
354 dev->rx_urb_size = 24 * 64 + 16;
355 mii_nway_restart(&dev->mii);
356
357 data[0] = 0x01;
358 data[1] = 0x0F;
359 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_THRESHOLD, data,
360 0x02, CONTROL_TIMEOUT_MS);
361
362 data[0] = 0xA0;
363 data[1] = 0x90;
364 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_FIFO_DEPTH, data,
365 0x02, CONTROL_TIMEOUT_MS);
366
367 data[0] = 0x30;
368 data[1] = 0x00;
369 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_PAUSE, data,
370 0x02, CONTROL_TIMEOUT_MS);
371
372 data[0] = 0x17;
373 data[1] = 0xD8;
374 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_FLOW_CONTROL,
375 data, 0x02, CONTROL_TIMEOUT_MS);
376
377 /* Undocumented register */
378 data[0] = 0x01;
379 data[1] = 0x00;
380 retval = control_write(dev, REQUEST_WRITE, 0, 254, data, 0x02,
381 CONTROL_TIMEOUT_MS);
382
383 data[0] = 0x5F;
384 data[1] = 0x0D;
385 retval = control_write(dev, REQUEST_WRITE, 0, MAC_REG_CTRL, data, 0x02,
386 CONTROL_TIMEOUT_MS);
387
388 retval = get_mac_address(dev, dev->net->dev_addr);
389
390 return retval;
391 }
392
393 static const struct driver_info ch9200_info = {
394 .description = "CH9200 USB to Network Adaptor",
395 .flags = FLAG_ETHER,
396 .bind = ch9200_bind,
397 .rx_fixup = ch9200_rx_fixup,
398 .tx_fixup = ch9200_tx_fixup,
399 .status = ch9200_status,
400 .link_reset = ch9200_link_reset,
401 .reset = ch9200_link_reset,
402 };
403
404 static const struct usb_device_id ch9200_products[] = {
405 {
406 USB_DEVICE(0x1A86, 0xE092),
407 .driver_info = (unsigned long)&ch9200_info,
408 },
409 {},
410 };
411
412 MODULE_DEVICE_TABLE(usb, ch9200_products);
413
414 static struct usb_driver ch9200_driver = {
415 .name = "ch9200",
416 .id_table = ch9200_products,
417 .probe = usbnet_probe,
418 .disconnect = usbnet_disconnect,
419 .suspend = usbnet_suspend,
420 .resume = usbnet_resume,
421 };
422
423 module_usb_driver(ch9200_driver);
424
425 MODULE_DESCRIPTION("QinHeng CH9200 USB Network device");
426 MODULE_LICENSE("GPL");
427
