1 /*
2 * Copyright (c) 2018 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34 #ifndef __MLX5_ACCEL_TLS_H__
35 #define __MLX5_ACCEL_TLS_H__
36
37 #include <linux/mlx5/driver.h>
38 #include <linux/tls.h>
39
40 #ifdef CONFIG_MLX5_ACCEL
41
42 enum {
43 MLX5_ACCEL_TLS_TX = BIT(0),
44 MLX5_ACCEL_TLS_RX = BIT(1),
45 MLX5_ACCEL_TLS_V12 = BIT(2),
46 MLX5_ACCEL_TLS_V13 = BIT(3),
47 MLX5_ACCEL_TLS_LRO = BIT(4),
48 MLX5_ACCEL_TLS_IPV6 = BIT(5),
49 MLX5_ACCEL_TLS_AES_GCM128 = BIT(30),
50 MLX5_ACCEL_TLS_AES_GCM256 = BIT(31),
51 };
52
53 struct mlx5_ifc_tls_flow_bits {
54 u8 src_port[0x10];
55 u8 dst_port[0x10];
56 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
57 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
58 u8 ipv6[0x1];
59 u8 direction_sx[0x1];
60 u8 reserved_at_2[0x1e];
61 };
62
63 int mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow,
64 struct tls_crypto_info *crypto_info,
65 u32 start_offload_tcp_sn, u32 *p_swid,
66 bool direction_sx);
67 void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
68 bool direction_sx);
69 int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle, u32 seq,
70 u64 rcd_sn);
71 bool mlx5_accel_is_tls_device(struct mlx5_core_dev *mdev);
72 u32 mlx5_accel_tls_device_caps(struct mlx5_core_dev *mdev);
73 int mlx5_accel_tls_init(struct mlx5_core_dev *mdev);
74 void mlx5_accel_tls_cleanup(struct mlx5_core_dev *mdev);
75
76 #else
77
78 static inline int
mlx5_accel_tls_add_flow(struct mlx5_core_dev * mdev,void * flow,struct tls_crypto_info * crypto_info,u32 start_offload_tcp_sn,u32 * p_swid,bool direction_sx)79 mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow,
80 struct tls_crypto_info *crypto_info,
81 u32 start_offload_tcp_sn, u32 *p_swid,
82 bool direction_sx) { return -ENOTSUPP; }
mlx5_accel_tls_del_flow(struct mlx5_core_dev * mdev,u32 swid,bool direction_sx)83 static inline void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
84 bool direction_sx) { }
mlx5_accel_tls_resync_rx(struct mlx5_core_dev * mdev,u32 handle,u32 seq,u64 rcd_sn)85 static inline int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle,
86 u32 seq, u64 rcd_sn) { return 0; }
mlx5_accel_is_tls_device(struct mlx5_core_dev * mdev)87 static inline bool mlx5_accel_is_tls_device(struct mlx5_core_dev *mdev) { return false; }
mlx5_accel_tls_device_caps(struct mlx5_core_dev * mdev)88 static inline u32 mlx5_accel_tls_device_caps(struct mlx5_core_dev *mdev) { return 0; }
mlx5_accel_tls_init(struct mlx5_core_dev * mdev)89 static inline int mlx5_accel_tls_init(struct mlx5_core_dev *mdev) { return 0; }
mlx5_accel_tls_cleanup(struct mlx5_core_dev * mdev)90 static inline void mlx5_accel_tls_cleanup(struct mlx5_core_dev *mdev) { }
91
92 #endif
93
94 #endif /* __MLX5_ACCEL_TLS_H__ */
95
