1 /*
2  * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33 
34 #include <linux/mlx5/device.h>
35 
36 #include "accel/ipsec.h"
37 #include "mlx5_core.h"
38 #include "fpga/ipsec.h"
39 
mlx5_accel_ipsec_device_caps(struct mlx5_core_dev * mdev)40 u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev)
41 {
42 	return mlx5_fpga_ipsec_device_caps(mdev);
43 }
44 EXPORT_SYMBOL_GPL(mlx5_accel_ipsec_device_caps);
45 
mlx5_accel_ipsec_counters_count(struct mlx5_core_dev * mdev)46 unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev)
47 {
48 	return mlx5_fpga_ipsec_counters_count(mdev);
49 }
50 
mlx5_accel_ipsec_counters_read(struct mlx5_core_dev * mdev,u64 * counters,unsigned int count)51 int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
52 				   unsigned int count)
53 {
54 	return mlx5_fpga_ipsec_counters_read(mdev, counters, count);
55 }
56 
mlx5_accel_esp_create_hw_context(struct mlx5_core_dev * mdev,struct mlx5_accel_esp_xfrm * xfrm,const __be32 saddr[4],const __be32 daddr[4],const __be32 spi,bool is_ipv6)57 void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
58 				       struct mlx5_accel_esp_xfrm *xfrm,
59 				       const __be32 saddr[4],
60 				       const __be32 daddr[4],
61 				       const __be32 spi, bool is_ipv6)
62 {
63 	return mlx5_fpga_ipsec_create_sa_ctx(mdev, xfrm, saddr, daddr,
64 					     spi, is_ipv6);
65 }
66 
mlx5_accel_esp_free_hw_context(void * context)67 void mlx5_accel_esp_free_hw_context(void *context)
68 {
69 	mlx5_fpga_ipsec_delete_sa_ctx(context);
70 }
71 
mlx5_accel_ipsec_init(struct mlx5_core_dev * mdev)72 int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
73 {
74 	return mlx5_fpga_ipsec_init(mdev);
75 }
76 
mlx5_accel_ipsec_cleanup(struct mlx5_core_dev * mdev)77 void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev)
78 {
79 	mlx5_fpga_ipsec_cleanup(mdev);
80 }
81 
82 struct mlx5_accel_esp_xfrm *
mlx5_accel_esp_create_xfrm(struct mlx5_core_dev * mdev,const struct mlx5_accel_esp_xfrm_attrs * attrs,u32 flags)83 mlx5_accel_esp_create_xfrm(struct mlx5_core_dev *mdev,
84 			   const struct mlx5_accel_esp_xfrm_attrs *attrs,
85 			   u32 flags)
86 {
87 	struct mlx5_accel_esp_xfrm *xfrm;
88 
89 	xfrm = mlx5_fpga_esp_create_xfrm(mdev, attrs, flags);
90 	if (IS_ERR(xfrm))
91 		return xfrm;
92 
93 	xfrm->mdev = mdev;
94 	return xfrm;
95 }
96 EXPORT_SYMBOL_GPL(mlx5_accel_esp_create_xfrm);
97 
mlx5_accel_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm * xfrm)98 void mlx5_accel_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm)
99 {
100 	mlx5_fpga_esp_destroy_xfrm(xfrm);
101 }
102 EXPORT_SYMBOL_GPL(mlx5_accel_esp_destroy_xfrm);
103 
mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm * xfrm,const struct mlx5_accel_esp_xfrm_attrs * attrs)104 int mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
105 			       const struct mlx5_accel_esp_xfrm_attrs *attrs)
106 {
107 	return mlx5_fpga_esp_modify_xfrm(xfrm, attrs);
108 }
109 EXPORT_SYMBOL_GPL(mlx5_accel_esp_modify_xfrm);
110