1 /**
2 *
3 * GSPCA sub driver for W996[78]CF JPEG USB Dual Mode Camera Chip.
4 *
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the in kernel v4l1 w9968cf driver:
8 *
9 * Copyright (C) 2002-2004 by Luca Risolia <luca.risolia@studio.unibo.it>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 */
22
23 /* Note this is not a stand alone driver, it gets included in ov519.c, this
24 is a bit of a hack, but it needs the driver code for a lot of different
25 ov sensors which is already present in ov519.c (the old v4l1 driver used
26 the ovchipcam framework). When we have the time we really should move
27 the sensor drivers to v4l2 sub drivers, and properly split of this
28 driver from ov519.c */
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #define W9968CF_I2C_BUS_DELAY 4 /* delay in us for I2C bit r/w operations */
33
34 #define Y_QUANTABLE (&sd->jpeg_hdr[JPEG_QT0_OFFSET])
35 #define UV_QUANTABLE (&sd->jpeg_hdr[JPEG_QT1_OFFSET])
36
37 static const struct v4l2_pix_format w9968cf_vga_mode[] = {
38 {160, 120, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
39 .bytesperline = 160 * 2,
40 .sizeimage = 160 * 120 * 2,
41 .colorspace = V4L2_COLORSPACE_JPEG},
42 {176, 144, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
43 .bytesperline = 176 * 2,
44 .sizeimage = 176 * 144 * 2,
45 .colorspace = V4L2_COLORSPACE_JPEG},
46 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
47 .bytesperline = 320 * 2,
48 .sizeimage = 320 * 240 * 2,
49 .colorspace = V4L2_COLORSPACE_JPEG},
50 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
51 .bytesperline = 352 * 2,
52 .sizeimage = 352 * 288 * 2,
53 .colorspace = V4L2_COLORSPACE_JPEG},
54 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
55 .bytesperline = 640 * 2,
56 .sizeimage = 640 * 480 * 2,
57 .colorspace = V4L2_COLORSPACE_JPEG},
58 };
59
60 static void reg_w(struct sd *sd, u16 index, u16 value);
61
62 /*--------------------------------------------------------------------------
63 Write 64-bit data to the fast serial bus registers.
64 Return 0 on success, -1 otherwise.
65 --------------------------------------------------------------------------*/
w9968cf_write_fsb(struct sd * sd,u16 * data)66 static void w9968cf_write_fsb(struct sd *sd, u16* data)
67 {
68 struct usb_device *udev = sd->gspca_dev.dev;
69 u16 value;
70 int ret;
71
72 if (sd->gspca_dev.usb_err < 0)
73 return;
74
75 value = *data++;
76 memcpy(sd->gspca_dev.usb_buf, data, 6);
77
78 /* Avoid things going to fast for the bridge with a xhci host */
79 udelay(150);
80 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0,
81 USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE,
82 value, 0x06, sd->gspca_dev.usb_buf, 6, 500);
83 if (ret < 0) {
84 pr_err("Write FSB registers failed (%d)\n", ret);
85 sd->gspca_dev.usb_err = ret;
86 }
87 }
88
89 /*--------------------------------------------------------------------------
90 Write data to the serial bus control register.
91 Return 0 on success, a negative number otherwise.
92 --------------------------------------------------------------------------*/
w9968cf_write_sb(struct sd * sd,u16 value)93 static void w9968cf_write_sb(struct sd *sd, u16 value)
94 {
95 int ret;
96
97 if (sd->gspca_dev.usb_err < 0)
98 return;
99
100 /* Avoid things going to fast for the bridge with a xhci host */
101 udelay(150);
102
103 /* We don't use reg_w here, as that would cause all writes when
104 bitbanging i2c to be logged, making the logs impossible to read */
105 ret = usb_control_msg(sd->gspca_dev.dev,
106 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
107 0,
108 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
109 value, 0x01, NULL, 0, 500);
110
111 udelay(W9968CF_I2C_BUS_DELAY);
112
113 if (ret < 0) {
114 pr_err("Write SB reg [01] %04x failed\n", value);
115 sd->gspca_dev.usb_err = ret;
116 }
117 }
118
119 /*--------------------------------------------------------------------------
120 Read data from the serial bus control register.
121 Return 0 on success, a negative number otherwise.
122 --------------------------------------------------------------------------*/
w9968cf_read_sb(struct sd * sd)123 static int w9968cf_read_sb(struct sd *sd)
124 {
125 int ret;
126
127 if (sd->gspca_dev.usb_err < 0)
128 return -1;
129
130 /* Avoid things going to fast for the bridge with a xhci host */
131 udelay(150);
132
133 /* We don't use reg_r here, as the w9968cf is special and has 16
134 bit registers instead of 8 bit */
135 ret = usb_control_msg(sd->gspca_dev.dev,
136 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
137 1,
138 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
139 0, 0x01, sd->gspca_dev.usb_buf, 2, 500);
140 if (ret >= 0) {
141 ret = sd->gspca_dev.usb_buf[0] |
142 (sd->gspca_dev.usb_buf[1] << 8);
143 } else {
144 pr_err("Read SB reg [01] failed\n");
145 sd->gspca_dev.usb_err = ret;
146 }
147
148 udelay(W9968CF_I2C_BUS_DELAY);
149
150 return ret;
151 }
152
153 /*--------------------------------------------------------------------------
154 Upload quantization tables for the JPEG compression.
155 This function is called by w9968cf_start_transfer().
156 Return 0 on success, a negative number otherwise.
157 --------------------------------------------------------------------------*/
w9968cf_upload_quantizationtables(struct sd * sd)158 static void w9968cf_upload_quantizationtables(struct sd *sd)
159 {
160 u16 a, b;
161 int i, j;
162
163 reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */
164
165 for (i = 0, j = 0; i < 32; i++, j += 2) {
166 a = Y_QUANTABLE[j] | ((unsigned)(Y_QUANTABLE[j + 1]) << 8);
167 b = UV_QUANTABLE[j] | ((unsigned)(UV_QUANTABLE[j + 1]) << 8);
168 reg_w(sd, 0x40 + i, a);
169 reg_w(sd, 0x60 + i, b);
170 }
171 reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */
172 }
173
174 /****************************************************************************
175 * Low-level I2C I/O functions. *
176 * The adapter supports the following I2C transfer functions: *
177 * i2c_adap_fastwrite_byte_data() (at 400 kHz bit frequency only) *
178 * i2c_adap_read_byte_data() *
179 * i2c_adap_read_byte() *
180 ****************************************************************************/
181
w9968cf_smbus_start(struct sd * sd)182 static void w9968cf_smbus_start(struct sd *sd)
183 {
184 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
185 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
186 }
187
w9968cf_smbus_stop(struct sd * sd)188 static void w9968cf_smbus_stop(struct sd *sd)
189 {
190 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
191 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
192 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
193 }
194
w9968cf_smbus_write_byte(struct sd * sd,u8 v)195 static void w9968cf_smbus_write_byte(struct sd *sd, u8 v)
196 {
197 u8 bit;
198 int sda;
199
200 for (bit = 0 ; bit < 8 ; bit++) {
201 sda = (v & 0x80) ? 2 : 0;
202 v <<= 1;
203 /* SDE=1, SDA=sda, SCL=0 */
204 w9968cf_write_sb(sd, 0x10 | sda);
205 /* SDE=1, SDA=sda, SCL=1 */
206 w9968cf_write_sb(sd, 0x11 | sda);
207 /* SDE=1, SDA=sda, SCL=0 */
208 w9968cf_write_sb(sd, 0x10 | sda);
209 }
210 }
211
w9968cf_smbus_read_byte(struct sd * sd,u8 * v)212 static void w9968cf_smbus_read_byte(struct sd *sd, u8 *v)
213 {
214 u8 bit;
215
216 /* No need to ensure SDA is high as we are always called after
217 read_ack which ends with SDA high */
218 *v = 0;
219 for (bit = 0 ; bit < 8 ; bit++) {
220 *v <<= 1;
221 /* SDE=1, SDA=1, SCL=1 */
222 w9968cf_write_sb(sd, 0x0013);
223 *v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0;
224 /* SDE=1, SDA=1, SCL=0 */
225 w9968cf_write_sb(sd, 0x0012);
226 }
227 }
228
w9968cf_smbus_write_nack(struct sd * sd)229 static void w9968cf_smbus_write_nack(struct sd *sd)
230 {
231 /* No need to ensure SDA is high as we are always called after
232 read_byte which ends with SDA high */
233 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
234 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
235 }
236
w9968cf_smbus_read_ack(struct sd * sd)237 static void w9968cf_smbus_read_ack(struct sd *sd)
238 {
239 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
240 int sda;
241
242 /* Ensure SDA is high before raising clock to avoid a spurious stop */
243 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
244 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
245 sda = w9968cf_read_sb(sd);
246 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
247 if (sda >= 0 && (sda & 0x08)) {
248 gspca_dbg(gspca_dev, D_USBI, "Did not receive i2c ACK\n");
249 sd->gspca_dev.usb_err = -EIO;
250 }
251 }
252
253 /* SMBus protocol: S Addr Wr [A] Subaddr [A] Value [A] P */
w9968cf_i2c_w(struct sd * sd,u8 reg,u8 value)254 static void w9968cf_i2c_w(struct sd *sd, u8 reg, u8 value)
255 {
256 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
257 u16* data = (u16 *)sd->gspca_dev.usb_buf;
258
259 data[0] = 0x082f | ((sd->sensor_addr & 0x80) ? 0x1500 : 0x0);
260 data[0] |= (sd->sensor_addr & 0x40) ? 0x4000 : 0x0;
261 data[1] = 0x2082 | ((sd->sensor_addr & 0x40) ? 0x0005 : 0x0);
262 data[1] |= (sd->sensor_addr & 0x20) ? 0x0150 : 0x0;
263 data[1] |= (sd->sensor_addr & 0x10) ? 0x5400 : 0x0;
264 data[2] = 0x8208 | ((sd->sensor_addr & 0x08) ? 0x0015 : 0x0);
265 data[2] |= (sd->sensor_addr & 0x04) ? 0x0540 : 0x0;
266 data[2] |= (sd->sensor_addr & 0x02) ? 0x5000 : 0x0;
267 data[3] = 0x1d20 | ((sd->sensor_addr & 0x02) ? 0x0001 : 0x0);
268 data[3] |= (sd->sensor_addr & 0x01) ? 0x0054 : 0x0;
269
270 w9968cf_write_fsb(sd, data);
271
272 data[0] = 0x8208 | ((reg & 0x80) ? 0x0015 : 0x0);
273 data[0] |= (reg & 0x40) ? 0x0540 : 0x0;
274 data[0] |= (reg & 0x20) ? 0x5000 : 0x0;
275 data[1] = 0x0820 | ((reg & 0x20) ? 0x0001 : 0x0);
276 data[1] |= (reg & 0x10) ? 0x0054 : 0x0;
277 data[1] |= (reg & 0x08) ? 0x1500 : 0x0;
278 data[1] |= (reg & 0x04) ? 0x4000 : 0x0;
279 data[2] = 0x2082 | ((reg & 0x04) ? 0x0005 : 0x0);
280 data[2] |= (reg & 0x02) ? 0x0150 : 0x0;
281 data[2] |= (reg & 0x01) ? 0x5400 : 0x0;
282 data[3] = 0x001d;
283
284 w9968cf_write_fsb(sd, data);
285
286 data[0] = 0x8208 | ((value & 0x80) ? 0x0015 : 0x0);
287 data[0] |= (value & 0x40) ? 0x0540 : 0x0;
288 data[0] |= (value & 0x20) ? 0x5000 : 0x0;
289 data[1] = 0x0820 | ((value & 0x20) ? 0x0001 : 0x0);
290 data[1] |= (value & 0x10) ? 0x0054 : 0x0;
291 data[1] |= (value & 0x08) ? 0x1500 : 0x0;
292 data[1] |= (value & 0x04) ? 0x4000 : 0x0;
293 data[2] = 0x2082 | ((value & 0x04) ? 0x0005 : 0x0);
294 data[2] |= (value & 0x02) ? 0x0150 : 0x0;
295 data[2] |= (value & 0x01) ? 0x5400 : 0x0;
296 data[3] = 0xfe1d;
297
298 w9968cf_write_fsb(sd, data);
299
300 gspca_dbg(gspca_dev, D_USBO, "i2c 0x%02x -> [0x%02x]\n", value, reg);
301 }
302
303 /* SMBus protocol: S Addr Wr [A] Subaddr [A] P S Addr+1 Rd [A] [Value] NA P */
w9968cf_i2c_r(struct sd * sd,u8 reg)304 static int w9968cf_i2c_r(struct sd *sd, u8 reg)
305 {
306 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
307 int ret = 0;
308 u8 value;
309
310 /* Fast serial bus data control disable */
311 w9968cf_write_sb(sd, 0x0013); /* don't change ! */
312
313 w9968cf_smbus_start(sd);
314 w9968cf_smbus_write_byte(sd, sd->sensor_addr);
315 w9968cf_smbus_read_ack(sd);
316 w9968cf_smbus_write_byte(sd, reg);
317 w9968cf_smbus_read_ack(sd);
318 w9968cf_smbus_stop(sd);
319 w9968cf_smbus_start(sd);
320 w9968cf_smbus_write_byte(sd, sd->sensor_addr + 1);
321 w9968cf_smbus_read_ack(sd);
322 w9968cf_smbus_read_byte(sd, &value);
323 /* signal we don't want to read anymore, the v4l1 driver used to
324 send an ack here which is very wrong! (and then fixed
325 the issues this gave by retrying reads) */
326 w9968cf_smbus_write_nack(sd);
327 w9968cf_smbus_stop(sd);
328
329 /* Fast serial bus data control re-enable */
330 w9968cf_write_sb(sd, 0x0030);
331
332 if (sd->gspca_dev.usb_err >= 0) {
333 ret = value;
334 gspca_dbg(gspca_dev, D_USBI, "i2c [0x%02X] -> 0x%02X\n",
335 reg, value);
336 } else
337 gspca_err(gspca_dev, "i2c read [0x%02x] failed\n", reg);
338
339 return ret;
340 }
341
342 /*--------------------------------------------------------------------------
343 Turn on the LED on some webcams. A beep should be heard too.
344 Return 0 on success, a negative number otherwise.
345 --------------------------------------------------------------------------*/
w9968cf_configure(struct sd * sd)346 static void w9968cf_configure(struct sd *sd)
347 {
348 reg_w(sd, 0x00, 0xff00); /* power-down */
349 reg_w(sd, 0x00, 0xbf17); /* reset everything */
350 reg_w(sd, 0x00, 0xbf10); /* normal operation */
351 reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */
352 reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */
353 reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */
354 reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */
355
356 sd->stopped = 1;
357 }
358
w9968cf_init(struct sd * sd)359 static void w9968cf_init(struct sd *sd)
360 {
361 unsigned long hw_bufsize = sd->sif ? (352 * 288 * 2) : (640 * 480 * 2),
362 y0 = 0x0000,
363 u0 = y0 + hw_bufsize / 2,
364 v0 = u0 + hw_bufsize / 4,
365 y1 = v0 + hw_bufsize / 4,
366 u1 = y1 + hw_bufsize / 2,
367 v1 = u1 + hw_bufsize / 4;
368
369 reg_w(sd, 0x00, 0xff00); /* power off */
370 reg_w(sd, 0x00, 0xbf10); /* power on */
371
372 reg_w(sd, 0x03, 0x405d); /* DRAM timings */
373 reg_w(sd, 0x04, 0x0030); /* SDRAM timings */
374
375 reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */
376 reg_w(sd, 0x21, y0 >> 16); /* Y buf.0, high */
377 reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */
378 reg_w(sd, 0x25, u0 >> 16); /* U buf.0, high */
379 reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */
380 reg_w(sd, 0x29, v0 >> 16); /* V buf.0, high */
381
382 reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */
383 reg_w(sd, 0x23, y1 >> 16); /* Y buf.1, high */
384 reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */
385 reg_w(sd, 0x27, u1 >> 16); /* U buf.1, high */
386 reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */
387 reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */
388
389 reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */
390 reg_w(sd, 0x33, y1 >> 16); /* JPEG buf 0 high */
391
392 reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */
393 reg_w(sd, 0x35, y1 >> 16); /* JPEG bug 1 high */
394
395 reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */
396 reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/
397 reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */
398 reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */
399 }
400
w9968cf_set_crop_window(struct sd * sd)401 static void w9968cf_set_crop_window(struct sd *sd)
402 {
403 int start_cropx, start_cropy, x, y, fw, fh, cw, ch,
404 max_width, max_height;
405
406 if (sd->sif) {
407 max_width = 352;
408 max_height = 288;
409 } else {
410 max_width = 640;
411 max_height = 480;
412 }
413
414 if (sd->sensor == SEN_OV7620) {
415 /*
416 * Sigh, this is dependend on the clock / framerate changes
417 * made by the frequency control, sick.
418 *
419 * Note we cannot use v4l2_ctrl_g_ctrl here, as we get called
420 * from ov519.c:setfreq() with the ctrl lock held!
421 */
422 if (sd->freq->val == 1) {
423 start_cropx = 277;
424 start_cropy = 37;
425 } else {
426 start_cropx = 105;
427 start_cropy = 37;
428 }
429 } else {
430 start_cropx = 320;
431 start_cropy = 35;
432 }
433
434 /* Work around to avoid FP arithmetics */
435 #define SC(x) ((x) << 10)
436
437 /* Scaling factors */
438 fw = SC(sd->gspca_dev.pixfmt.width) / max_width;
439 fh = SC(sd->gspca_dev.pixfmt.height) / max_height;
440
441 cw = (fw >= fh) ? max_width : SC(sd->gspca_dev.pixfmt.width) / fh;
442 ch = (fw >= fh) ? SC(sd->gspca_dev.pixfmt.height) / fw : max_height;
443
444 sd->sensor_width = max_width;
445 sd->sensor_height = max_height;
446
447 x = (max_width - cw) / 2;
448 y = (max_height - ch) / 2;
449
450 reg_w(sd, 0x10, start_cropx + x);
451 reg_w(sd, 0x11, start_cropy + y);
452 reg_w(sd, 0x12, start_cropx + x + cw);
453 reg_w(sd, 0x13, start_cropy + y + ch);
454 }
455
w9968cf_mode_init_regs(struct sd * sd)456 static void w9968cf_mode_init_regs(struct sd *sd)
457 {
458 int val, vs_polarity, hs_polarity;
459
460 w9968cf_set_crop_window(sd);
461
462 reg_w(sd, 0x14, sd->gspca_dev.pixfmt.width);
463 reg_w(sd, 0x15, sd->gspca_dev.pixfmt.height);
464
465 /* JPEG width & height */
466 reg_w(sd, 0x30, sd->gspca_dev.pixfmt.width);
467 reg_w(sd, 0x31, sd->gspca_dev.pixfmt.height);
468
469 /* Y & UV frame buffer strides (in WORD) */
470 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
471 V4L2_PIX_FMT_JPEG) {
472 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width / 2);
473 reg_w(sd, 0x2d, sd->gspca_dev.pixfmt.width / 4);
474 } else
475 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width);
476
477 reg_w(sd, 0x00, 0xbf17); /* reset everything */
478 reg_w(sd, 0x00, 0xbf10); /* normal operation */
479
480 /* Transfer size in WORDS (for UYVY format only) */
481 val = sd->gspca_dev.pixfmt.width * sd->gspca_dev.pixfmt.height;
482 reg_w(sd, 0x3d, val & 0xffff); /* low bits */
483 reg_w(sd, 0x3e, val >> 16); /* high bits */
484
485 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
486 V4L2_PIX_FMT_JPEG) {
487 /* We may get called multiple times (usb isoc bw negotiat.) */
488 jpeg_define(sd->jpeg_hdr, sd->gspca_dev.pixfmt.height,
489 sd->gspca_dev.pixfmt.width, 0x22); /* JPEG 420 */
490 jpeg_set_qual(sd->jpeg_hdr, v4l2_ctrl_g_ctrl(sd->jpegqual));
491 w9968cf_upload_quantizationtables(sd);
492 v4l2_ctrl_grab(sd->jpegqual, true);
493 }
494
495 /* Video Capture Control Register */
496 if (sd->sensor == SEN_OV7620) {
497 /* Seems to work around a bug in the image sensor */
498 vs_polarity = 1;
499 hs_polarity = 1;
500 } else {
501 vs_polarity = 1;
502 hs_polarity = 0;
503 }
504
505 val = (vs_polarity << 12) | (hs_polarity << 11);
506
507 /* NOTE: We may not have enough memory to do double buffering while
508 doing compression (amount of memory differs per model cam).
509 So we use the second image buffer also as jpeg stream buffer
510 (see w9968cf_init), and disable double buffering. */
511 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
512 V4L2_PIX_FMT_JPEG) {
513 /* val |= 0x0002; YUV422P */
514 val |= 0x0003; /* YUV420P */
515 } else
516 val |= 0x0080; /* Enable HW double buffering */
517
518 /* val |= 0x0020; enable clamping */
519 /* val |= 0x0008; enable (1-2-1) filter */
520 /* val |= 0x000c; enable (2-3-6-3-2) filter */
521
522 val |= 0x8000; /* capt. enable */
523
524 reg_w(sd, 0x16, val);
525
526 sd->gspca_dev.empty_packet = 0;
527 }
528
w9968cf_stop0(struct sd * sd)529 static void w9968cf_stop0(struct sd *sd)
530 {
531 v4l2_ctrl_grab(sd->jpegqual, false);
532 reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
533 reg_w(sd, 0x16, 0x0000); /* stop video capture */
534 }
535
536 /* The w9968cf docs say that a 0 sized packet means EOF (and also SOF
537 for the next frame). This seems to simply not be true when operating
538 in JPEG mode, in this case there may be empty packets within the
539 frame. So in JPEG mode use the JPEG SOI marker to detect SOF.
540
541 Note to make things even more interesting the w9968cf sends *PLANAR* jpeg,
542 to be precise it sends: SOI, SOF, DRI, SOS, Y-data, SOS, U-data, SOS,
543 V-data, EOI. */
w9968cf_pkt_scan(struct gspca_dev * gspca_dev,u8 * data,int len)544 static void w9968cf_pkt_scan(struct gspca_dev *gspca_dev,
545 u8 *data, /* isoc packet */
546 int len) /* iso packet length */
547 {
548 struct sd *sd = (struct sd *) gspca_dev;
549
550 if (w9968cf_vga_mode[gspca_dev->curr_mode].pixelformat ==
551 V4L2_PIX_FMT_JPEG) {
552 if (len >= 2 &&
553 data[0] == 0xff &&
554 data[1] == 0xd8) {
555 gspca_frame_add(gspca_dev, LAST_PACKET,
556 NULL, 0);
557 gspca_frame_add(gspca_dev, FIRST_PACKET,
558 sd->jpeg_hdr, JPEG_HDR_SZ);
559 /* Strip the ff d8, our own header (which adds
560 huffman and quantization tables) already has this */
561 len -= 2;
562 data += 2;
563 }
564 } else {
565 /* In UYVY mode an empty packet signals EOF */
566 if (gspca_dev->empty_packet) {
567 gspca_frame_add(gspca_dev, LAST_PACKET,
568 NULL, 0);
569 gspca_frame_add(gspca_dev, FIRST_PACKET,
570 NULL, 0);
571 gspca_dev->empty_packet = 0;
572 }
573 }
574 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
575 }
576
