1 /* 2 * Copyright (c) 2013 Texas Instruments Inc. 3 * 4 * David Griego, <dagriego@biglakesoftware.com> 5 * Dale Farnsworth, <dale@farnsworth.org> 6 * Archit Taneja, <archit@ti.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published by 10 * the Free Software Foundation. 11 */ 12 13 #ifndef __TI_VPDMA_H_ 14 #define __TI_VPDMA_H_ 15 16 #define VPDMA_MAX_NUM_LIST 8 17 /* 18 * A vpdma_buf tracks the size, DMA address and mapping status of each 19 * driver DMA area. 20 */ 21 struct vpdma_buf { 22 void *addr; 23 dma_addr_t dma_addr; 24 size_t size; 25 bool mapped; 26 }; 27 28 struct vpdma_desc_list { 29 struct vpdma_buf buf; 30 void *next; 31 int type; 32 }; 33 34 struct vpdma_data { 35 void __iomem *base; 36 37 struct platform_device *pdev; 38 39 spinlock_t lock; 40 bool hwlist_used[VPDMA_MAX_NUM_LIST]; 41 void *hwlist_priv[VPDMA_MAX_NUM_LIST]; 42 /* callback to VPE driver when the firmware is loaded */ 43 void (*cb)(struct platform_device *pdev); 44 }; 45 46 enum vpdma_data_format_type { 47 VPDMA_DATA_FMT_TYPE_YUV, 48 VPDMA_DATA_FMT_TYPE_RGB, 49 VPDMA_DATA_FMT_TYPE_MISC, 50 }; 51 52 struct vpdma_data_format { 53 enum vpdma_data_format_type type; 54 int data_type; 55 u8 depth; 56 }; 57 58 #define VPDMA_DESC_ALIGN 16 /* 16-byte descriptor alignment */ 59 #define VPDMA_STRIDE_ALIGN 16 /* 60 * line stride of source and dest 61 * buffers should be 16 byte aligned 62 */ 63 #define VPDMA_DTD_DESC_SIZE 32 /* 8 words */ 64 #define VPDMA_CFD_CTD_DESC_SIZE 16 /* 4 words */ 65 66 #define VPDMA_LIST_TYPE_NORMAL 0 67 #define VPDMA_LIST_TYPE_SELF_MODIFYING 1 68 #define VPDMA_LIST_TYPE_DOORBELL 2 69 70 enum vpdma_yuv_formats { 71 VPDMA_DATA_FMT_Y444 = 0, 72 VPDMA_DATA_FMT_Y422, 73 VPDMA_DATA_FMT_Y420, 74 VPDMA_DATA_FMT_C444, 75 VPDMA_DATA_FMT_C422, 76 VPDMA_DATA_FMT_C420, 77 VPDMA_DATA_FMT_YCR422, 78 VPDMA_DATA_FMT_YC444, 79 VPDMA_DATA_FMT_CRY422, 80 VPDMA_DATA_FMT_CBY422, 81 VPDMA_DATA_FMT_YCB422, 82 }; 83 84 enum vpdma_rgb_formats { 85 VPDMA_DATA_FMT_RGB565 = 0, 86 VPDMA_DATA_FMT_ARGB16_1555, 87 VPDMA_DATA_FMT_ARGB16, 88 VPDMA_DATA_FMT_RGBA16_5551, 89 VPDMA_DATA_FMT_RGBA16, 90 VPDMA_DATA_FMT_ARGB24, 91 VPDMA_DATA_FMT_RGB24, 92 VPDMA_DATA_FMT_ARGB32, 93 VPDMA_DATA_FMT_RGBA24, 94 VPDMA_DATA_FMT_RGBA32, 95 VPDMA_DATA_FMT_BGR565, 96 VPDMA_DATA_FMT_ABGR16_1555, 97 VPDMA_DATA_FMT_ABGR16, 98 VPDMA_DATA_FMT_BGRA16_5551, 99 VPDMA_DATA_FMT_BGRA16, 100 VPDMA_DATA_FMT_ABGR24, 101 VPDMA_DATA_FMT_BGR24, 102 VPDMA_DATA_FMT_ABGR32, 103 VPDMA_DATA_FMT_BGRA24, 104 VPDMA_DATA_FMT_BGRA32, 105 }; 106 107 enum vpdma_raw_formats { 108 VPDMA_DATA_FMT_RAW8 = 0, 109 VPDMA_DATA_FMT_RAW16, 110 }; 111 112 enum vpdma_misc_formats { 113 VPDMA_DATA_FMT_MV = 0, 114 }; 115 116 extern const struct vpdma_data_format vpdma_yuv_fmts[]; 117 extern const struct vpdma_data_format vpdma_rgb_fmts[]; 118 extern const struct vpdma_data_format vpdma_raw_fmts[]; 119 extern const struct vpdma_data_format vpdma_misc_fmts[]; 120 121 enum vpdma_frame_start_event { 122 VPDMA_FSEVENT_HDMI_FID = 0, 123 VPDMA_FSEVENT_DVO2_FID, 124 VPDMA_FSEVENT_HDCOMP_FID, 125 VPDMA_FSEVENT_SD_FID, 126 VPDMA_FSEVENT_LM_FID0, 127 VPDMA_FSEVENT_LM_FID1, 128 VPDMA_FSEVENT_LM_FID2, 129 VPDMA_FSEVENT_CHANNEL_ACTIVE, 130 }; 131 132 /* max width configurations */ 133 enum vpdma_max_width { 134 MAX_OUT_WIDTH_UNLIMITED = 0, 135 MAX_OUT_WIDTH_REG1, 136 MAX_OUT_WIDTH_REG2, 137 MAX_OUT_WIDTH_REG3, 138 MAX_OUT_WIDTH_352, 139 MAX_OUT_WIDTH_768, 140 MAX_OUT_WIDTH_1280, 141 MAX_OUT_WIDTH_1920, 142 }; 143 144 /* max height configurations */ 145 enum vpdma_max_height { 146 MAX_OUT_HEIGHT_UNLIMITED = 0, 147 MAX_OUT_HEIGHT_REG1, 148 MAX_OUT_HEIGHT_REG2, 149 MAX_OUT_HEIGHT_REG3, 150 MAX_OUT_HEIGHT_288, 151 MAX_OUT_HEIGHT_576, 152 MAX_OUT_HEIGHT_720, 153 MAX_OUT_HEIGHT_1080, 154 }; 155 156 /* 157 * VPDMA channel numbers 158 */ 159 enum vpdma_channel { 160 VPE_CHAN_LUMA1_IN, 161 VPE_CHAN_CHROMA1_IN, 162 VPE_CHAN_LUMA2_IN, 163 VPE_CHAN_CHROMA2_IN, 164 VPE_CHAN_LUMA3_IN, 165 VPE_CHAN_CHROMA3_IN, 166 VPE_CHAN_MV_IN, 167 VPE_CHAN_MV_OUT, 168 VPE_CHAN_LUMA_OUT, 169 VPE_CHAN_CHROMA_OUT, 170 VPE_CHAN_RGB_OUT, 171 }; 172 173 #define VIP_CHAN_VIP2_OFFSET 70 174 #define VIP_CHAN_MULT_PORTB_OFFSET 16 175 #define VIP_CHAN_YUV_PORTB_OFFSET 2 176 #define VIP_CHAN_RGB_PORTB_OFFSET 1 177 178 #define VPDMA_MAX_CHANNELS 256 179 180 /* flags for VPDMA data descriptors */ 181 #define VPDMA_DATA_ODD_LINE_SKIP (1 << 0) 182 #define VPDMA_DATA_EVEN_LINE_SKIP (1 << 1) 183 #define VPDMA_DATA_FRAME_1D (1 << 2) 184 #define VPDMA_DATA_MODE_TILED (1 << 3) 185 186 /* 187 * client identifiers used for configuration descriptors 188 */ 189 #define CFD_MMR_CLIENT 0 190 #define CFD_SC_CLIENT 4 191 192 /* Address data block header format */ 193 struct vpdma_adb_hdr { 194 u32 offset; 195 u32 nwords; 196 u32 reserved0; 197 u32 reserved1; 198 }; 199 200 /* helpers for creating ADB headers for config descriptors MMRs as client */ 201 #define ADB_ADDR(dma_buf, str, fld) ((dma_buf)->addr + offsetof(str, fld)) 202 #define MMR_ADB_ADDR(buf, str, fld) ADB_ADDR(&(buf), struct str, fld) 203 204 #define VPDMA_SET_MMR_ADB_HDR(buf, str, hdr, regs, offset_a) \ 205 do { \ 206 struct vpdma_adb_hdr *h; \ 207 struct str *adb = NULL; \ 208 h = MMR_ADB_ADDR(buf, str, hdr); \ 209 h->offset = (offset_a); \ 210 h->nwords = sizeof(adb->regs) >> 2; \ 211 } while (0) 212 213 /* vpdma descriptor buffer allocation and management */ 214 int vpdma_alloc_desc_buf(struct vpdma_buf *buf, size_t size); 215 void vpdma_free_desc_buf(struct vpdma_buf *buf); 216 int vpdma_map_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf); 217 void vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf); 218 219 /* vpdma descriptor list funcs */ 220 int vpdma_create_desc_list(struct vpdma_desc_list *list, size_t size, int type); 221 void vpdma_reset_desc_list(struct vpdma_desc_list *list); 222 void vpdma_free_desc_list(struct vpdma_desc_list *list); 223 int vpdma_submit_descs(struct vpdma_data *vpdma, struct vpdma_desc_list *list, 224 int list_num); 225 bool vpdma_list_busy(struct vpdma_data *vpdma, int list_num); 226 void vpdma_update_dma_addr(struct vpdma_data *vpdma, 227 struct vpdma_desc_list *list, dma_addr_t dma_addr, 228 void *write_dtd, int drop, int idx); 229 230 /* VPDMA hardware list funcs */ 231 int vpdma_hwlist_alloc(struct vpdma_data *vpdma, void *priv); 232 void *vpdma_hwlist_get_priv(struct vpdma_data *vpdma, int list_num); 233 void *vpdma_hwlist_release(struct vpdma_data *vpdma, int list_num); 234 235 /* helpers for creating vpdma descriptors */ 236 void vpdma_add_cfd_block(struct vpdma_desc_list *list, int client, 237 struct vpdma_buf *blk, u32 dest_offset); 238 void vpdma_add_cfd_adb(struct vpdma_desc_list *list, int client, 239 struct vpdma_buf *adb); 240 void vpdma_add_sync_on_channel_ctd(struct vpdma_desc_list *list, 241 enum vpdma_channel chan); 242 void vpdma_add_abort_channel_ctd(struct vpdma_desc_list *list, 243 int chan_num); 244 void vpdma_add_out_dtd(struct vpdma_desc_list *list, int width, 245 int stride, const struct v4l2_rect *c_rect, 246 const struct vpdma_data_format *fmt, dma_addr_t dma_addr, 247 int max_w, int max_h, enum vpdma_channel chan, u32 flags); 248 void vpdma_rawchan_add_out_dtd(struct vpdma_desc_list *list, int width, 249 int stride, const struct v4l2_rect *c_rect, 250 const struct vpdma_data_format *fmt, dma_addr_t dma_addr, 251 int max_w, int max_h, int raw_vpdma_chan, u32 flags); 252 253 void vpdma_add_in_dtd(struct vpdma_desc_list *list, int width, 254 int stride, const struct v4l2_rect *c_rect, 255 const struct vpdma_data_format *fmt, dma_addr_t dma_addr, 256 enum vpdma_channel chan, int field, u32 flags, int frame_width, 257 int frame_height, int start_h, int start_v); 258 int vpdma_list_cleanup(struct vpdma_data *vpdma, int list_num, 259 int *channels, int size); 260 261 /* vpdma list interrupt management */ 262 void vpdma_enable_list_complete_irq(struct vpdma_data *vpdma, int irq_num, 263 int list_num, bool enable); 264 void vpdma_clear_list_stat(struct vpdma_data *vpdma, int irq_num, 265 int list_num); 266 unsigned int vpdma_get_list_stat(struct vpdma_data *vpdma, int irq_num); 267 unsigned int vpdma_get_list_mask(struct vpdma_data *vpdma, int irq_num); 268 269 /* vpdma client configuration */ 270 void vpdma_set_line_mode(struct vpdma_data *vpdma, int line_mode, 271 enum vpdma_channel chan); 272 void vpdma_set_frame_start_event(struct vpdma_data *vpdma, 273 enum vpdma_frame_start_event fs_event, enum vpdma_channel chan); 274 void vpdma_set_max_size(struct vpdma_data *vpdma, int reg_addr, 275 u32 width, u32 height); 276 277 void vpdma_set_bg_color(struct vpdma_data *vpdma, 278 struct vpdma_data_format *fmt, u32 color); 279 void vpdma_dump_regs(struct vpdma_data *vpdma); 280 281 /* initialize vpdma, passed with VPE's platform device pointer */ 282 int vpdma_create(struct platform_device *pdev, struct vpdma_data *vpdma, 283 void (*cb)(struct platform_device *pdev)); 284 285 #endif 286
