1 /*
2 * driver for Earthsoft PT1/PT2
3 *
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
5 *
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/sched/signal.h>
23 #include <linux/hrtimer.h>
24 #include <linux/delay.h>
25 #include <linux/module.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/pci.h>
29 #include <linux/kthread.h>
30 #include <linux/freezer.h>
31 #include <linux/ratelimit.h>
32 #include <linux/string.h>
33 #include <linux/i2c.h>
34
35 #include <media/dvbdev.h>
36 #include <media/dvb_demux.h>
37 #include <media/dmxdev.h>
38 #include <media/dvb_net.h>
39 #include <media/dvb_frontend.h>
40
41 #include "tc90522.h"
42 #include "qm1d1b0004.h"
43 #include "dvb-pll.h"
44
45 #define DRIVER_NAME "earth-pt1"
46
47 #define PT1_PAGE_SHIFT 12
48 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
49 #define PT1_NR_UPACKETS 1024
50 #define PT1_NR_BUFS 511
51
52 struct pt1_buffer_page {
53 __le32 upackets[PT1_NR_UPACKETS];
54 };
55
56 struct pt1_table_page {
57 __le32 next_pfn;
58 __le32 buf_pfns[PT1_NR_BUFS];
59 };
60
61 struct pt1_buffer {
62 struct pt1_buffer_page *page;
63 dma_addr_t addr;
64 };
65
66 struct pt1_table {
67 struct pt1_table_page *page;
68 dma_addr_t addr;
69 struct pt1_buffer bufs[PT1_NR_BUFS];
70 };
71
72 enum pt1_fe_clk {
73 PT1_FE_CLK_20MHZ, /* PT1 */
74 PT1_FE_CLK_25MHZ, /* PT2 */
75 };
76
77 #define PT1_NR_ADAPS 4
78
79 struct pt1_adapter;
80
81 struct pt1 {
82 struct pci_dev *pdev;
83 void __iomem *regs;
84 struct i2c_adapter i2c_adap;
85 int i2c_running;
86 struct pt1_adapter *adaps[PT1_NR_ADAPS];
87 struct pt1_table *tables;
88 struct task_struct *kthread;
89 int table_index;
90 int buf_index;
91
92 struct mutex lock;
93 int power;
94 int reset;
95
96 enum pt1_fe_clk fe_clk;
97 };
98
99 struct pt1_adapter {
100 struct pt1 *pt1;
101 int index;
102
103 u8 *buf;
104 int upacket_count;
105 int packet_count;
106 int st_count;
107
108 struct dvb_adapter adap;
109 struct dvb_demux demux;
110 int users;
111 struct dmxdev dmxdev;
112 struct dvb_frontend *fe;
113 struct i2c_client *demod_i2c_client;
114 struct i2c_client *tuner_i2c_client;
115 int (*orig_set_voltage)(struct dvb_frontend *fe,
116 enum fe_sec_voltage voltage);
117 int (*orig_sleep)(struct dvb_frontend *fe);
118 int (*orig_init)(struct dvb_frontend *fe);
119
120 enum fe_sec_voltage voltage;
121 int sleep;
122 };
123
124 union pt1_tuner_config {
125 struct qm1d1b0004_config qm1d1b0004;
126 struct dvb_pll_config tda6651;
127 };
128
129 struct pt1_config {
130 struct i2c_board_info demod_info;
131 struct tc90522_config demod_cfg;
132
133 struct i2c_board_info tuner_info;
134 union pt1_tuner_config tuner_cfg;
135 };
136
137 static const struct pt1_config pt1_configs[PT1_NR_ADAPS] = {
138 {
139 .demod_info = {
140 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x1b),
141 },
142 .tuner_info = {
143 I2C_BOARD_INFO("qm1d1b0004", 0x60),
144 },
145 },
146 {
147 .demod_info = {
148 I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x1a),
149 },
150 .tuner_info = {
151 I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
152 },
153 },
154 {
155 .demod_info = {
156 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x19),
157 },
158 .tuner_info = {
159 I2C_BOARD_INFO("qm1d1b0004", 0x60),
160 },
161 },
162 {
163 .demod_info = {
164 I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x18),
165 },
166 .tuner_info = {
167 I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
168 },
169 },
170 };
171
172 static const u8 va1j5jf8007s_20mhz_configs[][2] = {
173 {0x04, 0x02}, {0x0d, 0x55}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01},
174 {0x1c, 0x0a}, {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0},
175 {0x52, 0x89}, {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69},
176 {0x87, 0x04}, {0x8e, 0x02}, {0xa3, 0xf7}, {0xa5, 0xc0},
177 };
178
179 static const u8 va1j5jf8007s_25mhz_configs[][2] = {
180 {0x04, 0x02}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01}, {0x1c, 0x0a},
181 {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0}, {0x52, 0x89},
182 {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69}, {0x87, 0x04},
183 {0x8e, 0x26}, {0xa3, 0xf7}, {0xa5, 0xc0},
184 };
185
186 static const u8 va1j5jf8007t_20mhz_configs[][2] = {
187 {0x03, 0x90}, {0x14, 0x8f}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2},
188 {0x22, 0x83}, {0x31, 0x0d}, {0x32, 0xe0}, {0x39, 0xd3}, {0x3a, 0x00},
189 {0x3b, 0x11}, {0x3c, 0x3f},
190 {0x5c, 0x40}, {0x5f, 0x80}, {0x75, 0x02}, {0x76, 0x4e}, {0x77, 0x03},
191 {0xef, 0x01}
192 };
193
194 static const u8 va1j5jf8007t_25mhz_configs[][2] = {
195 {0x03, 0x90}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2}, {0x22, 0x83},
196 {0x3a, 0x04}, {0x3b, 0x11}, {0x3c, 0x3f}, {0x5c, 0x40}, {0x5f, 0x80},
197 {0x75, 0x0a}, {0x76, 0x4c}, {0x77, 0x03}, {0xef, 0x01}
198 };
199
config_demod(struct i2c_client * cl,enum pt1_fe_clk clk)200 static int config_demod(struct i2c_client *cl, enum pt1_fe_clk clk)
201 {
202 int ret;
203 u8 buf[2] = {0x01, 0x80};
204 bool is_sat;
205 const u8 (*cfg_data)[2];
206 int i, len;
207
208 ret = i2c_master_send(cl, buf, 2);
209 if (ret < 0)
210 return ret;
211 usleep_range(30000, 50000);
212
213 is_sat = !strncmp(cl->name, TC90522_I2C_DEV_SAT,
214 strlen(TC90522_I2C_DEV_SAT));
215 if (is_sat) {
216 struct i2c_msg msg[2];
217 u8 wbuf, rbuf;
218
219 wbuf = 0x07;
220 msg[0].addr = cl->addr;
221 msg[0].flags = 0;
222 msg[0].len = 1;
223 msg[0].buf = &wbuf;
224
225 msg[1].addr = cl->addr;
226 msg[1].flags = I2C_M_RD;
227 msg[1].len = 1;
228 msg[1].buf = &rbuf;
229 ret = i2c_transfer(cl->adapter, msg, 2);
230 if (ret < 0)
231 return ret;
232 if (rbuf != 0x41)
233 return -EIO;
234 }
235
236 /* frontend init */
237 if (clk == PT1_FE_CLK_20MHZ) {
238 if (is_sat) {
239 cfg_data = va1j5jf8007s_20mhz_configs;
240 len = ARRAY_SIZE(va1j5jf8007s_20mhz_configs);
241 } else {
242 cfg_data = va1j5jf8007t_20mhz_configs;
243 len = ARRAY_SIZE(va1j5jf8007t_20mhz_configs);
244 }
245 } else {
246 if (is_sat) {
247 cfg_data = va1j5jf8007s_25mhz_configs;
248 len = ARRAY_SIZE(va1j5jf8007s_25mhz_configs);
249 } else {
250 cfg_data = va1j5jf8007t_25mhz_configs;
251 len = ARRAY_SIZE(va1j5jf8007t_25mhz_configs);
252 }
253 }
254
255 for (i = 0; i < len; i++) {
256 ret = i2c_master_send(cl, cfg_data[i], 2);
257 if (ret < 0)
258 return ret;
259 }
260 return 0;
261 }
262
pt1_write_reg(struct pt1 * pt1,int reg,u32 data)263 static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
264 {
265 writel(data, pt1->regs + reg * 4);
266 }
267
pt1_read_reg(struct pt1 * pt1,int reg)268 static u32 pt1_read_reg(struct pt1 *pt1, int reg)
269 {
270 return readl(pt1->regs + reg * 4);
271 }
272
273 static unsigned int pt1_nr_tables = 8;
274 module_param_named(nr_tables, pt1_nr_tables, uint, 0);
275
pt1_increment_table_count(struct pt1 * pt1)276 static void pt1_increment_table_count(struct pt1 *pt1)
277 {
278 pt1_write_reg(pt1, 0, 0x00000020);
279 }
280
pt1_init_table_count(struct pt1 * pt1)281 static void pt1_init_table_count(struct pt1 *pt1)
282 {
283 pt1_write_reg(pt1, 0, 0x00000010);
284 }
285
pt1_register_tables(struct pt1 * pt1,u32 first_pfn)286 static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
287 {
288 pt1_write_reg(pt1, 5, first_pfn);
289 pt1_write_reg(pt1, 0, 0x0c000040);
290 }
291
pt1_unregister_tables(struct pt1 * pt1)292 static void pt1_unregister_tables(struct pt1 *pt1)
293 {
294 pt1_write_reg(pt1, 0, 0x08080000);
295 }
296
pt1_sync(struct pt1 * pt1)297 static int pt1_sync(struct pt1 *pt1)
298 {
299 int i;
300 for (i = 0; i < 57; i++) {
301 if (pt1_read_reg(pt1, 0) & 0x20000000)
302 return 0;
303 pt1_write_reg(pt1, 0, 0x00000008);
304 }
305 dev_err(&pt1->pdev->dev, "could not sync\n");
306 return -EIO;
307 }
308
pt1_identify(struct pt1 * pt1)309 static u64 pt1_identify(struct pt1 *pt1)
310 {
311 int i;
312 u64 id;
313 id = 0;
314 for (i = 0; i < 57; i++) {
315 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
316 pt1_write_reg(pt1, 0, 0x00000008);
317 }
318 return id;
319 }
320
pt1_unlock(struct pt1 * pt1)321 static int pt1_unlock(struct pt1 *pt1)
322 {
323 int i;
324 pt1_write_reg(pt1, 0, 0x00000008);
325 for (i = 0; i < 3; i++) {
326 if (pt1_read_reg(pt1, 0) & 0x80000000)
327 return 0;
328 usleep_range(1000, 2000);
329 }
330 dev_err(&pt1->pdev->dev, "could not unlock\n");
331 return -EIO;
332 }
333
pt1_reset_pci(struct pt1 * pt1)334 static int pt1_reset_pci(struct pt1 *pt1)
335 {
336 int i;
337 pt1_write_reg(pt1, 0, 0x01010000);
338 pt1_write_reg(pt1, 0, 0x01000000);
339 for (i = 0; i < 10; i++) {
340 if (pt1_read_reg(pt1, 0) & 0x00000001)
341 return 0;
342 usleep_range(1000, 2000);
343 }
344 dev_err(&pt1->pdev->dev, "could not reset PCI\n");
345 return -EIO;
346 }
347
pt1_reset_ram(struct pt1 * pt1)348 static int pt1_reset_ram(struct pt1 *pt1)
349 {
350 int i;
351 pt1_write_reg(pt1, 0, 0x02020000);
352 pt1_write_reg(pt1, 0, 0x02000000);
353 for (i = 0; i < 10; i++) {
354 if (pt1_read_reg(pt1, 0) & 0x00000002)
355 return 0;
356 usleep_range(1000, 2000);
357 }
358 dev_err(&pt1->pdev->dev, "could not reset RAM\n");
359 return -EIO;
360 }
361
pt1_do_enable_ram(struct pt1 * pt1)362 static int pt1_do_enable_ram(struct pt1 *pt1)
363 {
364 int i, j;
365 u32 status;
366 status = pt1_read_reg(pt1, 0) & 0x00000004;
367 pt1_write_reg(pt1, 0, 0x00000002);
368 for (i = 0; i < 10; i++) {
369 for (j = 0; j < 1024; j++) {
370 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
371 return 0;
372 }
373 usleep_range(1000, 2000);
374 }
375 dev_err(&pt1->pdev->dev, "could not enable RAM\n");
376 return -EIO;
377 }
378
pt1_enable_ram(struct pt1 * pt1)379 static int pt1_enable_ram(struct pt1 *pt1)
380 {
381 int i, ret;
382 int phase;
383 usleep_range(1000, 2000);
384 phase = pt1->pdev->device == 0x211a ? 128 : 166;
385 for (i = 0; i < phase; i++) {
386 ret = pt1_do_enable_ram(pt1);
387 if (ret < 0)
388 return ret;
389 }
390 return 0;
391 }
392
pt1_disable_ram(struct pt1 * pt1)393 static void pt1_disable_ram(struct pt1 *pt1)
394 {
395 pt1_write_reg(pt1, 0, 0x0b0b0000);
396 }
397
pt1_set_stream(struct pt1 * pt1,int index,int enabled)398 static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
399 {
400 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
401 }
402
pt1_init_streams(struct pt1 * pt1)403 static void pt1_init_streams(struct pt1 *pt1)
404 {
405 int i;
406 for (i = 0; i < PT1_NR_ADAPS; i++)
407 pt1_set_stream(pt1, i, 0);
408 }
409
pt1_filter(struct pt1 * pt1,struct pt1_buffer_page * page)410 static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
411 {
412 u32 upacket;
413 int i;
414 int index;
415 struct pt1_adapter *adap;
416 int offset;
417 u8 *buf;
418 int sc;
419
420 if (!page->upackets[PT1_NR_UPACKETS - 1])
421 return 0;
422
423 for (i = 0; i < PT1_NR_UPACKETS; i++) {
424 upacket = le32_to_cpu(page->upackets[i]);
425 index = (upacket >> 29) - 1;
426 if (index < 0 || index >= PT1_NR_ADAPS)
427 continue;
428
429 adap = pt1->adaps[index];
430 if (upacket >> 25 & 1)
431 adap->upacket_count = 0;
432 else if (!adap->upacket_count)
433 continue;
434
435 if (upacket >> 24 & 1)
436 printk_ratelimited(KERN_INFO "earth-pt1: device buffer overflowing. table[%d] buf[%d]\n",
437 pt1->table_index, pt1->buf_index);
438 sc = upacket >> 26 & 0x7;
439 if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))
440 printk_ratelimited(KERN_INFO "earth-pt1: data loss in streamID(adapter)[%d]\n",
441 index);
442 adap->st_count = sc;
443
444 buf = adap->buf;
445 offset = adap->packet_count * 188 + adap->upacket_count * 3;
446 buf[offset] = upacket >> 16;
447 buf[offset + 1] = upacket >> 8;
448 if (adap->upacket_count != 62)
449 buf[offset + 2] = upacket;
450
451 if (++adap->upacket_count >= 63) {
452 adap->upacket_count = 0;
453 if (++adap->packet_count >= 21) {
454 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
455 adap->packet_count = 0;
456 }
457 }
458 }
459
460 page->upackets[PT1_NR_UPACKETS - 1] = 0;
461 return 1;
462 }
463
pt1_thread(void * data)464 static int pt1_thread(void *data)
465 {
466 struct pt1 *pt1;
467 struct pt1_buffer_page *page;
468 bool was_frozen;
469
470 #define PT1_FETCH_DELAY 10
471 #define PT1_FETCH_DELAY_DELTA 2
472
473 pt1 = data;
474 set_freezable();
475
476 while (!kthread_freezable_should_stop(&was_frozen)) {
477 if (was_frozen) {
478 int i;
479
480 for (i = 0; i < PT1_NR_ADAPS; i++)
481 pt1_set_stream(pt1, i, !!pt1->adaps[i]->users);
482 }
483
484 page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page;
485 if (!pt1_filter(pt1, page)) {
486 ktime_t delay;
487
488 delay = ktime_set(0, PT1_FETCH_DELAY * NSEC_PER_MSEC);
489 set_current_state(TASK_INTERRUPTIBLE);
490 schedule_hrtimeout_range(&delay,
491 PT1_FETCH_DELAY_DELTA * NSEC_PER_MSEC,
492 HRTIMER_MODE_REL);
493 continue;
494 }
495
496 if (++pt1->buf_index >= PT1_NR_BUFS) {
497 pt1_increment_table_count(pt1);
498 pt1->buf_index = 0;
499 if (++pt1->table_index >= pt1_nr_tables)
500 pt1->table_index = 0;
501 }
502 }
503
504 return 0;
505 }
506
pt1_free_page(struct pt1 * pt1,void * page,dma_addr_t addr)507 static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
508 {
509 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
510 }
511
pt1_alloc_page(struct pt1 * pt1,dma_addr_t * addrp,u32 * pfnp)512 static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
513 {
514 void *page;
515 dma_addr_t addr;
516
517 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
518 GFP_KERNEL);
519 if (page == NULL)
520 return NULL;
521
522 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
523 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
524
525 *addrp = addr;
526 *pfnp = addr >> PT1_PAGE_SHIFT;
527 return page;
528 }
529
pt1_cleanup_buffer(struct pt1 * pt1,struct pt1_buffer * buf)530 static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
531 {
532 pt1_free_page(pt1, buf->page, buf->addr);
533 }
534
535 static int
pt1_init_buffer(struct pt1 * pt1,struct pt1_buffer * buf,u32 * pfnp)536 pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
537 {
538 struct pt1_buffer_page *page;
539 dma_addr_t addr;
540
541 page = pt1_alloc_page(pt1, &addr, pfnp);
542 if (page == NULL)
543 return -ENOMEM;
544
545 page->upackets[PT1_NR_UPACKETS - 1] = 0;
546
547 buf->page = page;
548 buf->addr = addr;
549 return 0;
550 }
551
pt1_cleanup_table(struct pt1 * pt1,struct pt1_table * table)552 static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
553 {
554 int i;
555
556 for (i = 0; i < PT1_NR_BUFS; i++)
557 pt1_cleanup_buffer(pt1, &table->bufs[i]);
558
559 pt1_free_page(pt1, table->page, table->addr);
560 }
561
562 static int
pt1_init_table(struct pt1 * pt1,struct pt1_table * table,u32 * pfnp)563 pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
564 {
565 struct pt1_table_page *page;
566 dma_addr_t addr;
567 int i, ret;
568 u32 buf_pfn;
569
570 page = pt1_alloc_page(pt1, &addr, pfnp);
571 if (page == NULL)
572 return -ENOMEM;
573
574 for (i = 0; i < PT1_NR_BUFS; i++) {
575 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
576 if (ret < 0)
577 goto err;
578
579 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
580 }
581
582 pt1_increment_table_count(pt1);
583 table->page = page;
584 table->addr = addr;
585 return 0;
586
587 err:
588 while (i--)
589 pt1_cleanup_buffer(pt1, &table->bufs[i]);
590
591 pt1_free_page(pt1, page, addr);
592 return ret;
593 }
594
pt1_cleanup_tables(struct pt1 * pt1)595 static void pt1_cleanup_tables(struct pt1 *pt1)
596 {
597 struct pt1_table *tables;
598 int i;
599
600 tables = pt1->tables;
601 pt1_unregister_tables(pt1);
602
603 for (i = 0; i < pt1_nr_tables; i++)
604 pt1_cleanup_table(pt1, &tables[i]);
605
606 vfree(tables);
607 }
608
pt1_init_tables(struct pt1 * pt1)609 static int pt1_init_tables(struct pt1 *pt1)
610 {
611 struct pt1_table *tables;
612 int i, ret;
613 u32 first_pfn, pfn;
614
615 if (!pt1_nr_tables)
616 return 0;
617
618 tables = vmalloc(array_size(pt1_nr_tables, sizeof(struct pt1_table)));
619 if (tables == NULL)
620 return -ENOMEM;
621
622 pt1_init_table_count(pt1);
623
624 i = 0;
625 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
626 if (ret)
627 goto err;
628 i++;
629
630 while (i < pt1_nr_tables) {
631 ret = pt1_init_table(pt1, &tables[i], &pfn);
632 if (ret)
633 goto err;
634 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
635 i++;
636 }
637
638 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
639
640 pt1_register_tables(pt1, first_pfn);
641 pt1->tables = tables;
642 return 0;
643
644 err:
645 while (i--)
646 pt1_cleanup_table(pt1, &tables[i]);
647
648 vfree(tables);
649 return ret;
650 }
651
pt1_start_polling(struct pt1 * pt1)652 static int pt1_start_polling(struct pt1 *pt1)
653 {
654 int ret = 0;
655
656 mutex_lock(&pt1->lock);
657 if (!pt1->kthread) {
658 pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1");
659 if (IS_ERR(pt1->kthread)) {
660 ret = PTR_ERR(pt1->kthread);
661 pt1->kthread = NULL;
662 }
663 }
664 mutex_unlock(&pt1->lock);
665 return ret;
666 }
667
pt1_start_feed(struct dvb_demux_feed * feed)668 static int pt1_start_feed(struct dvb_demux_feed *feed)
669 {
670 struct pt1_adapter *adap;
671 adap = container_of(feed->demux, struct pt1_adapter, demux);
672 if (!adap->users++) {
673 int ret;
674
675 ret = pt1_start_polling(adap->pt1);
676 if (ret)
677 return ret;
678 pt1_set_stream(adap->pt1, adap->index, 1);
679 }
680 return 0;
681 }
682
pt1_stop_polling(struct pt1 * pt1)683 static void pt1_stop_polling(struct pt1 *pt1)
684 {
685 int i, count;
686
687 mutex_lock(&pt1->lock);
688 for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)
689 count += pt1->adaps[i]->users;
690
691 if (count == 0 && pt1->kthread) {
692 kthread_stop(pt1->kthread);
693 pt1->kthread = NULL;
694 }
695 mutex_unlock(&pt1->lock);
696 }
697
pt1_stop_feed(struct dvb_demux_feed * feed)698 static int pt1_stop_feed(struct dvb_demux_feed *feed)
699 {
700 struct pt1_adapter *adap;
701 adap = container_of(feed->demux, struct pt1_adapter, demux);
702 if (!--adap->users) {
703 pt1_set_stream(adap->pt1, adap->index, 0);
704 pt1_stop_polling(adap->pt1);
705 }
706 return 0;
707 }
708
709 static void
pt1_update_power(struct pt1 * pt1)710 pt1_update_power(struct pt1 *pt1)
711 {
712 int bits;
713 int i;
714 struct pt1_adapter *adap;
715 static const int sleep_bits[] = {
716 1 << 4,
717 1 << 6 | 1 << 7,
718 1 << 5,
719 1 << 6 | 1 << 8,
720 };
721
722 bits = pt1->power | !pt1->reset << 3;
723 mutex_lock(&pt1->lock);
724 for (i = 0; i < PT1_NR_ADAPS; i++) {
725 adap = pt1->adaps[i];
726 switch (adap->voltage) {
727 case SEC_VOLTAGE_13: /* actually 11V */
728 bits |= 1 << 2;
729 break;
730 case SEC_VOLTAGE_18: /* actually 15V */
731 bits |= 1 << 1 | 1 << 2;
732 break;
733 default:
734 break;
735 }
736
737 /* XXX: The bits should be changed depending on adap->sleep. */
738 bits |= sleep_bits[i];
739 }
740 pt1_write_reg(pt1, 1, bits);
741 mutex_unlock(&pt1->lock);
742 }
743
pt1_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)744 static int pt1_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
745 {
746 struct pt1_adapter *adap;
747
748 adap = container_of(fe->dvb, struct pt1_adapter, adap);
749 adap->voltage = voltage;
750 pt1_update_power(adap->pt1);
751
752 if (adap->orig_set_voltage)
753 return adap->orig_set_voltage(fe, voltage);
754 else
755 return 0;
756 }
757
pt1_sleep(struct dvb_frontend * fe)758 static int pt1_sleep(struct dvb_frontend *fe)
759 {
760 struct pt1_adapter *adap;
761 int ret;
762
763 adap = container_of(fe->dvb, struct pt1_adapter, adap);
764
765 ret = 0;
766 if (adap->orig_sleep)
767 ret = adap->orig_sleep(fe);
768
769 adap->sleep = 1;
770 pt1_update_power(adap->pt1);
771 return ret;
772 }
773
pt1_wakeup(struct dvb_frontend * fe)774 static int pt1_wakeup(struct dvb_frontend *fe)
775 {
776 struct pt1_adapter *adap;
777 int ret;
778
779 adap = container_of(fe->dvb, struct pt1_adapter, adap);
780 adap->sleep = 0;
781 pt1_update_power(adap->pt1);
782 usleep_range(1000, 2000);
783
784 ret = config_demod(adap->demod_i2c_client, adap->pt1->fe_clk);
785 if (ret == 0 && adap->orig_init)
786 ret = adap->orig_init(fe);
787 return ret;
788 }
789
pt1_free_adapter(struct pt1_adapter * adap)790 static void pt1_free_adapter(struct pt1_adapter *adap)
791 {
792 adap->demux.dmx.close(&adap->demux.dmx);
793 dvb_dmxdev_release(&adap->dmxdev);
794 dvb_dmx_release(&adap->demux);
795 dvb_unregister_adapter(&adap->adap);
796 free_page((unsigned long)adap->buf);
797 kfree(adap);
798 }
799
800 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
801
802 static struct pt1_adapter *
pt1_alloc_adapter(struct pt1 * pt1)803 pt1_alloc_adapter(struct pt1 *pt1)
804 {
805 struct pt1_adapter *adap;
806 void *buf;
807 struct dvb_adapter *dvb_adap;
808 struct dvb_demux *demux;
809 struct dmxdev *dmxdev;
810 int ret;
811
812 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
813 if (!adap) {
814 ret = -ENOMEM;
815 goto err;
816 }
817
818 adap->pt1 = pt1;
819
820 adap->voltage = SEC_VOLTAGE_OFF;
821 adap->sleep = 1;
822
823 buf = (u8 *)__get_free_page(GFP_KERNEL);
824 if (!buf) {
825 ret = -ENOMEM;
826 goto err_kfree;
827 }
828
829 adap->buf = buf;
830 adap->upacket_count = 0;
831 adap->packet_count = 0;
832 adap->st_count = -1;
833
834 dvb_adap = &adap->adap;
835 dvb_adap->priv = adap;
836 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
837 &pt1->pdev->dev, adapter_nr);
838 if (ret < 0)
839 goto err_free_page;
840
841 demux = &adap->demux;
842 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
843 demux->priv = adap;
844 demux->feednum = 256;
845 demux->filternum = 256;
846 demux->start_feed = pt1_start_feed;
847 demux->stop_feed = pt1_stop_feed;
848 demux->write_to_decoder = NULL;
849 ret = dvb_dmx_init(demux);
850 if (ret < 0)
851 goto err_unregister_adapter;
852
853 dmxdev = &adap->dmxdev;
854 dmxdev->filternum = 256;
855 dmxdev->demux = &demux->dmx;
856 dmxdev->capabilities = 0;
857 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
858 if (ret < 0)
859 goto err_dmx_release;
860
861 return adap;
862
863 err_dmx_release:
864 dvb_dmx_release(demux);
865 err_unregister_adapter:
866 dvb_unregister_adapter(dvb_adap);
867 err_free_page:
868 free_page((unsigned long)buf);
869 err_kfree:
870 kfree(adap);
871 err:
872 return ERR_PTR(ret);
873 }
874
pt1_cleanup_adapters(struct pt1 * pt1)875 static void pt1_cleanup_adapters(struct pt1 *pt1)
876 {
877 int i;
878 for (i = 0; i < PT1_NR_ADAPS; i++)
879 pt1_free_adapter(pt1->adaps[i]);
880 }
881
pt1_init_adapters(struct pt1 * pt1)882 static int pt1_init_adapters(struct pt1 *pt1)
883 {
884 int i;
885 struct pt1_adapter *adap;
886 int ret;
887
888 for (i = 0; i < PT1_NR_ADAPS; i++) {
889 adap = pt1_alloc_adapter(pt1);
890 if (IS_ERR(adap)) {
891 ret = PTR_ERR(adap);
892 goto err;
893 }
894
895 adap->index = i;
896 pt1->adaps[i] = adap;
897 }
898 return 0;
899
900 err:
901 while (i--)
902 pt1_free_adapter(pt1->adaps[i]);
903
904 return ret;
905 }
906
pt1_cleanup_frontend(struct pt1_adapter * adap)907 static void pt1_cleanup_frontend(struct pt1_adapter *adap)
908 {
909 dvb_unregister_frontend(adap->fe);
910 dvb_module_release(adap->tuner_i2c_client);
911 dvb_module_release(adap->demod_i2c_client);
912 }
913
pt1_init_frontend(struct pt1_adapter * adap,struct dvb_frontend * fe)914 static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
915 {
916 int ret;
917
918 adap->orig_set_voltage = fe->ops.set_voltage;
919 adap->orig_sleep = fe->ops.sleep;
920 adap->orig_init = fe->ops.init;
921 fe->ops.set_voltage = pt1_set_voltage;
922 fe->ops.sleep = pt1_sleep;
923 fe->ops.init = pt1_wakeup;
924
925 ret = dvb_register_frontend(&adap->adap, fe);
926 if (ret < 0)
927 return ret;
928
929 adap->fe = fe;
930 return 0;
931 }
932
pt1_cleanup_frontends(struct pt1 * pt1)933 static void pt1_cleanup_frontends(struct pt1 *pt1)
934 {
935 int i;
936 for (i = 0; i < PT1_NR_ADAPS; i++)
937 pt1_cleanup_frontend(pt1->adaps[i]);
938 }
939
pt1_init_frontends(struct pt1 * pt1)940 static int pt1_init_frontends(struct pt1 *pt1)
941 {
942 int i;
943 int ret;
944
945 for (i = 0; i < ARRAY_SIZE(pt1_configs); i++) {
946 const struct i2c_board_info *info;
947 struct tc90522_config dcfg;
948 struct i2c_client *cl;
949
950 info = &pt1_configs[i].demod_info;
951 dcfg = pt1_configs[i].demod_cfg;
952 dcfg.tuner_i2c = NULL;
953
954 ret = -ENODEV;
955 cl = dvb_module_probe("tc90522", info->type, &pt1->i2c_adap,
956 info->addr, &dcfg);
957 if (!cl)
958 goto fe_unregister;
959 pt1->adaps[i]->demod_i2c_client = cl;
960
961 if (!strncmp(cl->name, TC90522_I2C_DEV_SAT,
962 strlen(TC90522_I2C_DEV_SAT))) {
963 struct qm1d1b0004_config tcfg;
964
965 info = &pt1_configs[i].tuner_info;
966 tcfg = pt1_configs[i].tuner_cfg.qm1d1b0004;
967 tcfg.fe = dcfg.fe;
968 cl = dvb_module_probe("qm1d1b0004",
969 info->type, dcfg.tuner_i2c,
970 info->addr, &tcfg);
971 } else {
972 struct dvb_pll_config tcfg;
973
974 info = &pt1_configs[i].tuner_info;
975 tcfg = pt1_configs[i].tuner_cfg.tda6651;
976 tcfg.fe = dcfg.fe;
977 cl = dvb_module_probe("dvb_pll",
978 info->type, dcfg.tuner_i2c,
979 info->addr, &tcfg);
980 }
981 if (!cl)
982 goto demod_release;
983 pt1->adaps[i]->tuner_i2c_client = cl;
984
985 ret = pt1_init_frontend(pt1->adaps[i], dcfg.fe);
986 if (ret < 0)
987 goto tuner_release;
988 }
989
990 return 0;
991
992 tuner_release:
993 dvb_module_release(pt1->adaps[i]->tuner_i2c_client);
994 demod_release:
995 dvb_module_release(pt1->adaps[i]->demod_i2c_client);
996 fe_unregister:
997 dev_warn(&pt1->pdev->dev, "failed to init FE(%d).\n", i);
998 i--;
999 for (; i >= 0; i--) {
1000 dvb_unregister_frontend(pt1->adaps[i]->fe);
1001 dvb_module_release(pt1->adaps[i]->tuner_i2c_client);
1002 dvb_module_release(pt1->adaps[i]->demod_i2c_client);
1003 }
1004 return ret;
1005 }
1006
pt1_i2c_emit(struct pt1 * pt1,int addr,int busy,int read_enable,int clock,int data,int next_addr)1007 static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
1008 int clock, int data, int next_addr)
1009 {
1010 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
1011 !clock << 11 | !data << 10 | next_addr);
1012 }
1013
pt1_i2c_write_bit(struct pt1 * pt1,int addr,int * addrp,int data)1014 static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
1015 {
1016 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
1017 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
1018 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
1019 *addrp = addr + 3;
1020 }
1021
pt1_i2c_read_bit(struct pt1 * pt1,int addr,int * addrp)1022 static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
1023 {
1024 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
1025 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
1026 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
1027 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
1028 *addrp = addr + 4;
1029 }
1030
pt1_i2c_write_byte(struct pt1 * pt1,int addr,int * addrp,int data)1031 static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
1032 {
1033 int i;
1034 for (i = 0; i < 8; i++)
1035 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
1036 pt1_i2c_write_bit(pt1, addr, &addr, 1);
1037 *addrp = addr;
1038 }
1039
pt1_i2c_read_byte(struct pt1 * pt1,int addr,int * addrp,int last)1040 static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
1041 {
1042 int i;
1043 for (i = 0; i < 8; i++)
1044 pt1_i2c_read_bit(pt1, addr, &addr);
1045 pt1_i2c_write_bit(pt1, addr, &addr, last);
1046 *addrp = addr;
1047 }
1048
pt1_i2c_prepare(struct pt1 * pt1,int addr,int * addrp)1049 static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
1050 {
1051 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
1052 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
1053 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
1054 *addrp = addr + 3;
1055 }
1056
1057 static void
pt1_i2c_write_msg(struct pt1 * pt1,int addr,int * addrp,struct i2c_msg * msg)1058 pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
1059 {
1060 int i;
1061 pt1_i2c_prepare(pt1, addr, &addr);
1062 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
1063 for (i = 0; i < msg->len; i++)
1064 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
1065 *addrp = addr;
1066 }
1067
1068 static void
pt1_i2c_read_msg(struct pt1 * pt1,int addr,int * addrp,struct i2c_msg * msg)1069 pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
1070 {
1071 int i;
1072 pt1_i2c_prepare(pt1, addr, &addr);
1073 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
1074 for (i = 0; i < msg->len; i++)
1075 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
1076 *addrp = addr;
1077 }
1078
pt1_i2c_end(struct pt1 * pt1,int addr)1079 static int pt1_i2c_end(struct pt1 *pt1, int addr)
1080 {
1081 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
1082 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
1083 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
1084
1085 pt1_write_reg(pt1, 0, 0x00000004);
1086 do {
1087 if (signal_pending(current))
1088 return -EINTR;
1089 usleep_range(1000, 2000);
1090 } while (pt1_read_reg(pt1, 0) & 0x00000080);
1091 return 0;
1092 }
1093
pt1_i2c_begin(struct pt1 * pt1,int * addrp)1094 static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
1095 {
1096 int addr;
1097 addr = 0;
1098
1099 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
1100 addr = addr + 1;
1101
1102 if (!pt1->i2c_running) {
1103 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
1104 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
1105 addr = addr + 2;
1106 pt1->i2c_running = 1;
1107 }
1108 *addrp = addr;
1109 }
1110
pt1_i2c_xfer(struct i2c_adapter * adap,struct i2c_msg * msgs,int num)1111 static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
1112 {
1113 struct pt1 *pt1;
1114 int i;
1115 struct i2c_msg *msg, *next_msg;
1116 int addr, ret;
1117 u16 len;
1118 u32 word;
1119
1120 pt1 = i2c_get_adapdata(adap);
1121
1122 for (i = 0; i < num; i++) {
1123 msg = &msgs[i];
1124 if (msg->flags & I2C_M_RD)
1125 return -ENOTSUPP;
1126
1127 if (i + 1 < num)
1128 next_msg = &msgs[i + 1];
1129 else
1130 next_msg = NULL;
1131
1132 if (next_msg && next_msg->flags & I2C_M_RD) {
1133 i++;
1134
1135 len = next_msg->len;
1136 if (len > 4)
1137 return -ENOTSUPP;
1138
1139 pt1_i2c_begin(pt1, &addr);
1140 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1141 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
1142 ret = pt1_i2c_end(pt1, addr);
1143 if (ret < 0)
1144 return ret;
1145
1146 word = pt1_read_reg(pt1, 2);
1147 while (len--) {
1148 next_msg->buf[len] = word;
1149 word >>= 8;
1150 }
1151 } else {
1152 pt1_i2c_begin(pt1, &addr);
1153 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1154 ret = pt1_i2c_end(pt1, addr);
1155 if (ret < 0)
1156 return ret;
1157 }
1158 }
1159
1160 return num;
1161 }
1162
pt1_i2c_func(struct i2c_adapter * adap)1163 static u32 pt1_i2c_func(struct i2c_adapter *adap)
1164 {
1165 return I2C_FUNC_I2C;
1166 }
1167
1168 static const struct i2c_algorithm pt1_i2c_algo = {
1169 .master_xfer = pt1_i2c_xfer,
1170 .functionality = pt1_i2c_func,
1171 };
1172
pt1_i2c_wait(struct pt1 * pt1)1173 static void pt1_i2c_wait(struct pt1 *pt1)
1174 {
1175 int i;
1176 for (i = 0; i < 128; i++)
1177 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1178 }
1179
pt1_i2c_init(struct pt1 * pt1)1180 static void pt1_i2c_init(struct pt1 *pt1)
1181 {
1182 int i;
1183 for (i = 0; i < 1024; i++)
1184 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1185 }
1186
1187 #ifdef CONFIG_PM_SLEEP
1188
pt1_suspend(struct device * dev)1189 static int pt1_suspend(struct device *dev)
1190 {
1191 struct pci_dev *pdev = to_pci_dev(dev);
1192 struct pt1 *pt1 = pci_get_drvdata(pdev);
1193
1194 pt1_init_streams(pt1);
1195 pt1_disable_ram(pt1);
1196 pt1->power = 0;
1197 pt1->reset = 1;
1198 pt1_update_power(pt1);
1199 return 0;
1200 }
1201
pt1_resume(struct device * dev)1202 static int pt1_resume(struct device *dev)
1203 {
1204 struct pci_dev *pdev = to_pci_dev(dev);
1205 struct pt1 *pt1 = pci_get_drvdata(pdev);
1206 int ret;
1207 int i;
1208
1209 pt1->power = 0;
1210 pt1->reset = 1;
1211 pt1_update_power(pt1);
1212
1213 pt1_i2c_init(pt1);
1214 pt1_i2c_wait(pt1);
1215
1216 ret = pt1_sync(pt1);
1217 if (ret < 0)
1218 goto resume_err;
1219
1220 pt1_identify(pt1);
1221
1222 ret = pt1_unlock(pt1);
1223 if (ret < 0)
1224 goto resume_err;
1225
1226 ret = pt1_reset_pci(pt1);
1227 if (ret < 0)
1228 goto resume_err;
1229
1230 ret = pt1_reset_ram(pt1);
1231 if (ret < 0)
1232 goto resume_err;
1233
1234 ret = pt1_enable_ram(pt1);
1235 if (ret < 0)
1236 goto resume_err;
1237
1238 pt1_init_streams(pt1);
1239
1240 pt1->power = 1;
1241 pt1_update_power(pt1);
1242 msleep(20);
1243
1244 pt1->reset = 0;
1245 pt1_update_power(pt1);
1246 usleep_range(1000, 2000);
1247
1248 for (i = 0; i < PT1_NR_ADAPS; i++)
1249 dvb_frontend_reinitialise(pt1->adaps[i]->fe);
1250
1251 pt1_init_table_count(pt1);
1252 for (i = 0; i < pt1_nr_tables; i++) {
1253 int j;
1254
1255 for (j = 0; j < PT1_NR_BUFS; j++)
1256 pt1->tables[i].bufs[j].page->upackets[PT1_NR_UPACKETS-1]
1257 = 0;
1258 pt1_increment_table_count(pt1);
1259 }
1260 pt1_register_tables(pt1, pt1->tables[0].addr >> PT1_PAGE_SHIFT);
1261
1262 pt1->table_index = 0;
1263 pt1->buf_index = 0;
1264 for (i = 0; i < PT1_NR_ADAPS; i++) {
1265 pt1->adaps[i]->upacket_count = 0;
1266 pt1->adaps[i]->packet_count = 0;
1267 pt1->adaps[i]->st_count = -1;
1268 }
1269
1270 return 0;
1271
1272 resume_err:
1273 dev_info(&pt1->pdev->dev, "failed to resume PT1/PT2.");
1274 return 0; /* resume anyway */
1275 }
1276
1277 #endif /* CONFIG_PM_SLEEP */
1278
pt1_remove(struct pci_dev * pdev)1279 static void pt1_remove(struct pci_dev *pdev)
1280 {
1281 struct pt1 *pt1;
1282 void __iomem *regs;
1283
1284 pt1 = pci_get_drvdata(pdev);
1285 regs = pt1->regs;
1286
1287 if (pt1->kthread)
1288 kthread_stop(pt1->kthread);
1289 pt1_cleanup_tables(pt1);
1290 pt1_cleanup_frontends(pt1);
1291 pt1_disable_ram(pt1);
1292 pt1->power = 0;
1293 pt1->reset = 1;
1294 pt1_update_power(pt1);
1295 pt1_cleanup_adapters(pt1);
1296 i2c_del_adapter(&pt1->i2c_adap);
1297 kfree(pt1);
1298 pci_iounmap(pdev, regs);
1299 pci_release_regions(pdev);
1300 pci_disable_device(pdev);
1301 }
1302
pt1_probe(struct pci_dev * pdev,const struct pci_device_id * ent)1303 static int pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1304 {
1305 int ret;
1306 void __iomem *regs;
1307 struct pt1 *pt1;
1308 struct i2c_adapter *i2c_adap;
1309
1310 ret = pci_enable_device(pdev);
1311 if (ret < 0)
1312 goto err;
1313
1314 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1315 if (ret < 0)
1316 goto err_pci_disable_device;
1317
1318 pci_set_master(pdev);
1319
1320 ret = pci_request_regions(pdev, DRIVER_NAME);
1321 if (ret < 0)
1322 goto err_pci_disable_device;
1323
1324 regs = pci_iomap(pdev, 0, 0);
1325 if (!regs) {
1326 ret = -EIO;
1327 goto err_pci_release_regions;
1328 }
1329
1330 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1331 if (!pt1) {
1332 ret = -ENOMEM;
1333 goto err_pci_iounmap;
1334 }
1335
1336 mutex_init(&pt1->lock);
1337 pt1->pdev = pdev;
1338 pt1->regs = regs;
1339 pt1->fe_clk = (pdev->device == 0x211a) ?
1340 PT1_FE_CLK_20MHZ : PT1_FE_CLK_25MHZ;
1341 pci_set_drvdata(pdev, pt1);
1342
1343 ret = pt1_init_adapters(pt1);
1344 if (ret < 0)
1345 goto err_kfree;
1346
1347 mutex_init(&pt1->lock);
1348
1349 pt1->power = 0;
1350 pt1->reset = 1;
1351 pt1_update_power(pt1);
1352
1353 i2c_adap = &pt1->i2c_adap;
1354 i2c_adap->algo = &pt1_i2c_algo;
1355 i2c_adap->algo_data = NULL;
1356 i2c_adap->dev.parent = &pdev->dev;
1357 strcpy(i2c_adap->name, DRIVER_NAME);
1358 i2c_set_adapdata(i2c_adap, pt1);
1359 ret = i2c_add_adapter(i2c_adap);
1360 if (ret < 0)
1361 goto err_pt1_cleanup_adapters;
1362
1363 pt1_i2c_init(pt1);
1364 pt1_i2c_wait(pt1);
1365
1366 ret = pt1_sync(pt1);
1367 if (ret < 0)
1368 goto err_i2c_del_adapter;
1369
1370 pt1_identify(pt1);
1371
1372 ret = pt1_unlock(pt1);
1373 if (ret < 0)
1374 goto err_i2c_del_adapter;
1375
1376 ret = pt1_reset_pci(pt1);
1377 if (ret < 0)
1378 goto err_i2c_del_adapter;
1379
1380 ret = pt1_reset_ram(pt1);
1381 if (ret < 0)
1382 goto err_i2c_del_adapter;
1383
1384 ret = pt1_enable_ram(pt1);
1385 if (ret < 0)
1386 goto err_i2c_del_adapter;
1387
1388 pt1_init_streams(pt1);
1389
1390 pt1->power = 1;
1391 pt1_update_power(pt1);
1392 msleep(20);
1393
1394 pt1->reset = 0;
1395 pt1_update_power(pt1);
1396 usleep_range(1000, 2000);
1397
1398 ret = pt1_init_frontends(pt1);
1399 if (ret < 0)
1400 goto err_pt1_disable_ram;
1401
1402 ret = pt1_init_tables(pt1);
1403 if (ret < 0)
1404 goto err_pt1_cleanup_frontends;
1405
1406 return 0;
1407
1408 err_pt1_cleanup_frontends:
1409 pt1_cleanup_frontends(pt1);
1410 err_pt1_disable_ram:
1411 pt1_disable_ram(pt1);
1412 pt1->power = 0;
1413 pt1->reset = 1;
1414 pt1_update_power(pt1);
1415 err_i2c_del_adapter:
1416 i2c_del_adapter(i2c_adap);
1417 err_pt1_cleanup_adapters:
1418 pt1_cleanup_adapters(pt1);
1419 err_kfree:
1420 kfree(pt1);
1421 err_pci_iounmap:
1422 pci_iounmap(pdev, regs);
1423 err_pci_release_regions:
1424 pci_release_regions(pdev);
1425 err_pci_disable_device:
1426 pci_disable_device(pdev);
1427 err:
1428 return ret;
1429
1430 }
1431
1432 static const struct pci_device_id pt1_id_table[] = {
1433 { PCI_DEVICE(0x10ee, 0x211a) },
1434 { PCI_DEVICE(0x10ee, 0x222a) },
1435 { },
1436 };
1437 MODULE_DEVICE_TABLE(pci, pt1_id_table);
1438
1439 static SIMPLE_DEV_PM_OPS(pt1_pm_ops, pt1_suspend, pt1_resume);
1440
1441 static struct pci_driver pt1_driver = {
1442 .name = DRIVER_NAME,
1443 .probe = pt1_probe,
1444 .remove = pt1_remove,
1445 .id_table = pt1_id_table,
1446 .driver.pm = &pt1_pm_ops,
1447 };
1448
1449 module_pci_driver(pt1_driver);
1450
1451 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1452 MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1453 MODULE_LICENSE("GPL");
1454
